From 3c12710b963dbf362e94c545f9cc3bd02141dea8 Mon Sep 17 00:00:00 2001 From: Takashi Iwai Date: Mon, 8 Jun 2009 14:49:26 +0200 Subject: [PATCH] --- yaml --- r: 148376 b: refs/heads/master c: 4836ac655410e7f126d316b0be062b38746f7529 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/sound/pci/ctxfi/cthw20k2.c | 14 ++++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 43563034c3f6..7fad54960987 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d436dd063be605dc29f17b2cb0b99a852db89bed +refs/heads/master: 4836ac655410e7f126d316b0be062b38746f7529 diff --git a/trunk/sound/pci/ctxfi/cthw20k2.c b/trunk/sound/pci/ctxfi/cthw20k2.c index 041199fbae16..edbfb4827469 100644 --- a/trunk/sound/pci/ctxfi/cthw20k2.c +++ b/trunk/sound/pci/ctxfi/cthw20k2.c @@ -26,7 +26,11 @@ #include #include -#define CT_XFI_DMA_MASK DMA_BIT_MASK(32) /* 32 bits */ +#if BITS_PER_LONG == 32 +#define CT_XFI_DMA_MASK DMA_BIT_MASK(32) /* 32 bit PTE */ +#else +#define CT_XFI_DMA_MASK DMA_BIT_MASK(64) /* 64 bit PTE */ +#endif static u32 hw_read_20kx(struct hw *hw, u32 reg); static void hw_write_20kx(struct hw *hw, u32 reg, u32 data); @@ -1834,18 +1838,16 @@ static int hw_card_start(struct hw *hw) int err = 0; struct pci_dev *pci = hw->pci; unsigned int gctl; - unsigned int dma_mask = 0; err = pci_enable_device(pci); if (err < 0) return err; /* Set DMA transfer mask */ - dma_mask = CT_XFI_DMA_MASK; - if (pci_set_dma_mask(pci, dma_mask) < 0 || - pci_set_consistent_dma_mask(pci, dma_mask) < 0) { + if (pci_set_dma_mask(pci, CT_XFI_DMA_MASK) < 0 || + pci_set_consistent_dma_mask(pci, CT_XFI_DMA_MASK) < 0) { printk(KERN_ERR "ctxfi: architecture does not support PCI " - "busmaster DMA with mask 0x%x\n", dma_mask); + "busmaster DMA with mask 0x%llx\n", CT_XFI_DMA_MASK); err = -ENXIO; goto error1; }