From 3d7c47b07aaf6b0e5b9498b0343e4c8a8681fd56 Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri, 13 Apr 2012 15:51:51 +0200
Subject: [PATCH] --- yaml --- r: 307157 b: refs/heads/master c:
 c07496fa61f4c5cb2addd1c57f6b22fcaeea2eeb h: refs/heads/master i:   307155:
 f342869026dcc9ee04dc15619bb266fe36e69ad8 v: v3

---
 [refs]                                | 2 +-
 trunk/drivers/gpu/drm/i915/i915_gem.c | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 7551e05353b2..4d6ec9b96470 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d1e61e7fc4456c4cb9a33ed182edf40e34ddedea
+refs/heads/master: c07496fa61f4c5cb2addd1c57f6b22fcaeea2eeb
diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c
index 71934dd0ee43..9415c07b6285 100644
--- a/trunk/drivers/gpu/drm/i915/i915_gem.c
+++ b/trunk/drivers/gpu/drm/i915/i915_gem.c
@@ -876,6 +876,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
 
 	if (obj->gtt_space &&
 	    obj->cache_level == I915_CACHE_NONE &&
+	    obj->tiling_mode == I915_TILING_NONE &&
 	    obj->map_and_fenceable &&
 	    obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
 		ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file);