From 3deeacbc74e5a1de5755496ec48b1bd3097f454e Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 12 Oct 2007 23:04:06 +0200 Subject: [PATCH] --- yaml --- r: 67756 b: refs/heads/master c: b58eb00df7f7f80b7f456bf8fb740fddf14408ba h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86/kernel/apic_64.c | 8 +++----- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 9e07296a76af..5ced58a0fe71 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d03030e917047cf7f475e641cd2d6e83647392b0 +refs/heads/master: b58eb00df7f7f80b7f456bf8fb740fddf14408ba diff --git a/trunk/arch/x86/kernel/apic_64.c b/trunk/arch/x86/kernel/apic_64.c index b08c08ed36a7..f746f9dc8ced 100644 --- a/trunk/arch/x86/kernel/apic_64.c +++ b/trunk/arch/x86/kernel/apic_64.c @@ -759,8 +759,6 @@ void __init init_apic_mappings(void) * P5 APIC double write bug. */ -#define APIC_DIVISOR 16 - static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) { unsigned int lvtt_value, tmp_value; @@ -782,7 +780,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) | APIC_TDR_DIV_16); if (!oneshot) - apic_write(APIC_TMICT, clocks/APIC_DIVISOR); + apic_write(APIC_TMICT, clocks); } static void setup_APIC_timer(unsigned int clocks) @@ -835,7 +833,7 @@ static void __init calibrate_APIC_clock(void) * * No interrupt enable ! */ - __setup_APIC_LVTT(4000000000, 0, 0); + __setup_APIC_LVTT(250000000, 0, 0); apic_start = apic_read(APIC_TMCCT); #ifdef CONFIG_X86_PM_TIMER @@ -862,7 +860,7 @@ static void __init calibrate_APIC_clock(void) printk(KERN_INFO "Detected %d.%03d MHz APIC timer.\n", result / 1000 / 1000, result / 1000 % 1000); - calibration_result = result * APIC_DIVISOR / HZ; + calibration_result = result / HZ; } void __init setup_boot_APIC_clock (void)