From 3e1c6babed3bb2a1d1307b731cdf23b0865a7316 Mon Sep 17 00:00:00 2001 From: Vipul Kumar Samar Date: Sat, 27 Oct 2012 14:47:50 +0530 Subject: [PATCH] --- yaml --- r: 335496 b: refs/heads/master c: 82a2deb93cb2237e3a91db6d0317571ecbd6e531 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pinctrl/spear/pinctrl-spear1310.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 24dc1f60c58c..0299f3676052 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: b06fbfdb06da61154b9498ff8e83377d3d795081 +refs/heads/master: 82a2deb93cb2237e3a91db6d0317571ecbd6e531 diff --git a/trunk/drivers/pinctrl/spear/pinctrl-spear1310.c b/trunk/drivers/pinctrl/spear/pinctrl-spear1310.c index c720d09029b0..baf98ae0b1c7 100644 --- a/trunk/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/trunk/drivers/pinctrl/spear/pinctrl-spear1310.c @@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { }; /* registers */ -#define PERIP_CFG 0x32C - #define MCIF_SEL_SHIFT 3 +#define PERIP_CFG 0x3B0 + #define MCIF_SEL_SHIFT 5 #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT)