From 3ec9621c95e8a0606db2abef9eace909caa6b57c Mon Sep 17 00:00:00 2001
From: Paul Mundt <lethal@linux-sh.org>
Date: Tue, 2 Feb 2010 19:15:17 +0900
Subject: [PATCH] --- yaml --- r: 181172 b: refs/heads/master c:
 4b842c8571240d1173eaf00e114cc5cc160f1722 h: refs/heads/master v: v3

---
 [refs]                |  2 +-
 trunk/arch/sh/Kconfig | 16 ++++------------
 2 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index 3aebfe131cbd..6fa14ac4618e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: deb9b22b8968fa0166d89c8ad1346e816cf1aec4
+refs/heads/master: 4b842c8571240d1173eaf00e114cc5cc160f1722
diff --git a/trunk/arch/sh/Kconfig b/trunk/arch/sh/Kconfig
index 3b3c036cbc30..7354e8da3902 100644
--- a/trunk/arch/sh/Kconfig
+++ b/trunk/arch/sh/Kconfig
@@ -87,6 +87,10 @@ config GENERIC_IRQ_PROBE
 config IRQ_PER_CPU
 	def_bool y
 
+config SPARSE_IRQ
+	def_bool y
+	depends on SUPERH32
+
 config GENERIC_GPIO
 	def_bool n
 
@@ -728,18 +732,6 @@ config GUSA_RB
 	  LLSC, this should be more efficient than the other alternative of
 	  disabling interrupts around the atomic sequence.
 
-config SPARSE_IRQ
-	def_bool y
-	depends on SUPERH32 && !SH_HIGHLANDER && !SH_RTS7751R2D
-	help
-	  This enables support for sparse irqs. This is useful in general
-	  as most CPUs have a fairly sparse array of IRQ vectors, which
-	  the irq_desc then maps directly on to. Systems with a high
-	  number of off-chip IRQs will want to treat this as
-	  experimental until they have been independently verified.
-
-	  If you don't know what to do here, say N.
-
 endmenu
 
 menu "Boot options"