From 3ee2e0bb41f72e3a57c5bbbf9bccbd32c01af0e7 Mon Sep 17 00:00:00 2001 From: Jassi Brar Date: Tue, 9 Mar 2010 15:10:31 +0900 Subject: [PATCH] --- yaml --- r: 192006 b: refs/heads/master c: df3c6b08d01581052040611f2dced989b83244c9 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/Makefile | 2 - trunk/arch/arm/mach-s3c2410/Kconfig | 9 - trunk/arch/arm/mach-s3c2410/Makefile.boot | 10 +- trunk/arch/arm/mach-s3c2410/h1940-bluetooth.c | 32 +- .../arm/mach-s3c2410/include/mach/gpio-fns.h | 47 +- .../arm/mach-s3c2410/include/mach/gpio-nrs.h | 37 +- .../mach-s3c2410/include/mach/gpio-track.h | 4 +- .../arch/arm/mach-s3c2410/include/mach/gpio.h | 8 - .../arm/mach-s3c2410/include/mach/regs-gpio.h | 39 +- .../mach-s3c2410/include/mach/regs-gpioj.h | 36 ++ trunk/arch/arm/mach-s3c2410/mach-amlm5900.c | 5 +- trunk/arch/arm/mach-s3c2410/mach-bast.c | 11 +- trunk/arch/arm/mach-s3c2410/mach-h1940.c | 29 +- trunk/arch/arm/mach-s3c2410/mach-n30.c | 83 +-- trunk/arch/arm/mach-s3c2410/mach-qt2410.c | 10 +- trunk/arch/arm/mach-s3c2410/mach-vr1000.c | 5 +- trunk/arch/arm/mach-s3c2410/pm.c | 15 +- trunk/arch/arm/mach-s3c2410/s3c2410.c | 8 - trunk/arch/arm/mach-s3c2412/gpio.c | 20 +- trunk/arch/arm/mach-s3c2412/mach-jive.c | 28 +- trunk/arch/arm/mach-s3c2412/mach-smdk2413.c | 14 +- trunk/arch/arm/mach-s3c2440/Kconfig | 14 - trunk/arch/arm/mach-s3c2440/Makefile | 1 - trunk/arch/arm/mach-s3c2440/mach-mini2440.c | 23 +- trunk/arch/arm/mach-s3c2440/mach-nexcoder.c | 9 +- trunk/arch/arm/mach-s3c2440/mach-osiris.c | 5 +- trunk/arch/arm/mach-s3c2440/mach-rx1950.c | 582 ------------------ trunk/arch/arm/mach-s3c2440/mach-rx3715.c | 2 +- trunk/arch/arm/mach-s3c2440/mach-smdk2440.c | 2 +- trunk/arch/arm/mach-s3c2440/s3c2440.c | 8 - trunk/arch/arm/mach-s3c2443/mach-smdk2443.c | 2 +- trunk/arch/arm/mach-s3c64xx/dma.c | 2 +- trunk/arch/arm/mach-s3c64xx/gpiolib.c | 6 - .../mach-s3c64xx/include/mach/regs-clock.h | 1 + trunk/arch/arm/mach-s3c64xx/mach-smdk6400.c | 2 +- trunk/arch/arm/mach-s3c64xx/mach-smdk6410.c | 2 +- trunk/arch/arm/mach-s5p6440/cpu.c | 2 +- trunk/arch/arm/mach-s5p6440/gpio.c | 5 - .../arm/mach-s5p6440/include/mach/pwm-clock.h | 24 +- trunk/arch/arm/mach-s5p6442/cpu.c | 2 +- .../arm/mach-s5p6442/include/mach/pwm-clock.h | 21 +- trunk/arch/arm/mach-s5pv210/Makefile | 2 +- trunk/arch/arm/mach-s5pv210/cpu.c | 2 +- trunk/arch/arm/mach-s5pv210/gpiolib.c | 261 -------- .../arch/arm/mach-s5pv210/include/mach/gpio.h | 18 +- .../arm/mach-s5pv210/include/mach/pwm-clock.h | 21 +- trunk/arch/arm/mm/mmu.c | 5 +- trunk/arch/arm/plat-s3c24xx/Kconfig | 1 - trunk/arch/arm/plat-s3c24xx/common-smdk.c | 9 +- trunk/arch/arm/plat-s3c24xx/devs.c | 19 +- trunk/arch/arm/plat-s3c24xx/dma.c | 2 +- trunk/arch/arm/plat-s3c24xx/gpio.c | 150 ++++- trunk/arch/arm/plat-s3c24xx/gpiolib.c | 60 +- trunk/arch/arm/plat-s3c24xx/pm.c | 9 +- trunk/arch/arm/plat-s3c24xx/setup-i2c.c | 5 +- .../arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 16 +- .../arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | 16 +- .../arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c | 16 +- trunk/arch/arm/plat-s5p/clock.c | 5 - trunk/arch/arm/plat-s5p/include/plat/irqs.h | 2 +- .../arm/plat-s5p/include/plat/s5p-clock.h | 1 - trunk/arch/arm/plat-samsung/Kconfig | 5 - trunk/arch/arm/plat-samsung/Makefile | 1 - trunk/arch/arm/plat-samsung/dev-hwmon.c | 42 -- trunk/arch/arm/plat-samsung/gpio-config.c | 111 +--- trunk/arch/arm/plat-samsung/gpio.c | 15 +- .../arch/arm/plat-samsung/include/plat/cpu.h | 3 - .../arch/arm/plat-samsung/include/plat/dma.h | 4 +- .../include/plat/gpio-cfg-helpers.h | 58 -- .../arm/plat-samsung/include/plat/gpio-cfg.h | 11 - .../arm/plat-samsung/include/plat/gpio-core.h | 17 - .../arm/plat-samsung/include/plat/hwmon.h | 10 - trunk/arch/arm/plat-samsung/pm-gpio.c | 4 +- 74 files changed, 426 insertions(+), 1644 deletions(-) delete mode 100644 trunk/arch/arm/mach-s3c2440/mach-rx1950.c delete mode 100644 trunk/arch/arm/mach-s5pv210/gpiolib.c delete mode 100644 trunk/arch/arm/plat-samsung/dev-hwmon.c diff --git a/[refs] b/[refs] index 328a3ef6ff01..2466a245b3a0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ff1b8ba01dc80da338890a187c112fdd3c0b9202 +refs/heads/master: df3c6b08d01581052040611f2dced989b83244c9 diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index eddcbba87c67..ed820e737a8a 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -110,8 +110,6 @@ CHECKFLAGS += -D__arm__ head-y := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o textofs-y := 0x00008000 textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000 -# We don't want the htc bootloader to corrupt kernel during resume -textofs-$(CONFIG_PM_H1940) := 0x00108000 # SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 diff --git a/trunk/arch/arm/mach-s3c2410/Kconfig b/trunk/arch/arm/mach-s3c2410/Kconfig index a4c0b3fcdbba..554731868b07 100644 --- a/trunk/arch/arm/mach-s3c2410/Kconfig +++ b/trunk/arch/arm/mach-s3c2410/Kconfig @@ -6,7 +6,6 @@ config CPU_S3C2410 bool depends on ARCH_S3C2410 select CPU_ARM920T - select S3C_GPIO_PULL_UP select S3C2410_CLOCK select S3C2410_GPIO select CPU_LLSERIAL_S3C2410 @@ -96,19 +95,12 @@ config PM_H1940 config MACH_N30 bool "Acer N30 family" select CPU_S3C2410 - select MACH_N35 select S3C_DEV_USB_HOST select S3C_DEV_NAND help Say Y here if you want suppt for the Acer N30, Acer N35, Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. -config MACH_N35 - bool - help - Internal node in order to enable support for Acer N35 if Acer N30 is - selected. - config ARCH_BAST bool "Simtec Electronics BAST (EB2410ITX)" select CPU_S3C2410 @@ -118,7 +110,6 @@ config ARCH_BAST select MACH_BAST_IDE select S3C24XX_DCLK select ISA - select S3C_DEV_HWMON select S3C_DEV_USB_HOST select S3C_DEV_NAND help diff --git a/trunk/arch/arm/mach-s3c2410/Makefile.boot b/trunk/arch/arm/mach-s3c2410/Makefile.boot index 58c1dd7f8e1d..7dab2a0325b5 100644 --- a/trunk/arch/arm/mach-s3c2410/Makefile.boot +++ b/trunk/arch/arm/mach-s3c2410/Makefile.boot @@ -1,7 +1,3 @@ -ifeq ($(CONFIG_PM_H1940),y) - zreladdr-y := 0x30108000 - params_phys-y := 0x30100100 -else - zreladdr-y := 0x30008000 - params_phys-y := 0x30000100 -endif + zreladdr-y := 0x30008000 +params_phys-y := 0x30000100 + diff --git a/trunk/arch/arm/mach-s3c2410/h1940-bluetooth.c b/trunk/arch/arm/mach-s3c2410/h1940-bluetooth.c index 8cdeb14af592..a3f3c7b1ca38 100644 --- a/trunk/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/trunk/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -33,15 +33,14 @@ static void h1940bt_enable(int on) h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); /* Reset the chip */ mdelay(10); - - gpio_set_value(S3C2410_GPH(1), 1); + s3c2410_gpio_setpin(S3C2410_GPH(1), 1); mdelay(10); - gpio_set_value(S3C2410_GPH(1), 0); + s3c2410_gpio_setpin(S3C2410_GPH(1), 0); } else { - gpio_set_value(S3C2410_GPH(1), 1); + s3c2410_gpio_setpin(S3C2410_GPH(1), 1); mdelay(10); - gpio_set_value(S3C2410_GPH(1), 0); + s3c2410_gpio_setpin(S3C2410_GPH(1), 0); mdelay(10); h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); } @@ -62,21 +61,15 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) struct rfkill *rfk; int ret = 0; - ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev)); - if (ret) { - dev_err(&pdev->dev, "could not get GPH1\n");\ - return ret; - } - /* Configures BT serial port GPIOs */ - s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); - s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); - s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); - s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); - s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); + s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); + s3c2410_gpio_pullup(S3C2410_GPH(0), 1); + s3c2410_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_pullup(S3C2410_GPH(1), 1); + s3c2410_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); + s3c2410_gpio_pullup(S3C2410_GPH(2), 1); + s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); + s3c2410_gpio_pullup(S3C2410_GPH(3), 1); rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, @@ -107,7 +100,6 @@ static int h1940bt_remove(struct platform_device *pdev) struct rfkill *rfk = platform_get_drvdata(pdev); platform_set_drvdata(pdev, NULL); - gpio_free(S3C2410_GPH(1)); if (rfk) { rfkill_unregister(rfk); diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-fns.h index f453c4f2cb8e..035a493952db 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-fns.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-fns.h @@ -10,28 +10,14 @@ * published by the Free Software Foundation. */ -#ifndef __MACH_GPIO_FNS_H -#define __MACH_GPIO_FNS_H __FILE__ - /* These functions are in the to-be-removed category and it is strongly * encouraged not to use these in new code. They will be marked deprecated * very soon. * * Most of the functionality can be either replaced by the gpiocfg calls * for the s3c platform or by the generic GPIOlib API. - * - * As of 2.6.35-rc, these will be removed, with the few drivers using them - * either replaced or given a wrapper until the calls can be removed. */ -#include - -static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg) -{ - /* 1:1 mapping between cfgpin and setcfg calls at the moment */ - s3c_gpio_cfgpin(pin, cfg); -} - /* external functions for GPIO support * * These allow various different clients to access the same GPIO @@ -39,6 +25,17 @@ static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg) * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. */ +/* s3c2410_gpio_cfgpin + * + * set the configuration of the given pin to the value passed. + * + * eg: + * s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0); + * s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1); +*/ + +extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); + extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); /* s3c2410_gpio_getirq @@ -74,14 +71,6 @@ extern int s3c2400_gpio_getirq(unsigned int pin); extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, unsigned int config); -/* s3c2410_gpio_pullup - * - * This call should be replaced with s3c_gpio_setpull(). - * - * As a note, there is currently no distinction between pull-up and pull-down - * in the s3c24xx series devices with only an on/off configuration. - */ - /* s3c2410_gpio_pullup * * configure the pull-up control on the given pin @@ -97,8 +86,18 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); +/* s3c2410_gpio_getpull + * + * Read the state of the pull-up on a given pin + * + * return: + * < 0 => error code + * 0 => enabled + * 1 => disabled +*/ + +extern int s3c2410_gpio_getpull(unsigned int pin); + extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); extern unsigned int s3c2410_gpio_getpin(unsigned int pin); - -#endif /* __MACH_GPIO_FNS_H */ diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h index 4f7bf3272e87..2edbb9c88ab3 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h @@ -16,28 +16,15 @@ #define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) +#define S3C2410_GPIO_BANKA (32*0) +#define S3C2410_GPIO_BANKB (32*1) +#define S3C2410_GPIO_BANKC (32*2) +#define S3C2410_GPIO_BANKD (32*3) +#define S3C2410_GPIO_BANKE (32*4) +#define S3C2410_GPIO_BANKF (32*5) #define S3C2410_GPIO_BANKG (32*6) #define S3C2410_GPIO_BANKH (32*7) -/* GPIO sizes for various SoCs: - * - * 2442 - * 2410 2412 2440 2443 2416 - * ---- ---- ---- ---- ---- - * A 23 22 25 16 25 - * B 11 11 11 11 9 - * C 16 15 16 16 16 - * D 16 16 16 16 16 - * E 16 16 16 16 16 - * F 8 8 8 8 8 - * G 16 16 16 16 8 - * H 11 11 9 15 15 - * J -- -- 13 16 -- - * K -- -- -- -- 16 - * L -- -- -- 15 7 - * M -- -- -- 2 2 - */ - /* GPIO bank sizes */ #define S3C2410_GPIO_A_NR (32) #define S3C2410_GPIO_B_NR (32) @@ -47,10 +34,6 @@ #define S3C2410_GPIO_F_NR (32) #define S3C2410_GPIO_G_NR (32) #define S3C2410_GPIO_H_NR (32) -#define S3C2410_GPIO_J_NR (32) /* technically 16. */ -#define S3C2410_GPIO_K_NR (32) /* technically 16. */ -#define S3C2410_GPIO_L_NR (32) /* technically 15. */ -#define S3C2410_GPIO_M_NR (32) /* technically 2. */ #if CONFIG_S3C_GPIO_SPACE != 0 #error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment @@ -70,10 +53,6 @@ enum s3c_gpio_number { S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), - S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), - S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), - S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), - S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), }; #endif /* __ASSEMBLY__ */ @@ -88,10 +67,6 @@ enum s3c_gpio_number { #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) -#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) -#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) -#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) -#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) /* compatibility until drivers can be modified */ diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-track.h index d67819dde42a..acb259103808 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/gpio-track.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/gpio-track.h @@ -23,11 +23,11 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin) { struct s3c_gpio_chip *chip; - if (pin > S3C_GPIO_END) + if (pin > S3C2410_GPG(10)) return NULL; chip = &s3c24xx_gpios[pin/32]; - return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL; + return (S3C2410_GPIO_OFFSET(pin) < chip->chip.ngpio) ? chip : NULL; } #endif /* __ASM_ARCH_GPIO_CORE_H */ diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h b/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h index b649bf2ccd5c..15f0b3e7ce69 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h @@ -20,18 +20,10 @@ * devices that need GPIO. */ -#ifdef CONFIG_CPU_S3C244X -#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA) -#else #define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) -#endif #include #include #include -#ifdef CONFIG_CPU_S3C24XX -#define S3C_GPIO_END (S3C2410_GPIO_BANKJ + 32) -#else #define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) -#endif diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpio.h index 95e29fefec34..fd672f330bf2 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpio.h @@ -17,11 +17,29 @@ #include #ifdef CONFIG_CPU_S3C2400 -#define S3C24XX_MISCCR S3C2400_MISCCR +#define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) +#define S3C24XX_MISCCR S3C2400_MISCCR #else -#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) +#define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) +#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) #endif /* CONFIG_CPU_S3C2400 */ + +/* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */ + +#define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32) +#define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2)) +#define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \ + (2 * (S3C2400_BANKNUM(pin)-2))) + +#define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \ + S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \ + S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO) + + +#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO) +#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31) + /* general configuration options */ #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) @@ -621,23 +639,6 @@ * for the 2412/2413 from the 2410/2440/2442 */ -/* S3C2443 and above */ -#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0) -#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4) -#define S3C2440_GPJUP S3C2410_GPIOREG(0xD8) - -#define S3C2443_GPKCON S3C2410_GPIOREG(0xE0) -#define S3C2443_GPKDAT S3C2410_GPIOREG(0xE4) -#define S3C2443_GPKUP S3C2410_GPIOREG(0xE8) - -#define S3C2443_GPLCON S3C2410_GPIOREG(0xF0) -#define S3C2443_GPLDAT S3C2410_GPIOREG(0xF4) -#define S3C2443_GPLUP S3C2410_GPIOREG(0xF8) - -#define S3C2443_GPMCON S3C2410_GPIOREG(0x100) -#define S3C2443_GPMDAT S3C2410_GPIOREG(0x104) -#define S3C2443_GPMUP S3C2410_GPIOREG(0x108) - /* miscellaneous control */ #define S3C2400_MISCCR S3C2410_GPIOREG(0x54) #define S3C2410_MISCCR S3C2410_GPIOREG(0x80) diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h index 19575e061114..1202ca5e99f6 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h @@ -22,49 +22,85 @@ * pull up works like all other ports. */ +#define S3C2440_GPIO_BANKJ (416) + +#define S3C2440_GPJCON S3C2410_GPIOREG(0xd0) +#define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4) +#define S3C2440_GPJUP S3C2410_GPIOREG(0xd8) + #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) +#define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0) +#define S3C2440_GPJ0_INP (0x00 << 0) #define S3C2440_GPJ0_OUTP (0x01 << 0) #define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) +#define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1) +#define S3C2440_GPJ1_INP (0x00 << 2) #define S3C2440_GPJ1_OUTP (0x01 << 2) #define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) +#define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2) +#define S3C2440_GPJ2_INP (0x00 << 4) #define S3C2440_GPJ2_OUTP (0x01 << 4) #define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) +#define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3) +#define S3C2440_GPJ3_INP (0x00 << 6) #define S3C2440_GPJ3_OUTP (0x01 << 6) #define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) +#define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4) +#define S3C2440_GPJ4_INP (0x00 << 8) #define S3C2440_GPJ4_OUTP (0x01 << 8) #define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) +#define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5) +#define S3C2440_GPJ5_INP (0x00 << 10) #define S3C2440_GPJ5_OUTP (0x01 << 10) #define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) +#define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6) +#define S3C2440_GPJ6_INP (0x00 << 12) #define S3C2440_GPJ6_OUTP (0x01 << 12) #define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) +#define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7) +#define S3C2440_GPJ7_INP (0x00 << 14) #define S3C2440_GPJ7_OUTP (0x01 << 14) #define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) +#define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8) +#define S3C2440_GPJ8_INP (0x00 << 16) #define S3C2440_GPJ8_OUTP (0x01 << 16) #define S3C2440_GPJ8_CAMPCLK (0x02 << 16) +#define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9) +#define S3C2440_GPJ9_INP (0x00 << 18) #define S3C2440_GPJ9_OUTP (0x01 << 18) #define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) +#define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10) +#define S3C2440_GPJ10_INP (0x00 << 20) #define S3C2440_GPJ10_OUTP (0x01 << 20) #define S3C2440_GPJ10_CAMHREF (0x02 << 20) +#define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11) +#define S3C2440_GPJ11_INP (0x00 << 22) #define S3C2440_GPJ11_OUTP (0x01 << 22) #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) +#define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12) +#define S3C2440_GPJ12_INP (0x00 << 24) #define S3C2440_GPJ12_OUTP (0x01 << 24) #define S3C2440_GPJ12_CAMRESET (0x02 << 24) +#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13) +#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14) +#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15) + #endif /* __ASM_ARCH_REGS_GPIOJ_H */ diff --git a/trunk/arch/arm/mach-s3c2410/mach-amlm5900.c b/trunk/arch/arm/mach-s3c2410/mach-amlm5900.c index 34fc05a4244b..7047317ed7f4 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/trunk/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -56,7 +56,6 @@ #include #include #include -#include #ifdef CONFIG_MTD_PARTITIONS @@ -226,8 +225,8 @@ static void amlm5900_init_pm(void) } else { enable_irq_wake(IRQ_EINT9); /* configure the suspend/resume status pin */ - s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); - s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP); + s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_pullup(S3C2410_GPF(2), 0); } } static void __init amlm5900_init(void) diff --git a/trunk/arch/arm/mach-s3c2410/mach-bast.c b/trunk/arch/arm/mach-s3c2410/mach-bast.c index c1f90f6fab42..02b1b6220cba 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-bast.c +++ b/trunk/arch/arm/mach-s3c2410/mach-bast.c @@ -61,7 +61,6 @@ #include #include #include -#include #include #include "usb-simtec.h" @@ -217,13 +216,15 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { static int bast_pm_suspend(struct sys_device *sd, pm_message_t state) { /* ensure that an nRESET is not generated on resume. */ - gpio_direction_output(S3C2410_GPA(21), 1); + s3c2410_gpio_setpin(S3C2410_GPA(21), 1); + s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT); + return 0; } static int bast_pm_resume(struct sys_device *sd) { - s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); + s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); return 0; } @@ -633,7 +634,7 @@ static void __init bast_map_io(void) s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); - s3c_hwmon_set_platdata(&bast_hwmon_info); + s3c_device_hwmon.dev.platform_data = &bast_hwmon_info; s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_clocks(0); @@ -657,8 +658,6 @@ static void __init bast_init(void) nor_simtec_init(); simtec_audio_add(NULL, true, &bast_audio); - WARN_ON(gpio_request(S3C2410_GPA(21), "bast nreset")); - s3c_cpufreq_setboard(&bast_cpufreq); } diff --git a/trunk/arch/arm/mach-s3c2410/mach-h1940.c b/trunk/arch/arm/mach-s3c2410/mach-h1940.c index d2a2fad7db97..fbedd0760941 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-h1940.c +++ b/trunk/arch/arm/mach-s3c2410/mach-h1940.c @@ -50,7 +50,6 @@ #include #include -#include #include #include #include @@ -163,8 +162,8 @@ static struct s3c2410fb_display h1940_lcd __initdata = { .xres = 240, .yres = 320, .bpp = 16, - .left_margin = 8, - .right_margin = 20, + .left_margin = 20, + .right_margin = 8, .hsync_len = 4, .upper_margin = 8, .lower_margin = 7, @@ -208,16 +207,16 @@ static int h1940_backlight_init(struct device *dev) { gpio_request(S3C2410_GPB(0), "Backlight"); - gpio_direction_output(S3C2410_GPB(0), 0); - s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); + s3c2410_gpio_setpin(S3C2410_GPB(0), 0); + s3c2410_gpio_pullup(S3C2410_GPB(0), 0); + s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); return 0; } static void h1940_backlight_exit(struct device *dev) { - gpio_direction_output(S3C2410_GPB(0), 1); + s3c2410_gpio_cfgpin(S3C2410_GPB(0), 1/*S3C2410_GPB0_OUTP*/); } static struct platform_pwm_backlight_data backlight_data = { @@ -246,18 +245,18 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd, if (!power) { /* set to 3ec */ - gpio_direction_output(S3C2410_GPC(0), 0); + s3c2410_gpio_setpin(S3C2410_GPC(0), 0); /* wait for 3ac */ do { - value = gpio_get_value(S3C2410_GPC(6)); + value = s3c2410_gpio_getpin(S3C2410_GPC(6)); } while (value); /* set to 38c */ - gpio_direction_output(S3C2410_GPC(5), 0); + s3c2410_gpio_setpin(S3C2410_GPC(5), 0); } else { /* Set to 3ac */ - gpio_direction_output(S3C2410_GPC(5), 1); + s3c2410_gpio_setpin(S3C2410_GPC(5), 1); /* Set to 3ad */ - gpio_direction_output(S3C2410_GPC(0), 1); + s3c2410_gpio_setpin(S3C2410_GPC(0), 1); } } @@ -272,6 +271,7 @@ static struct platform_device h1940_lcd_powerdev = { }; static struct platform_device *h1940_devices[] __initdata = { + &s3c_device_ts, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt, @@ -285,8 +285,6 @@ static struct platform_device *h1940_devices[] __initdata = { &s3c_device_timer[0], &h1940_backlight, &h1940_lcd_powerdev, - &s3c_device_adc, - &s3c_device_ts, }; static void __init h1940_map_io(void) @@ -334,13 +332,12 @@ static void __init h1940_init(void) gpio_request(S3C2410_GPC(5), "LCD power"); gpio_request(S3C2410_GPC(6), "LCD power"); - gpio_direction_input(S3C2410_GPC(6)); platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); } MACHINE_START(H1940, "IPAQ-H1940") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c2410/mach-n30.c b/trunk/arch/arm/mach-s3c2410/mach-n30.c index 41f299d983eb..684710f88142 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-n30.c +++ b/trunk/arch/arm/mach-s3c2410/mach-n30.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include @@ -47,7 +46,6 @@ #include #include #include -#include #include #include @@ -88,10 +86,10 @@ static void n30_udc_pullup(enum s3c2410_udc_cmd_e cmd) { switch (cmd) { case S3C2410_UDC_P_ENABLE : - gpio_set_value(S3C2410_GPB(3), 1); + s3c2410_gpio_setpin(S3C2410_GPB(3), 1); break; case S3C2410_UDC_P_DISABLE : - gpio_set_value(S3C2410_GPB(3), 0); + s3c2410_gpio_setpin(S3C2410_GPB(3), 0); break; case S3C2410_UDC_P_RESET : break; @@ -174,10 +172,8 @@ static struct gpio_keys_button n35_buttons[] = { { .gpio = S3C2410_GPF(0), .code = KEY_POWER, - .type = EV_PWR, .desc = "Power", .active_low = 0, - .wakeup = 1, }, { .gpio = S3C2410_GPG(9), @@ -268,14 +264,6 @@ static struct s3c24xx_led_platdata n30_blue_led_pdata = { .def_trigger = "", }; -/* This is the blue LED on the device. Originaly used to indicate GPS activity - * by flashing. */ -static struct s3c24xx_led_platdata n35_blue_led_pdata = { - .name = "blue_led", - .gpio = S3C2410_GPD(8), - .def_trigger = "", -}; - /* This LED is driven by the battery microcontroller, and is blinking * red, blinking green or solid green when the battery is low, * charging or full respectively. By driving GPD9 low, it's possible @@ -287,13 +275,6 @@ static struct s3c24xx_led_platdata n30_warning_led_pdata = { .def_trigger = "", }; -static struct s3c24xx_led_platdata n35_warning_led_pdata = { - .name = "warning_led", - .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, - .gpio = S3C2410_GPD(9), - .def_trigger = "", -}; - static struct platform_device n30_blue_led = { .name = "s3c24xx_led", .id = 1, @@ -302,14 +283,6 @@ static struct platform_device n30_blue_led = { }, }; -static struct platform_device n35_blue_led = { - .name = "s3c24xx_led", - .id = 1, - .dev = { - .platform_data = &n35_blue_led_pdata, - }, -}; - static struct platform_device n30_warning_led = { .name = "s3c24xx_led", .id = 2, @@ -318,14 +291,6 @@ static struct platform_device n30_warning_led = { }, }; -static struct platform_device n35_warning_led = { - .name = "s3c24xx_led", - .id = 2, - .dev = { - .platform_data = &n35_warning_led_pdata, - }, -}; - static struct s3c2410fb_display n30_display __initdata = { .type = S3C2410_LCDCON1_TFT, .width = 240, @@ -352,36 +317,13 @@ static struct s3c2410fb_mach_info n30_fb_info __initdata = { .lpcsel = 0x06, }; -static void n30_sdi_set_power(unsigned char power_mode, unsigned short vdd) -{ - switch (power_mode) { - case MMC_POWER_ON: - case MMC_POWER_UP: - gpio_set_value(S3C2410_GPG(4), 1); - break; - case MMC_POWER_OFF: - default: - gpio_set_value(S3C2410_GPG(4), 0); - break; - } -} - -static struct s3c24xx_mci_pdata n30_mci_cfg __initdata = { - .gpio_detect = S3C2410_GPF(1), - .gpio_wprotect = S3C2410_GPG(10), - .ocr_avail = MMC_VDD_32_33, - .set_power = n30_sdi_set_power, -}; - static struct platform_device *n30_devices[] __initdata = { &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c0, &s3c_device_iis, &s3c_device_ohci, - &s3c_device_rtc, &s3c_device_usbgadget, - &s3c_device_sdi, &n30_button_device, &n30_blue_led, &n30_warning_led, @@ -392,12 +334,8 @@ static struct platform_device *n35_devices[] __initdata = { &s3c_device_wdt, &s3c_device_i2c0, &s3c_device_iis, - &s3c_device_rtc, &s3c_device_usbgadget, - &s3c_device_sdi, &n35_button_device, - &n35_blue_led, - &n35_warning_led, }; static struct s3c2410_platform_i2c __initdata n30_i2ccfg = { @@ -552,15 +490,17 @@ static void __init n30_map_io(void) s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); } +static void __init n30_init_irq(void) +{ + s3c24xx_init_irq(); +} + /* GPB3 is the line that controls the pull-up for the USB D+ line */ static void __init n30_init(void) { - WARN_ON(gpio_request(S3C2410_GPG(4), "mmc power")); - s3c24xx_fb_set_platdata(&n30_fb_info); s3c24xx_udc_set_platdata(&n30_udc_cfg); - s3c24xx_mci_set_platdata(&n30_mci_cfg); s3c_i2c0_set_platdata(&n30_i2ccfg); /* Turn off suspend on both USB ports, and switch the @@ -592,13 +532,10 @@ static void __init n30_init(void) s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | S3C2410_MISCCR_USBSUSPND0 | S3C2410_MISCCR_USBSUSPND1, - S3C2410_MISCCR_USBSUSPND0); + S3C2410_MISCCR_USBSUSPND1); platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); } - - WARN_ON(gpio_request(S3C2410_GPB(3), "udc pup")); - gpio_direction_output(S3C2410_GPB(3), 0); } MACHINE_START(N30, "Acer-N30") @@ -610,7 +547,7 @@ MACHINE_START(N30, "Acer-N30") .boot_params = S3C2410_SDRAM_PA + 0x100, .timer = &s3c24xx_timer, .init_machine = n30_init, - .init_irq = s3c24xx_init_irq, + .init_irq = n30_init_irq, .map_io = n30_map_io, MACHINE_END @@ -622,6 +559,6 @@ MACHINE_START(N35, "Acer-N35") .boot_params = S3C2410_SDRAM_PA + 0x100, .timer = &s3c24xx_timer, .init_machine = n30_init, - .init_irq = s3c24xx_init_irq, + .init_irq = n30_init_irq, .map_io = n30_map_io, MACHINE_END diff --git a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c index d0e87b6e2e0f..92a4ec375d82 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c @@ -58,7 +58,6 @@ #include #include -#include #include #include #include @@ -220,10 +219,10 @@ static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs) { switch (cs) { case BITBANG_CS_ACTIVE: - gpio_set_value(S3C2410_GPB(5), 0); + s3c2410_gpio_setpin(S3C2410_GPB(5), 0); break; case BITBANG_CS_INACTIVE: - gpio_set_value(S3C2410_GPB(5), 1); + s3c2410_gpio_setpin(S3C2410_GPB(5), 1); break; } } @@ -348,14 +347,13 @@ static void __init qt2410_machine_init(void) } s3c24xx_fb_set_platdata(&qt2410_fb_info); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPB(0), 1); s3c24xx_udc_set_platdata(&qt2410_udc_cfg); s3c_i2c0_set_platdata(NULL); - WARN_ON(gpio_request(S3C2410_GPB(5), "spi cs")); - gpio_direction_output(S3C2410_GPB(5), 1); + s3c2410_gpio_cfgpin(S3C2410_GPB(5), S3C2410_GPIO_OUTPUT); platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); s3c_pm_init(); diff --git a/trunk/arch/arm/mach-s3c2410/mach-vr1000.c b/trunk/arch/arm/mach-s3c2410/mach-vr1000.c index d540d79dd264..9051f0d31123 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/trunk/arch/arm/mach-s3c2410/mach-vr1000.c @@ -357,7 +357,8 @@ static struct clk *vr1000_clocks[] __initdata = { static void vr1000_power_off(void) { - gpio_direction_output(S3C2410_GPB(9), 1); + s3c2410_gpio_cfgpin(S3C2410_GPB(9), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_setpin(S3C2410_GPB(9), 1); } static void __init vr1000_map_io(void) @@ -394,8 +395,6 @@ static void __init vr1000_init(void) nor_simtec_init(); simtec_audio_add(NULL, true, NULL); - - WARN_ON(gpio_request(S3C2410_GPB(9), "power off")); } MACHINE_START(VR1000, "Thorcom-VR1000") diff --git a/trunk/arch/arm/mach-s3c2410/pm.c b/trunk/arch/arm/mach-s3c2410/pm.c index 725636fc4dc3..966119c8efee 100644 --- a/trunk/arch/arm/mach-s3c2410/pm.c +++ b/trunk/arch/arm/mach-s3c2410/pm.c @@ -60,10 +60,10 @@ static void s3c2410_pm_prepare(void) __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM)); } - /* RX3715 and RX1950 use similar to H1940 code and the + /* the RX3715 uses similar code and the same H1940 and the * same offsets for resume and checksum pointers */ - if (machine_is_rx3715() || machine_is_rx1950()) { + if (machine_is_rx3715()) { void *base = phys_to_virt(H1940_SUSPEND_CHECK); unsigned long ptr; unsigned long calc = 0; @@ -79,17 +79,6 @@ static void s3c2410_pm_prepare(void) if ( machine_is_aml_m5900() ) s3c2410_gpio_setpin(S3C2410_GPF(2), 1); - if (machine_is_rx1950()) { - /* According to S3C2442 user's manual, page 7-17, - * when the system is operating in NAND boot mode, - * the hardware pin configuration - EINT[23:21] – - * must be set as input for starting up after - * wakeup from sleep mode - */ - s3c_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPG(14), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPG(15), S3C2410_GPIO_INPUT); - } } static int s3c2410_pm_resume(struct sys_device *dev) diff --git a/trunk/arch/arm/mach-s3c2410/s3c2410.c b/trunk/arch/arm/mach-s3c2410/s3c2410.c index adc90a3c5890..91ba42f688ac 100644 --- a/trunk/arch/arm/mach-s3c2410/s3c2410.c +++ b/trunk/arch/arm/mach-s3c2410/s3c2410.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -41,10 +40,6 @@ #include #include -#include -#include -#include - /* Initial IO mappings */ static struct map_desc s3c2410_iodesc[] __initdata = { @@ -70,9 +65,6 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s3c2410_map_io(void) { - s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; - s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; - iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); } diff --git a/trunk/arch/arm/mach-s3c2412/gpio.c b/trunk/arch/arm/mach-s3c2412/gpio.c index 3404a876b33e..f7afece7fc38 100644 --- a/trunk/arch/arm/mach-s3c2412/gpio.c +++ b/trunk/arch/arm/mach-s3c2412/gpio.c @@ -16,43 +16,41 @@ #include #include #include -#include #include #include #include -#include -#include +#include int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) { - struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); - unsigned long offs = pin - chip->chip.base; + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); unsigned long flags; unsigned long slpcon; offs *= 2; - if (pin < S3C2410_GPB(0)) + if (pin < S3C2410_GPIO_BANKB) return -EINVAL; - if (pin >= S3C2410_GPF(0) && - pin <= S3C2410_GPG(16)) + if (pin >= S3C2410_GPIO_BANKF && + pin <= S3C2410_GPIO_BANKG) return -EINVAL; - if (pin > S3C2410_GPH(16)) + if (pin > (S3C2410_GPIO_BANKH + 32)) return -EINVAL; local_irq_save(flags); - slpcon = __raw_readl(chip->base + 0x0C); + slpcon = __raw_readl(base + 0x0C); slpcon &= ~(3 << offs); slpcon |= state << offs; - __raw_writel(slpcon, chip->base + 0x0C); + __raw_writel(slpcon, base + 0x0C); local_irq_restore(flags); diff --git a/trunk/arch/arm/mach-s3c2412/mach-jive.c b/trunk/arch/arm/mach-s3c2412/mach-jive.c index 478f4b4606c2..14f4798291aa 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-jive.c +++ b/trunk/arch/arm/mach-s3c2412/mach-jive.c @@ -48,7 +48,6 @@ #include #include -#include #include #include #include @@ -358,7 +357,8 @@ static void jive_lcm_reset(unsigned int set) { printk(KERN_DEBUG "%s(%d)\n", __func__, set); - gpio_set_value(S3C2410_GPG(13), set); + s3c2410_gpio_setpin(S3C2410_GPG(13), set); + s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_OUTPUT); } #undef LCD_UPPER_MARGIN @@ -391,7 +391,7 @@ static struct ili9320_platdata jive_lcm_config = { static void jive_lcd_spi_chipselect(struct s3c2410_spigpio_info *spi, int cs) { - gpio_set_value(S3C2410_GPB(7), cs ? 0 : 1); + s3c2410_gpio_setpin(S3C2410_GPB(7), cs ? 0 : 1); } static struct s3c2410_spigpio_info jive_lcd_spi = { @@ -413,7 +413,7 @@ static struct platform_device jive_device_lcdspi = { static void jive_wm8750_chipselect(struct s3c2410_spigpio_info *spi, int cs) { - gpio_set_value(S3C2410_GPH(10), cs ? 0 : 1); + s3c2410_gpio_setpin(S3C2410_GPH(10), cs ? 0 : 1); } static struct s3c2410_spigpio_info jive_wm8750_spi = { @@ -531,7 +531,7 @@ static void jive_power_off(void) printk(KERN_INFO "powering system down...\n"); s3c2410_gpio_setpin(S3C2410_GPC(5), 1); - s3c_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); } static void __init jive_machine_init(void) @@ -636,22 +636,22 @@ static void __init jive_machine_init(void) /* initialise the spi */ - gpio_request(S3C2410_GPG(13), "lcm reset"); - gpio_direction_output(S3C2410_GPG(13), 0); + s3c2410_gpio_setpin(S3C2410_GPG(13), 0); + s3c2410_gpio_cfgpin(S3C2410_GPG(13), S3C2410_GPIO_OUTPUT); - gpio_request(S3C2410_GPB(7), "jive spi"); - gpio_direction_output(S3C2410_GPB(7), 1); + s3c2410_gpio_setpin(S3C2410_GPB(7), 1); + s3c2410_gpio_cfgpin(S3C2410_GPB(7), S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPB(6), 0); - s3c_gpio_cfgpin(S3C2410_GPB(6), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPB(6), S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPG(8), 1); - s3c_gpio_cfgpin(S3C2410_GPG(8), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPG(8), S3C2410_GPIO_OUTPUT); /* initialise the WM8750 spi */ - gpio_request(S3C2410_GPH(10), "jive wm8750 spi"); - gpio_direction_output(S3C2410_GPH(10), 1); + s3c2410_gpio_setpin(S3C2410_GPH(10), 1); + s3c2410_gpio_cfgpin(S3C2410_GPH(10), S3C2410_GPIO_OUTPUT); /* Turn off suspend on both USB ports, and switch the * selectable USB port to USB device mode. */ @@ -674,7 +674,7 @@ static void __init jive_machine_init(void) } MACHINE_START(JIVE, "JIVE") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c b/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c index ba93a356a839..0392065af1af 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -85,10 +85,10 @@ static void smdk2413_udc_pullup(enum s3c2410_udc_cmd_e cmd) switch (cmd) { case S3C2410_UDC_P_ENABLE : - gpio_set_value(S3C2410_GPF(2), 1); + s3c2410_gpio_setpin(S3C2410_GPF(2), 1); break; case S3C2410_UDC_P_DISABLE : - gpio_set_value(S3C2410_GPF(2), 0); + s3c2410_gpio_setpin(S3C2410_GPF(2), 0); break; case S3C2410_UDC_P_RESET : break; @@ -134,8 +134,8 @@ static void __init smdk2413_machine_init(void) { /* Turn off suspend on both USB ports, and switch the * selectable USB port to USB device mode. */ - WARN_ON(gpio_request(S3C2410_GPF(2), "udc pull")); - gpio_direction_output(S3C2410_GPF(2), 0); + s3c2410_gpio_setpin(S3C2410_GPF(2), 0); + s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | S3C2410_MISCCR_USBSUSPND0 | @@ -150,7 +150,7 @@ static void __init smdk2413_machine_init(void) } MACHINE_START(S3C2413, "S3C2413") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, @@ -163,7 +163,7 @@ MACHINE_START(S3C2413, "S3C2413") MACHINE_END MACHINE_START(SMDK2412, "SMDK2412") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, @@ -176,7 +176,7 @@ MACHINE_START(SMDK2412, "SMDK2412") MACHINE_END MACHINE_START(SMDK2413, "SMDK2413") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c2440/Kconfig b/trunk/arch/arm/mach-s3c2440/Kconfig index cd8e7de388f0..7f465265cf04 100644 --- a/trunk/arch/arm/mach-s3c2440/Kconfig +++ b/trunk/arch/arm/mach-s3c2440/Kconfig @@ -6,7 +6,6 @@ config CPU_S3C2440 bool depends on ARCH_S3C2410 select CPU_ARM920T - select S3C_GPIO_PULL_UP select S3C2410_CLOCK select S3C2410_PM if PM select S3C2410_GPIO @@ -188,17 +187,4 @@ config MACH_MINI2440 Say Y here to select support for the MINI2440. Is a 10cm x 10cm board available via various sources. It can come with a 3.5" or 7" touch LCD. -config MACH_RX1950 - bool "HP iPAQ rx1950" - select CPU_S3C2442 - select S3C24XX_DCLK - select PM_H1940 if PM - select I2C - select S3C2410_PWM - select S3C_DEV_NAND - select S3C2410_IOTIMING if S3C2440_CPUFREQ - select S3C2440_XTAL_16934400 - help - Say Y here if you're using HP iPAQ rx1950 - endmenu diff --git a/trunk/arch/arm/mach-s3c2440/Makefile b/trunk/arch/arm/mach-s3c2440/Makefile index d5440fa34b04..c85ba32d8956 100644 --- a/trunk/arch/arm/mach-s3c2440/Makefile +++ b/trunk/arch/arm/mach-s3c2440/Makefile @@ -34,7 +34,6 @@ obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o obj-$(CONFIG_MACH_MINI2440) += mach-mini2440.o obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o -obj-$(CONFIG_MACH_RX1950) += mach-rx1950.o # extra machine support diff --git a/trunk/arch/arm/mach-s3c2440/mach-mini2440.c b/trunk/arch/arm/mach-s3c2440/mach-mini2440.c index a76bcda210ad..571b17683d96 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/trunk/arch/arm/mach-s3c2440/mach-mini2440.c @@ -53,7 +53,6 @@ #include #include -#include #include #include #include @@ -103,10 +102,10 @@ static void mini2440_udc_pullup(enum s3c2410_udc_cmd_e cmd) switch (cmd) { case S3C2410_UDC_P_ENABLE : - gpio_set_value(S3C2410_GPC(5), 1); + s3c2410_gpio_setpin(S3C2410_GPC(5), 1); break; case S3C2410_UDC_P_DISABLE : - gpio_set_value(S3C2410_GPC(5), 0); + s3c2410_gpio_setpin(S3C2410_GPC(5), 0); break; case S3C2410_UDC_P_RESET : break; @@ -633,25 +632,25 @@ static void __init mini2440_init(void) mini2440_parse_features(&features, mini2440_features_str); /* turn LCD on */ - s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); + s3c2410_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); /* Turn the backlight early on */ - WARN_ON(gpio_request(S3C2410_GPG(4), "backlight")); - gpio_direction_output(S3C2410_GPG(4), 1); + s3c2410_gpio_setpin(S3C2410_GPG(4), 1); + s3c2410_gpio_cfgpin(S3C2410_GPG(4), S3C2410_GPIO_OUTPUT); /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ - s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); + s3c2410_gpio_pullup(S3C2410_GPB(1), 0); s3c2410_gpio_setpin(S3C2410_GPB(1), 0); - s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT); /* Make sure the D+ pullup pin is output */ - WARN_ON(gpio_request(S3C2410_GPC(5), "udc pup")); - gpio_direction_output(S3C2410_GPC(5), 0); + s3c2410_gpio_cfgpin(S3C2410_GPC(5), S3C2410_GPIO_OUTPUT); /* mark the key as input, without pullups (there is one on the board) */ for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) { - s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(mini2440_buttons[i].gpio, S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(mini2440_buttons[i].gpio, 0); + s3c2410_gpio_cfgpin(mini2440_buttons[i].gpio, + S3C2410_GPIO_INPUT); } if (features.lcd_index != -1) { int li; diff --git a/trunk/arch/arm/mach-s3c2440/mach-nexcoder.c b/trunk/arch/arm/mach-s3c2440/mach-nexcoder.c index 3ff62de45fde..342041593f22 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/trunk/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -40,7 +40,6 @@ #include #include -#include #include #include #include @@ -123,15 +122,15 @@ static void __init nexcoder_sensorboard_init(void) { // Initialize SCCB bus s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL - s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA - s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT); // Power up the sensor board s3c2410_gpio_setpin(S3C2410_GPF(1), 1); - s3c_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN + s3c2410_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN s3c2410_gpio_setpin(S3C2410_GPF(2), 0); - s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN + s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN } static void __init nexcoder_map_io(void) diff --git a/trunk/arch/arm/mach-s3c2440/mach-osiris.c b/trunk/arch/arm/mach-s3c2440/mach-osiris.c index 319458da71a0..f35371db33f5 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-osiris.c +++ b/trunk/arch/arm/mach-s3c2440/mach-osiris.c @@ -49,7 +49,6 @@ #include #include -#include #include #include #include @@ -299,7 +298,7 @@ static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state) /* ensure that an nRESET is not generated on resume. */ s3c2410_gpio_setpin(S3C2410_GPA(21), 1); - s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT); return 0; } @@ -311,7 +310,7 @@ static int osiris_pm_resume(struct sys_device *sd) __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0); - s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); + s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); return 0; } diff --git a/trunk/arch/arm/mach-s3c2440/mach-rx1950.c b/trunk/arch/arm/mach-s3c2440/mach-rx1950.c deleted file mode 100644 index 8603b577a24b..000000000000 --- a/trunk/arch/arm/mach-s3c2440/mach-rx1950.c +++ /dev/null @@ -1,582 +0,0 @@ -/* linux/arch/arm/mach-s3c2440/mach-rx1950.c - * - * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev, - * Copyright (c) 2007-2010 Vasily Khoruzhick - * - * based on smdk2440 written by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define LCD_PWM_PERIOD 192960 -#define LCD_PWM_DUTY 127353 - -static struct map_desc rx1950_iodesc[] __initdata = { -}; - -static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = { - [0] = { - .name = "fclk", - .divisor = 0x0a, - .min_baud = 0, - .max_baud = 0, - }, -}; - -static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - .clocks = rx1950_serial_clocks, - .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x03, - .ufcon = 0x51, - .clocks = rx1950_serial_clocks, - .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), - }, - /* IR port */ - [2] = { - .hwport = 2, - .flags = 0, - .ucon = 0x3c5, - .ulcon = 0x43, - .ufcon = 0xf1, - .clocks = rx1950_serial_clocks, - .clocks_size = ARRAY_SIZE(rx1950_serial_clocks), - }, -}; - -static struct s3c2410fb_display rx1950_display = { - .type = S3C2410_LCDCON1_TFT, - .width = 240, - .height = 320, - .xres = 240, - .yres = 320, - .bpp = 16, - - .pixclock = 260000, - .left_margin = 10, - .right_margin = 20, - .hsync_len = 10, - .upper_margin = 2, - .lower_margin = 2, - .vsync_len = 2, - - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVCLK | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_HWSWP | - (0x02 << 13) | - (0x02 << 15), - -}; - -static struct s3c2410fb_mach_info rx1950_lcd_cfg = { - .displays = &rx1950_display, - .num_displays = 1, - .default_display = 0, - - .lpcsel = 0x02, - .gpccon = 0xaa9556a9, - .gpccon_mask = 0xffc003fc, - .gpcup = 0x0000ffff, - .gpcup_mask = 0xffffffff, - - .gpdcon = 0xaa90aaa1, - .gpdcon_mask = 0xffc0fff0, - .gpdup = 0x0000fcfd, - .gpdup_mask = 0xffffffff, - -}; - -static struct pwm_device *lcd_pwm; - -void rx1950_lcd_power(int enable) -{ - int i; - static int enabled; - if (enabled == enable) - return; - if (!enable) { - - /* GPC11-GPC15->OUTPUT */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPC(i), 1); - - /* Wait a bit here... */ - mdelay(100); - - /* GPD2-GPD7->OUTPUT */ - /* GPD11-GPD15->OUTPUT */ - /* GPD2-GPD7->1, GPD11-GPD15->1 */ - for (i = 2; i < 8; i++) - gpio_direction_output(S3C2410_GPD(i), 1); - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPD(i), 1); - - /* Wait a bit here...*/ - mdelay(100); - - /* GPB0->OUTPUT, GPB0->0 */ - gpio_direction_output(S3C2410_GPB(0), 0); - - /* GPC1-GPC4->OUTPUT, GPC1-4->0 */ - for (i = 1; i < 5; i++) - gpio_direction_output(S3C2410_GPC(i), 0); - - /* GPC15-GPC11->0 */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPC(i), 0); - - /* GPD15-GPD11->0, GPD2->GPD7->0 */ - for (i = 11; i < 16; i++) - gpio_direction_output(S3C2410_GPD(i), 0); - - for (i = 2; i < 8; i++) - gpio_direction_output(S3C2410_GPD(i), 0); - - /* GPC6->0, GPC7->0, GPC5->0 */ - gpio_direction_output(S3C2410_GPC(6), 0); - gpio_direction_output(S3C2410_GPC(7), 0); - gpio_direction_output(S3C2410_GPC(5), 0); - - /* GPB1->OUTPUT, GPB1->0 */ - gpio_direction_output(S3C2410_GPB(1), 0); - pwm_config(lcd_pwm, 0, LCD_PWM_PERIOD); - pwm_disable(lcd_pwm); - - /* GPC0->0, GPC10->0 */ - gpio_direction_output(S3C2410_GPC(0), 0); - gpio_direction_output(S3C2410_GPC(10), 0); - } else { - pwm_config(lcd_pwm, LCD_PWM_DUTY, LCD_PWM_PERIOD); - pwm_enable(lcd_pwm); - - gpio_direction_output(S3C2410_GPC(0), 1); - gpio_direction_output(S3C2410_GPC(5), 1); - - s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPB1_TOUT1); - gpio_direction_output(S3C2410_GPC(7), 1); - - for (i = 1; i < 5; i++) - s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2)); - - for (i = 11; i < 16; i++) - s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2)); - - for (i = 2; i < 8; i++) - s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2)); - - for (i = 11; i < 16; i++) - s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2)); - - gpio_direction_output(S3C2410_GPC(10), 1); - gpio_direction_output(S3C2410_GPC(6), 1); - } - enabled = enable; -} - -static void rx1950_bl_power(int enable) -{ - static int enabled; - if (enabled == enable) - return; - if (!enable) { - gpio_direction_output(S3C2410_GPB(0), 0); - } else { - /* LED driver need a "push" to power on */ - gpio_direction_output(S3C2410_GPB(0), 1); - /* Warm up backlight for one period of PWM. - * Without this trick its almost impossible to - * enable backlight with low brightness value - */ - ndelay(48000); - s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); - } - enabled = enable; -} - -static int rx1950_backlight_init(struct device *dev) -{ - WARN_ON(gpio_request(S3C2410_GPB(0), "Backlight")); - lcd_pwm = pwm_request(1, "RX1950 LCD"); - if (IS_ERR(lcd_pwm)) { - dev_err(dev, "Unable to request PWM for LCD power!\n"); - return PTR_ERR(lcd_pwm); - } - - rx1950_lcd_power(1); - rx1950_bl_power(1); - - return 0; -} - -static void rx1950_backlight_exit(struct device *dev) -{ - rx1950_bl_power(0); - rx1950_lcd_power(0); - - pwm_free(lcd_pwm); - gpio_free(S3C2410_GPB(0)); -} - - -static int rx1950_backlight_notify(struct device *dev, int brightness) -{ - if (!brightness) { - rx1950_bl_power(0); - rx1950_lcd_power(0); - } else { - rx1950_lcd_power(1); - rx1950_bl_power(1); - } - return brightness; -} - -static struct platform_pwm_backlight_data rx1950_backlight_data = { - .pwm_id = 0, - .max_brightness = 24, - .dft_brightness = 4, - .pwm_period_ns = 48000, - .init = rx1950_backlight_init, - .notify = rx1950_backlight_notify, - .exit = rx1950_backlight_exit, -}; - -static struct platform_device rx1950_backlight = { - .name = "pwm-backlight", - .dev = { - .parent = &s3c_device_timer[0].dev, - .platform_data = &rx1950_backlight_data, - }, -}; - -static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd) -{ - switch (power_mode) { - case MMC_POWER_OFF: - gpio_direction_output(S3C2410_GPJ(1), 0); - break; - case MMC_POWER_UP: - case MMC_POWER_ON: - gpio_direction_output(S3C2410_GPJ(1), 1); - break; - default: - break; - } -} - -static struct s3c24xx_mci_pdata rx1950_mmc_cfg __initdata = { - .gpio_detect = S3C2410_GPF(5), - .gpio_wprotect = S3C2410_GPH(8), - .set_power = rx1950_set_mmc_power, - .ocr_avail = MMC_VDD_32_33, -}; - -static struct mtd_partition rx1950_nand_part[] = { - [0] = { - .name = "Boot0", - .offset = 0, - .size = 0x4000, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "Boot1", - .offset = MTDPART_OFS_APPEND, - .size = 0x40000, - .mask_flags = MTD_WRITEABLE, - }, - [2] = { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, - .size = 0x300000, - .mask_flags = 0, - }, - [3] = { - .name = "Filesystem", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static struct s3c2410_nand_set rx1950_nand_sets[] = { - [0] = { - .name = "Internal", - .nr_chips = 1, - .nr_partitions = ARRAY_SIZE(rx1950_nand_part), - .partitions = rx1950_nand_part, - }, -}; - -static struct s3c2410_platform_nand rx1950_nand_info = { - .tacls = 25, - .twrph0 = 50, - .twrph1 = 15, - .nr_sets = ARRAY_SIZE(rx1950_nand_sets), - .sets = rx1950_nand_sets, -}; - -static void rx1950_udc_pullup(enum s3c2410_udc_cmd_e cmd) -{ - switch (cmd) { - case S3C2410_UDC_P_ENABLE: - gpio_direction_output(S3C2410_GPJ(5), 1); - break; - case S3C2410_UDC_P_DISABLE: - gpio_direction_output(S3C2410_GPJ(5), 0); - break; - case S3C2410_UDC_P_RESET: - break; - default: - break; - } -} - -static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = { - .udc_command = rx1950_udc_pullup, - .vbus_pin = S3C2410_GPG(5), - .vbus_pin_inverted = 1, -}; - -static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = { - .delay = 10000, - .presc = 49, - .oversampling_shift = 3, -}; - -static struct gpio_keys_button rx1950_gpio_keys_table[] = { - { - .code = KEY_POWER, - .gpio = S3C2410_GPF(0), - .active_low = 1, - .desc = "Power button", - .wakeup = 1, - }, - { - .code = KEY_F5, - .gpio = S3C2410_GPF(7), - .active_low = 1, - .desc = "Record button", - }, - { - .code = KEY_F1, - .gpio = S3C2410_GPG(0), - .active_low = 1, - .desc = "Calendar button", - }, - { - .code = KEY_F2, - .gpio = S3C2410_GPG(2), - .active_low = 1, - .desc = "Contacts button", - }, - { - .code = KEY_F3, - .gpio = S3C2410_GPG(3), - .active_low = 1, - .desc = "Mail button", - }, - { - .code = KEY_F4, - .gpio = S3C2410_GPG(7), - .active_low = 1, - .desc = "WLAN button", - }, - { - .code = KEY_LEFT, - .gpio = S3C2410_GPG(10), - .active_low = 1, - .desc = "Left button", - }, - { - .code = KEY_RIGHT, - .gpio = S3C2410_GPG(11), - .active_low = 1, - .desc = "Right button", - }, - { - .code = KEY_UP, - .gpio = S3C2410_GPG(4), - .active_low = 1, - .desc = "Up button", - }, - { - .code = KEY_DOWN, - .gpio = S3C2410_GPG(6), - .active_low = 1, - .desc = "Down button", - }, - { - .code = KEY_ENTER, - .gpio = S3C2410_GPG(9), - .active_low = 1, - .desc = "Ok button" - }, -}; - -static struct gpio_keys_platform_data rx1950_gpio_keys_data = { - .buttons = rx1950_gpio_keys_table, - .nbuttons = ARRAY_SIZE(rx1950_gpio_keys_table), -}; - -static struct platform_device rx1950_device_gpiokeys = { - .name = "gpio-keys", - .dev.platform_data = &rx1950_gpio_keys_data, -}; - -static struct s3c2410_platform_i2c rx1950_i2c_data = { - .flags = 0, - .slave_addr = 0x42, - .frequency = 400 * 1000, - .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, -}; - -static struct platform_device *rx1950_devices[] __initdata = { - &s3c_device_lcd, - &s3c_device_wdt, - &s3c_device_i2c0, - &s3c_device_iis, - &s3c_device_usbgadget, - &s3c_device_rtc, - &s3c_device_nand, - &s3c_device_sdi, - &s3c_device_adc, - &s3c_device_ts, - &s3c_device_timer[0], - &s3c_device_timer[1], - &rx1950_backlight, - &rx1950_device_gpiokeys, -}; - -static struct clk *rx1950_clocks[] __initdata = { - &s3c24xx_clkout0, - &s3c24xx_clkout1, -}; - -static void __init rx1950_map_io(void) -{ - s3c24xx_clkout0.parent = &clk_h; - s3c24xx_clkout1.parent = &clk_f; - - s3c24xx_register_clocks(rx1950_clocks, ARRAY_SIZE(rx1950_clocks)); - - s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc)); - s3c24xx_init_clocks(16934000); - s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs)); - - /* setup PM */ - -#ifdef CONFIG_PM_H1940 - memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 8); -#endif - - s3c_pm_init(); -} - -static void __init rx1950_init_machine(void) -{ - int i; - - s3c24xx_fb_set_platdata(&rx1950_lcd_cfg); - s3c24xx_udc_set_platdata(&rx1950_udc_cfg); - s3c24xx_ts_set_platdata(&rx1950_ts_cfg); - s3c24xx_mci_set_platdata(&rx1950_mmc_cfg); - s3c_i2c0_set_platdata(&rx1950_i2c_data); - s3c_nand_set_platdata(&rx1950_nand_info); - - /* Turn off suspend on both USB ports, and switch the - * selectable USB port to USB device mode. */ - s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | - S3C2410_MISCCR_USBSUSPND0 | - S3C2410_MISCCR_USBSUSPND1, 0x0); - - WARN_ON(gpio_request(S3C2410_GPJ(5), "UDC pullup")); - gpio_direction_output(S3C2410_GPJ(5), 0); - - /* mmc power is disabled by default */ - WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power")); - gpio_direction_output(S3C2410_GPJ(1), 0); - - for (i = 0; i < 8; i++) - WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power")); - - for (i = 10; i < 16; i++) - WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power")); - - for (i = 2; i < 8; i++) - WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power")); - - for (i = 11; i < 16; i++) - WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power")); - - WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); - - platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); -} - -MACHINE_START(RX1950, "HP iPAQ RX1950") - /* Maintainers: Vasily Khoruzhick */ - .phys_io = S3C2410_PA_UART, - .io_pg_offst = (((u32) S3C24XX_VA_UART) >> 18) & 0xfffc, - .boot_params = S3C2410_SDRAM_PA + 0x100, - .map_io = rx1950_map_io, - .init_irq = s3c24xx_init_irq, - .init_machine = rx1950_init_machine, - .timer = &s3c24xx_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c index d2946de3f365..1e836e506f8b 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c @@ -209,7 +209,7 @@ static void __init rx3715_init_machine(void) } MACHINE_START(RX3715, "IPAQ-RX3715") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c2440/mach-smdk2440.c b/trunk/arch/arm/mach-s3c2440/mach-smdk2440.c index df83276d85ae..3ac3d636d615 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/trunk/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -174,7 +174,7 @@ static void __init smdk2440_machine_init(void) } MACHINE_START(S3C2440, "SMDK2440") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c2440/s3c2440.c b/trunk/arch/arm/mach-s3c2440/s3c2440.c index d50f3ae6173d..2b68f7ea45ae 100644 --- a/trunk/arch/arm/mach-s3c2440/s3c2440.c +++ b/trunk/arch/arm/mach-s3c2440/s3c2440.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include @@ -34,10 +33,6 @@ #include #include -#include -#include -#include - static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, }; @@ -46,9 +41,6 @@ int __init s3c2440_init(void) { printk("S3C2440: Initialising architecture\n"); - s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up; - s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up; - /* change irq for watchdog */ s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; diff --git a/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c b/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c index 4c863d3a52f4..e2e362bda9b7 100644 --- a/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -131,7 +131,7 @@ static void __init smdk2443_machine_init(void) } MACHINE_START(SMDK2443, "SMDK2443") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C2410_PA_UART, .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, .boot_params = S3C2410_SDRAM_PA + 0x100, diff --git a/trunk/arch/arm/mach-s3c64xx/dma.c b/trunk/arch/arm/mach-s3c64xx/dma.c index 5567e037b0d1..33ccf7bf766a 100644 --- a/trunk/arch/arm/mach-s3c64xx/dma.c +++ b/trunk/arch/arm/mach-s3c64xx/dma.c @@ -414,7 +414,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, EXPORT_SYMBOL(s3c2410_dma_enqueue); -int s3c2410_dma_devconfig(unsigned int channel, +int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, unsigned long devaddr) { diff --git a/trunk/arch/arm/mach-s3c64xx/gpiolib.c b/trunk/arch/arm/mach-s3c64xx/gpiolib.c index 60c929a3cab6..66e6794481d2 100644 --- a/trunk/arch/arm/mach-s3c64xx/gpiolib.c +++ b/trunk/arch/arm/mach-s3c64xx/gpiolib.c @@ -51,7 +51,6 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, }; @@ -59,14 +58,12 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_noint = { static struct s3c_gpio_cfg gpio_4bit_cfg_eint0111 = { .cfg_eint = 7, .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, }; static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = { .cfg_eint = 3, - .get_config = s3c_gpio_getcfg_s3c64xx_4bit, .set_config = s3c_gpio_setcfg_s3c64xx_4bit, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, @@ -174,7 +171,6 @@ static struct s3c_gpio_chip gpio_4bit2[] = { static struct s3c_gpio_cfg gpio_2bit_cfg_noint = { .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, }; @@ -182,7 +178,6 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_noint = { static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = { .cfg_eint = 2, .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, }; @@ -190,7 +185,6 @@ static struct s3c_gpio_cfg gpio_2bit_cfg_eint10 = { static struct s3c_gpio_cfg gpio_2bit_cfg_eint11 = { .cfg_eint = 3, .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, .set_pull = s3c_gpio_setpull_updown, .get_pull = s3c_gpio_getpull_updown, }; diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/trunk/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index 3ef62741e5d1..0114eb0c1fe7 100644 --- a/trunk/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/regs-clock.h @@ -33,6 +33,7 @@ #define S3C_PCLK_GATE S3C_CLKREG(0x34) #define S3C_SCLK_GATE S3C_CLKREG(0x38) #define S3C_MEM0_GATE S3C_CLKREG(0x3C) +#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) /* CLKDIV0 */ #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) diff --git a/trunk/arch/arm/mach-s3c64xx/mach-smdk6400.c b/trunk/arch/arm/mach-s3c64xx/mach-smdk6400.c index 59916676d8d2..f7b18983950c 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-smdk6400.c @@ -84,7 +84,7 @@ static void __init smdk6400_machine_init(void) } MACHINE_START(SMDK6400, "SMDK6400") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C_PA_UART & 0xfff00000, .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, diff --git a/trunk/arch/arm/mach-s3c64xx/mach-smdk6410.c b/trunk/arch/arm/mach-s3c64xx/mach-smdk6410.c index 9d51455feb31..2d5afd221d77 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -656,7 +656,7 @@ static void __init smdk6410_machine_init(void) } MACHINE_START(SMDK6410, "SMDK6410") - /* Maintainer: Ben Dooks */ + /* Maintainer: Ben Dooks */ .phys_io = S3C_PA_UART & 0xfff00000, .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, .boot_params = S3C64XX_PA_SDRAM + 0x100, diff --git a/trunk/arch/arm/mach-s5p6440/cpu.c b/trunk/arch/arm/mach-s5p6440/cpu.c index ca3b3206e6f8..1794131aeacb 100644 --- a/trunk/arch/arm/mach-s5p6440/cpu.c +++ b/trunk/arch/arm/mach-s5p6440/cpu.c @@ -88,7 +88,7 @@ void __init s5p6440_init_irq(void) s5p_init_irq(vic, ARRAY_SIZE(vic)); } -struct sysdev_class s5p6440_sysclass = { +static struct sysdev_class s5p6440_sysclass = { .name = "s5p6440-core", }; diff --git a/trunk/arch/arm/mach-s5p6440/gpio.c b/trunk/arch/arm/mach-s5p6440/gpio.c index 262dc75d5bea..b0ea741177ad 100644 --- a/trunk/arch/arm/mach-s5p6440/gpio.c +++ b/trunk/arch/arm/mach-s5p6440/gpio.c @@ -161,15 +161,12 @@ static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = { }, { .cfg_eint = 0, .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, }, { .cfg_eint = 2, .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, }, { .cfg_eint = 3, .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, }, }; @@ -282,8 +279,6 @@ void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) for (; nr_chips > 0; nr_chips--, chipcfg++) { if (!chipcfg->set_config) chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit; - if (!chipcfg->get_config) - chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit; if (!chipcfg->set_pull) chipcfg->set_pull = s3c_gpio_setpull_updown; if (!chipcfg->get_pull) diff --git a/trunk/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/trunk/arch/arm/mach-s5p6440/include/mach/pwm-clock.h index 6a2a02fdf12a..c4bb7c555477 100644 --- a/trunk/arch/arm/mach-s5p6440/include/mach/pwm-clock.h +++ b/trunk/arch/arm/mach-s5p6440/include/mach/pwm-clock.h @@ -1,14 +1,11 @@ /* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks * http://armlinux.simtec.co.uk/ * - * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h + * Copyright 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ * * S5P6440 - pwm clock and timer support * @@ -17,19 +14,16 @@ * published by the Free Software Foundation. */ -#ifndef __ASM_ARCH_PWMCLK_H -#define __ASM_ARCH_PWMCLK_H __FILE__ - /** * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. + * @cfg: The timer TCFG1 register bits shifted down to 0. * * Return true if the given configuration from TCFG1 is a TCLK instead * any of the TDIV clocks. */ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) { - return 0; + return tcfg == S3C2410_TCFG1_MUX_TCLK; } /** @@ -41,7 +35,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) */ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) { - return 1 << tcfg1; + return 1 << (1 + tcfg1); } /** @@ -51,7 +45,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) */ static inline unsigned int pwm_tdiv_has_div1(void) { - return 1; + return 0; } /** @@ -62,9 +56,7 @@ static inline unsigned int pwm_tdiv_has_div1(void) */ static inline unsigned long pwm_tdiv_div_bits(unsigned int div) { - return ilog2(div); + return ilog2(div) - 1; } -#define S3C_TCFG1_MUX_TCLK 0 - -#endif /* __ASM_ARCH_PWMCLK_H */ +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK diff --git a/trunk/arch/arm/mach-s5p6442/cpu.c b/trunk/arch/arm/mach-s5p6442/cpu.c index a48fb553fd01..bc2524df89b3 100644 --- a/trunk/arch/arm/mach-s5p6442/cpu.c +++ b/trunk/arch/arm/mach-s5p6442/cpu.c @@ -95,7 +95,7 @@ void __init s5p6442_init_irq(void) s5p_init_irq(vic, ARRAY_SIZE(vic)); } -struct sysdev_class s5p6442_sysclass = { +static struct sysdev_class s5p6442_sysclass = { .name = "s5p6442-core", }; diff --git a/trunk/arch/arm/mach-s5p6442/include/mach/pwm-clock.h b/trunk/arch/arm/mach-s5p6442/include/mach/pwm-clock.h index 2724b37def31..15e8525da0f1 100644 --- a/trunk/arch/arm/mach-s5p6442/include/mach/pwm-clock.h +++ b/trunk/arch/arm/mach-s5p6442/include/mach/pwm-clock.h @@ -1,14 +1,13 @@ /* linux/arch/arm/mach-s5p6442/include/mach/pwm-clock.h * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks * http://armlinux.simtec.co.uk/ * - * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h + * Copyright 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h * * S5P6442 - pwm clock and timer support * @@ -22,14 +21,14 @@ /** * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. + * @cfg: The timer TCFG1 register bits shifted down to 0. * * Return true if the given configuration from TCFG1 is a TCLK instead * any of the TDIV clocks. */ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) { - return tcfg == S3C64XX_TCFG1_MUX_TCLK; + return tcfg == S3C2410_TCFG1_MUX_TCLK; } /** @@ -41,7 +40,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) */ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) { - return 1 << tcfg1; + return 1 << (1 + tcfg1); } /** @@ -51,7 +50,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) */ static inline unsigned int pwm_tdiv_has_div1(void) { - return 1; + return 0; } /** @@ -62,9 +61,9 @@ static inline unsigned int pwm_tdiv_has_div1(void) */ static inline unsigned long pwm_tdiv_div_bits(unsigned int div) { - return ilog2(div); + return ilog2(div) - 1; } -#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK #endif /* __ASM_ARCH_PWMCLK_H */ diff --git a/trunk/arch/arm/mach-s5pv210/Makefile b/trunk/arch/arm/mach-s5pv210/Makefile index 0acbdb34b560..8ebf51c52a01 100644 --- a/trunk/arch/arm/mach-s5pv210/Makefile +++ b/trunk/arch/arm/mach-s5pv210/Makefile @@ -12,7 +12,7 @@ obj- := # Core support for S5PV210 system -obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o gpiolib.o +obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o # machine support diff --git a/trunk/arch/arm/mach-s5pv210/cpu.c b/trunk/arch/arm/mach-s5pv210/cpu.c index 2b776eb5d150..0e0f8fde2aa6 100644 --- a/trunk/arch/arm/mach-s5pv210/cpu.c +++ b/trunk/arch/arm/mach-s5pv210/cpu.c @@ -100,7 +100,7 @@ void __init s5pv210_init_irq(void) s5p_init_irq(vic, ARRAY_SIZE(vic)); } -struct sysdev_class s5pv210_sysclass = { +static struct sysdev_class s5pv210_sysclass = { .name = "s5pv210-core", }; diff --git a/trunk/arch/arm/mach-s5pv210/gpiolib.c b/trunk/arch/arm/mach-s5pv210/gpiolib.c deleted file mode 100644 index 9ea8972e023d..000000000000 --- a/trunk/arch/arm/mach-s5pv210/gpiolib.c +++ /dev/null @@ -1,261 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/gpiolib.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - GPIOlib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static struct s3c_gpio_cfg gpio_cfg = { - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -static struct s3c_gpio_cfg gpio_cfg_noint = { - .set_config = s3c_gpio_setcfg_s3c64xx_4bit, - .set_pull = s3c_gpio_setpull_updown, - .get_pull = s3c_gpio_getpull_updown, -}; - -/* GPIO bank's base address given the index of the bank in the - * list of all gpio banks. - */ -#define S5PV210_BANK_BASE(bank_nr) (S5P_VA_GPIO + ((bank_nr) * 0x20)) - -/* - * Following are the gpio banks in v210. - * - * The 'config' member when left to NULL, is initialized to the default - * structure gpio_cfg in the init function below. - * - * The 'base' member is also initialized in the init function below. - * Note: The initialization of 'base' member of s3c_gpio_chip structure - * uses the above macro and depends on the banks being listed in order here. - */ -static struct s3c_gpio_chip s5pv210_gpio_4bit[] = { - { - .chip = { - .base = S5PV210_GPA0(0), - .ngpio = S5PV210_GPIO_A0_NR, - .label = "GPA0", - }, - }, { - .chip = { - .base = S5PV210_GPA1(0), - .ngpio = S5PV210_GPIO_A1_NR, - .label = "GPA1", - }, - }, { - .chip = { - .base = S5PV210_GPB(0), - .ngpio = S5PV210_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5PV210_GPC0(0), - .ngpio = S5PV210_GPIO_C0_NR, - .label = "GPC0", - }, - }, { - .chip = { - .base = S5PV210_GPC1(0), - .ngpio = S5PV210_GPIO_C1_NR, - .label = "GPC1", - }, - }, { - .chip = { - .base = S5PV210_GPD0(0), - .ngpio = S5PV210_GPIO_D0_NR, - .label = "GPD0", - }, - }, { - .chip = { - .base = S5PV210_GPD1(0), - .ngpio = S5PV210_GPIO_D1_NR, - .label = "GPD1", - }, - }, { - .chip = { - .base = S5PV210_GPE0(0), - .ngpio = S5PV210_GPIO_E0_NR, - .label = "GPE0", - }, - }, { - .chip = { - .base = S5PV210_GPE1(0), - .ngpio = S5PV210_GPIO_E1_NR, - .label = "GPE1", - }, - }, { - .chip = { - .base = S5PV210_GPF0(0), - .ngpio = S5PV210_GPIO_F0_NR, - .label = "GPF0", - }, - }, { - .chip = { - .base = S5PV210_GPF1(0), - .ngpio = S5PV210_GPIO_F1_NR, - .label = "GPF1", - }, - }, { - .chip = { - .base = S5PV210_GPF2(0), - .ngpio = S5PV210_GPIO_F2_NR, - .label = "GPF2", - }, - }, { - .chip = { - .base = S5PV210_GPF3(0), - .ngpio = S5PV210_GPIO_F3_NR, - .label = "GPF3", - }, - }, { - .chip = { - .base = S5PV210_GPG0(0), - .ngpio = S5PV210_GPIO_G0_NR, - .label = "GPG0", - }, - }, { - .chip = { - .base = S5PV210_GPG1(0), - .ngpio = S5PV210_GPIO_G1_NR, - .label = "GPG1", - }, - }, { - .chip = { - .base = S5PV210_GPG2(0), - .ngpio = S5PV210_GPIO_G2_NR, - .label = "GPG2", - }, - }, { - .chip = { - .base = S5PV210_GPG3(0), - .ngpio = S5PV210_GPIO_G3_NR, - .label = "GPG3", - }, - }, { - .chip = { - .base = S5PV210_GPI(0), - .ngpio = S5PV210_GPIO_I_NR, - .label = "GPI", - }, - }, { - .chip = { - .base = S5PV210_GPJ0(0), - .ngpio = S5PV210_GPIO_J0_NR, - .label = "GPJ0", - }, - }, { - .chip = { - .base = S5PV210_GPJ1(0), - .ngpio = S5PV210_GPIO_J1_NR, - .label = "GPJ1", - }, - }, { - .chip = { - .base = S5PV210_GPJ2(0), - .ngpio = S5PV210_GPIO_J2_NR, - .label = "GPJ2", - }, - }, { - .chip = { - .base = S5PV210_GPJ3(0), - .ngpio = S5PV210_GPIO_J3_NR, - .label = "GPJ3", - }, - }, { - .chip = { - .base = S5PV210_GPJ4(0), - .ngpio = S5PV210_GPIO_J4_NR, - .label = "GPJ4", - }, - }, { - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_MP01(0), - .ngpio = S5PV210_GPIO_MP01_NR, - .label = "MP01", - }, - }, { - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_MP02(0), - .ngpio = S5PV210_GPIO_MP02_NR, - .label = "MP02", - }, - }, { - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_MP03(0), - .ngpio = S5PV210_GPIO_MP03_NR, - .label = "MP03", - }, - }, { - .base = (S5P_VA_GPIO + 0xC00), - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_GPH0(0), - .ngpio = S5PV210_GPIO_H0_NR, - .label = "GPH0", - }, - }, { - .base = (S5P_VA_GPIO + 0xC20), - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_GPH1(0), - .ngpio = S5PV210_GPIO_H1_NR, - .label = "GPH1", - }, - }, { - .base = (S5P_VA_GPIO + 0xC40), - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_GPH2(0), - .ngpio = S5PV210_GPIO_H2_NR, - .label = "GPH2", - }, - }, { - .base = (S5P_VA_GPIO + 0xC60), - .config = &gpio_cfg_noint, - .chip = { - .base = S5PV210_GPH3(0), - .ngpio = S5PV210_GPIO_H3_NR, - .label = "GPH3", - }, - }, -}; - -static __init int s5pv210_gpiolib_init(void) -{ - struct s3c_gpio_chip *chip = s5pv210_gpio_4bit; - int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit); - int i = 0; - - for (i = 0; i < nr_chips; i++, chip++) { - if (chip->config == NULL) - chip->config = &gpio_cfg; - if (chip->base == NULL) - chip->base = S5PV210_BANK_BASE(i); - } - - samsung_gpiolib_add_4bit_chips(s5pv210_gpio_4bit, nr_chips); - - return 0; -} -core_initcall(s5pv210_gpiolib_init); diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/gpio.h b/trunk/arch/arm/mach-s5pv210/include/mach/gpio.h index d6461ba2b71d..533b020e21e9 100644 --- a/trunk/arch/arm/mach-s5pv210/include/mach/gpio.h +++ b/trunk/arch/arm/mach-s5pv210/include/mach/gpio.h @@ -18,8 +18,6 @@ #define gpio_cansleep __gpio_cansleep #define gpio_to_irq __gpio_to_irq -/* Practically, GPIO banks upto MP03 are the configurable gpio banks */ - /* GPIO bank sizes */ #define S5PV210_GPIO_A0_NR (8) #define S5PV210_GPIO_A1_NR (4) @@ -49,10 +47,6 @@ #define S5PV210_GPIO_J3_NR (8) #define S5PV210_GPIO_J4_NR (5) -#define S5PV210_GPIO_MP01_NR (8) -#define S5PV210_GPIO_MP02_NR (4) -#define S5PV210_GPIO_MP03_NR (8) - /* GPIO bank numbers */ /* CONFIG_S3C_GPIO_SPACE allows the user to select extra @@ -91,9 +85,6 @@ enum s5p_gpio_number { S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), - S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), - S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), - S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), }; /* S5PV210 GPIO number definitions */ @@ -124,16 +115,13 @@ enum s5p_gpio_number { #define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) #define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) #define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) -#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) -#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) -#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) /* the end of the S5PV210 specific gpios */ -#define S5PV210_GPIO_END (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + 1) +#define S5PV210_GPIO_END (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + 1) #define S3C_GPIO_END S5PV210_GPIO_END -/* define the number of gpios we need to the one after the MP03() range */ -#define ARCH_NR_GPIOS (S5PV210_MP03(S5PV210_GPIO_MP03_NR) + \ +/* define the number of gpios we need to the one after the GPJ4() range */ +#define ARCH_NR_GPIOS (S5PV210_GPJ4(S5PV210_GPIO_J4_NR) + \ CONFIG_SAMSUNG_GPIO_EXTRA + 1) #include diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/pwm-clock.h b/trunk/arch/arm/mach-s5pv210/include/mach/pwm-clock.h index f8a9f1b330e0..69027fea987a 100644 --- a/trunk/arch/arm/mach-s5pv210/include/mach/pwm-clock.h +++ b/trunk/arch/arm/mach-s5pv210/include/mach/pwm-clock.h @@ -1,14 +1,13 @@ /* linux/arch/arm/mach-s5pv210/include/mach/pwm-clock.h * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks * http://armlinux.simtec.co.uk/ * - * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h + * Copyright (c) 2009 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Based on arch/arm/plat-s3c24xx/include/mach/pwm-clock.h * * S5PV210 - pwm clock and timer support * @@ -22,14 +21,14 @@ /** * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. + * @cfg: The timer TCFG1 register bits shifted down to 0. * * Return true if the given configuration from TCFG1 is a TCLK instead * any of the TDIV clocks. */ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) { - return tcfg == S3C64XX_TCFG1_MUX_TCLK; + return tcfg == S3C2410_TCFG1_MUX_TCLK; } /** @@ -41,7 +40,7 @@ static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) */ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) { - return 1 << tcfg1; + return 1 << (1 + tcfg1); } /** @@ -51,7 +50,7 @@ static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) */ static inline unsigned int pwm_tdiv_has_div1(void) { - return 1; + return 0; } /** @@ -62,9 +61,9 @@ static inline unsigned int pwm_tdiv_has_div1(void) */ static inline unsigned long pwm_tdiv_div_bits(unsigned int div) { - return ilog2(div); + return ilog2(div) - 1; } -#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK +#define S3C_TCFG1_MUX_TCLK S3C2410_TCFG1_MUX_TCLK #endif /* __ASM_ARCH_PWMCLK_H */ diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index 45a1bc275f0a..241c24a1c18f 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -869,10 +869,9 @@ void __init reserve_node_zero(pg_data_t *pgdat) if (machine_is_p720t()) res_size = 0x00014000; - /* H1940, RX3715 and RX1950 need to reserve this for suspend */ + /* H1940 and RX3715 need to reserve this for suspend */ - if (machine_is_h1940() || machine_is_rx3715() - || machine_is_rx1950()) { + if (machine_is_h1940() || machine_is_rx3715()) { reserve_bootmem_node(pgdat, 0x30003000, 0x1000, BOOTMEM_DEFAULT); reserve_bootmem_node(pgdat, 0x30081000, 0x1000, diff --git a/trunk/arch/arm/plat-s3c24xx/Kconfig b/trunk/arch/arm/plat-s3c24xx/Kconfig index a830fad6f89e..6e93ef8f3d43 100644 --- a/trunk/arch/arm/plat-s3c24xx/Kconfig +++ b/trunk/arch/arm/plat-s3c24xx/Kconfig @@ -9,7 +9,6 @@ config PLAT_S3C24XX select NO_IOPORT select ARCH_REQUIRE_GPIOLIB select S3C_DEVICE_NAND - select S3C_GPIO_CFG_S3C24XX help Base platform code for any Samsung S3C24XX device diff --git a/trunk/arch/arm/plat-s3c24xx/common-smdk.c b/trunk/arch/arm/plat-s3c24xx/common-smdk.c index 7b44d0c592b5..9e0e20ad2e46 100644 --- a/trunk/arch/arm/plat-s3c24xx/common-smdk.c +++ b/trunk/arch/arm/plat-s3c24xx/common-smdk.c @@ -42,7 +42,6 @@ #include #include -#include #include #include @@ -186,10 +185,10 @@ void __init smdk_machine_init(void) { /* Configure the LEDs (even if we have no LED support)*/ - s3c_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); - s3c_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); - s3c_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); - s3c_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPF(4), 1); s3c2410_gpio_setpin(S3C2410_GPF(5), 1); diff --git a/trunk/arch/arm/plat-s3c24xx/devs.c b/trunk/arch/arm/plat-s3c24xx/devs.c index cd5b41d0b5a4..9265f09bfa58 100644 --- a/trunk/arch/arm/plat-s3c24xx/devs.c +++ b/trunk/arch/arm/plat-s3c24xx/devs.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include @@ -150,14 +149,10 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) { struct s3c2410fb_mach_info *npd; - npd = kmemdup(pd, sizeof(*npd), GFP_KERNEL); + npd = kmalloc(sizeof(*npd), GFP_KERNEL); if (npd) { + memcpy(npd, pd, sizeof(*npd)); s3c_device_lcd.dev.platform_data = npd; - npd->displays = kmemdup(pd->displays, - sizeof(struct s3c2410fb_display) * npd->num_displays, - GFP_KERNEL); - if (!npd->displays) - printk(KERN_ERR "no memory for LCD display data\n"); } else { printk(KERN_ERR "no memory for LCD platform data\n"); } @@ -343,6 +338,14 @@ struct platform_device s3c_device_adc = { .resource = s3c_adc_resource, }; +/* HWMON */ + +struct platform_device s3c_device_hwmon = { + .name = "s3c-hwmon", + .id = -1, + .dev.parent = &s3c_device_adc.dev, +}; + /* SDI */ static struct resource s3c_sdi_resource[] = { @@ -368,7 +371,7 @@ struct platform_device s3c_device_sdi = { EXPORT_SYMBOL(s3c_device_sdi); -void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) +void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) { struct s3c24xx_mci_pdata *npd; diff --git a/trunk/arch/arm/plat-s3c24xx/dma.c b/trunk/arch/arm/plat-s3c24xx/dma.c index 6ad274e7593d..93827b3d4e84 100644 --- a/trunk/arch/arm/plat-s3c24xx/dma.c +++ b/trunk/arch/arm/plat-s3c24xx/dma.c @@ -1104,7 +1104,7 @@ EXPORT_SYMBOL(s3c2410_dma_config); * devaddr: physical address of the source */ -int s3c2410_dma_devconfig(unsigned int channel, +int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, unsigned long devaddr) { diff --git a/trunk/arch/arm/plat-s3c24xx/gpio.c b/trunk/arch/arm/plat-s3c24xx/gpio.c index 2f3d7c089dfa..5467470badfd 100644 --- a/trunk/arch/arm/plat-s3c24xx/gpio.c +++ b/trunk/arch/arm/plat-s3c24xx/gpio.c @@ -1,6 +1,6 @@ /* linux/arch/arm/plat-s3c24xx/gpio.c * - * Copyright (c) 2004-2010 Simtec Electronics + * Copyright (c) 2004-2005 Simtec Electronics * Ben Dooks * * S3C24XX GPIO support @@ -20,12 +20,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + #include #include #include #include #include -#include #include #include @@ -34,46 +34,133 @@ #include -#include +void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long mask; + unsigned long con; + unsigned long flags; -/* gpiolib wrappers until these are totally eliminated */ + if (pin < S3C2410_GPIO_BANKB) { + mask = 1 << S3C2410_GPIO_OFFSET(pin); + } else { + mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; + } -void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) -{ - int ret; + switch (function) { + case S3C2410_GPIO_LEAVE: + mask = 0; + function = 0; + break; + + case S3C2410_GPIO_INPUT: + case S3C2410_GPIO_OUTPUT: + case S3C2410_GPIO_SFN2: + case S3C2410_GPIO_SFN3: + if (pin < S3C2410_GPIO_BANKB) { + function -= 1; + function &= 1; + function <<= S3C2410_GPIO_OFFSET(pin); + } else { + function &= 3; + function <<= S3C2410_GPIO_OFFSET(pin)*2; + } + } + + /* modify the specified register wwith IRQs off */ + + local_irq_save(flags); - WARN_ON(to); /* should be none of these left */ + con = __raw_readl(base + 0x00); + con &= ~mask; + con |= function; - if (!to) { - /* if pull is enabled, try first with up, and if that - * fails, try using down */ + __raw_writel(con, base + 0x00); - ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP); - if (ret) - s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN); + local_irq_restore(flags); +} + +EXPORT_SYMBOL(s3c2410_gpio_cfgpin); + +unsigned int s3c2410_gpio_getcfg(unsigned int pin) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long val = __raw_readl(base); + + if (pin < S3C2410_GPIO_BANKB) { + val >>= S3C2410_GPIO_OFFSET(pin); + val &= 1; + val += 1; } else { - s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE); + val >>= S3C2410_GPIO_OFFSET(pin)*2; + val &= 3; } + + return val | S3C2410_GPIO_INPUT; +} + +EXPORT_SYMBOL(s3c2410_gpio_getcfg); + +void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); + unsigned long flags; + unsigned long up; + + if (pin < S3C2410_GPIO_BANKB) + return; + + local_irq_save(flags); + + up = __raw_readl(base + 0x08); + up &= ~(1L << offs); + up |= to << offs; + __raw_writel(up, base + 0x08); + + local_irq_restore(flags); } + EXPORT_SYMBOL(s3c2410_gpio_pullup); +int s3c2410_gpio_getpull(unsigned int pin) +{ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); + + if (pin < S3C2410_GPIO_BANKB) + return -EINVAL; + + return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0; +} + +EXPORT_SYMBOL(s3c2410_gpio_getpull); + void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) { - /* do this via gpiolib until all users removed */ + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); + unsigned long flags; + unsigned long dat; - gpio_request(pin, "temporary"); - gpio_set_value(pin, to); - gpio_free(pin); + local_irq_save(flags); + + dat = __raw_readl(base + 0x04); + dat &= ~(1 << offs); + dat |= to << offs; + __raw_writel(dat, base + 0x04); + + local_irq_restore(flags); } EXPORT_SYMBOL(s3c2410_gpio_setpin); unsigned int s3c2410_gpio_getpin(unsigned int pin) { - struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); - unsigned long offs = pin - chip->chip.base; + void __iomem *base = S3C24XX_GPIO_BASE(pin); + unsigned long offs = S3C2410_GPIO_OFFSET(pin); - return __raw_readl(chip->base + 0x04) & (1<< offs); + return __raw_readl(base + 0x04) & (1<< offs); } EXPORT_SYMBOL(s3c2410_gpio_getpin); @@ -94,3 +181,22 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) } EXPORT_SYMBOL(s3c2410_modify_misccr); + +int s3c2410_gpio_getirq(unsigned int pin) +{ + if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15)) + return -EINVAL; /* not valid interrupts */ + + if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7)) + return -EINVAL; /* not valid pin */ + + if (pin < S3C2410_GPF(4)) + return (pin - S3C2410_GPF(0)) + IRQ_EINT0; + + if (pin < S3C2410_GPG(0)) + return (pin - S3C2410_GPF(4)) + IRQ_EINT4; + + return (pin - S3C2410_GPG(0)) + IRQ_EINT8; +} + +EXPORT_SYMBOL(s3c2410_gpio_getirq); diff --git a/trunk/arch/arm/plat-s3c24xx/gpiolib.c b/trunk/arch/arm/plat-s3c24xx/gpiolib.c index 4c0896f2572d..4f0f11a6a677 100644 --- a/trunk/arch/arm/plat-s3c24xx/gpiolib.c +++ b/trunk/arch/arm/plat-s3c24xx/gpiolib.c @@ -1,6 +1,6 @@ /* linux/arch/arm/plat-s3c24xx/gpiolib.c * - * Copyright (c) 2008-2010 Simtec Electronics + * Copyright (c) 2008 Simtec Electronics * http://armlinux.simtec.co.uk/ * Ben Dooks * @@ -21,8 +21,6 @@ #include #include -#include -#include #include #include #include @@ -79,21 +77,10 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) return IRQ_EINT8 + offset; } -static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { - .set_config = s3c_gpio_setcfg_s3c24xx_a, - .get_config = s3c_gpio_getcfg_s3c24xx_a, -}; - -struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { - .set_config = s3c_gpio_setcfg_s3c24xx, - .get_config = s3c_gpio_getcfg_s3c24xx, -}; - struct s3c_gpio_chip s3c24xx_gpios[] = { [0] = { .base = S3C2410_GPACON, .pm = __gpio_pm(&s3c_gpio_pm_1bit), - .config = &s3c24xx_gpiocfg_banka, .chip = { .base = S3C2410_GPA(0), .owner = THIS_MODULE, @@ -174,58 +161,15 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .ngpio = 11, }, }, - /* GPIOS for the S3C2443 and later devices. */ - { - .base = S3C2440_GPJCON, - .pm = __gpio_pm(&s3c_gpio_pm_2bit), - .chip = { - .base = S3C2410_GPJ(0), - .owner = THIS_MODULE, - .label = "GPIOJ", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPKCON, - .pm = __gpio_pm(&s3c_gpio_pm_2bit), - .chip = { - .base = S3C2410_GPK(0), - .owner = THIS_MODULE, - .label = "GPIOK", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPLCON, - .pm = __gpio_pm(&s3c_gpio_pm_2bit), - .chip = { - .base = S3C2410_GPL(0), - .owner = THIS_MODULE, - .label = "GPIOL", - .ngpio = 15, - }, - }, { - .base = S3C2443_GPMCON, - .pm = __gpio_pm(&s3c_gpio_pm_2bit), - .chip = { - .base = S3C2410_GPM(0), - .owner = THIS_MODULE, - .label = "GPIOM", - .ngpio = 2, - }, - }, }; - static __init int s3c24xx_gpiolib_init(void) { struct s3c_gpio_chip *chip = s3c24xx_gpios; int gpn; - for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) { - if (!chip->config) - chip->config = &s3c24xx_gpiocfg_default; - + for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) s3c_gpiolib_add(chip); - } return 0; } diff --git a/trunk/arch/arm/plat-s3c24xx/pm.c b/trunk/arch/arm/plat-s3c24xx/pm.c index 60627e63a254..3620dd299095 100644 --- a/trunk/arch/arm/plat-s3c24xx/pm.c +++ b/trunk/arch/arm/plat-s3c24xx/pm.c @@ -43,7 +43,6 @@ #include -#include #include #define PFX "s3c24xx-pm: " @@ -91,22 +90,22 @@ static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) { unsigned long irqstate; unsigned long pinstate; - int irq = gpio_to_irq(pin); + int irq = s3c2410_gpio_getirq(pin); if (irqoffs < 4) irqstate = s3c_irqwake_intmask & (1L< #include #include #include void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA); - s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL); + s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA); + s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL); } diff --git a/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c index 9793544a6ace..da7a61728c18 100644 --- a/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ b/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c @@ -21,16 +21,16 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, int enable) { if (enable) { - s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); - s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); - s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); + s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); + s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); + s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); s3c2410_gpio_pullup(S3C2410_GPE(11), 0); s3c2410_gpio_pullup(S3C2410_GPE(13), 0); } else { - s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); + s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPE(11), 1); + s3c2410_gpio_pullup(S3C2410_GPE(12), 1); + s3c2410_gpio_pullup(S3C2410_GPE(13), 1); } } diff --git a/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c index db9e9e477ec1..89fcf5308cf6 100644 --- a/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c +++ b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c @@ -23,16 +23,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, printk(KERN_INFO "%s(%d)\n", __func__, enable); if (enable) { - s3c_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); - s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); - s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); + s3c2410_gpio_cfgpin(S3C2410_GPD(10), S3C2440_GPD10_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2440_GPD9_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2440_GPD8_SPIMISO1); s3c2410_gpio_pullup(S3C2410_GPD(10), 0); s3c2410_gpio_pullup(S3C2410_GPD(9), 0); } else { - s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); + s3c2410_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPD(10), 1); + s3c2410_gpio_pullup(S3C2410_GPD(9), 1); + s3c2410_gpio_pullup(S3C2410_GPD(8), 1); } } diff --git a/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c index 8ea663a438bb..86b9edc67413 100644 --- a/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c +++ b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c @@ -21,16 +21,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, int enable) { if (enable) { - s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1); - s3c_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1); - s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1); + s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1); s3c2410_gpio_pullup(S3C2410_GPG(5), 0); s3c2410_gpio_pullup(S3C2410_GPG(6), 0); } else { - s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); - s3c_gpio_cfgpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); - s3c_gpio_cfgpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); + s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPG(5), 1); + s3c2410_gpio_pullup(S3C2410_GPG(6), 1); + s3c2410_gpio_pullup(S3C2410_GPG(7), 1); } } diff --git a/trunk/arch/arm/plat-s5p/clock.c b/trunk/arch/arm/plat-s5p/clock.c index 3fef951445dc..aa96e335073b 100644 --- a/trunk/arch/arm/plat-s5p/clock.c +++ b/trunk/arch/arm/plat-s5p/clock.c @@ -33,11 +33,6 @@ struct clk clk_ext_xtal_mux = { .id = -1, }; -struct clk clk_xusbxti = { - .name = "xusbxti", - .id = -1, -}; - static struct clk s5p_clk_27m = { .name = "clk_27m", .id = -1, diff --git a/trunk/arch/arm/plat-s5p/include/plat/irqs.h b/trunk/arch/arm/plat-s5p/include/plat/irqs.h index 9ff3d718be39..42e757f2e40c 100644 --- a/trunk/arch/arm/plat-s5p/include/plat/irqs.h +++ b/trunk/arch/arm/plat-s5p/include/plat/irqs.h @@ -79,7 +79,7 @@ #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) -#define S5P_TIMER_IRQ(x) (11 + (x)) +#define S5P_TIMER_IRQ(x) S5P_IRQ(11 + (x)) #define IRQ_TIMER0 S5P_TIMER_IRQ(0) #define IRQ_TIMER1 S5P_TIMER_IRQ(1) diff --git a/trunk/arch/arm/plat-s5p/include/plat/s5p-clock.h b/trunk/arch/arm/plat-s5p/include/plat/s5p-clock.h index a476a9f14697..56fb8b414d41 100644 --- a/trunk/arch/arm/plat-s5p/include/plat/s5p-clock.h +++ b/trunk/arch/arm/plat-s5p/include/plat/s5p-clock.h @@ -23,7 +23,6 @@ #define clk_fin_vpll clk_ext_xtal_mux extern struct clk clk_ext_xtal_mux; -extern struct clk clk_xusbxti; extern struct clk clk_48m; extern struct clk clk_fout_apll; extern struct clk clk_fout_mpll; diff --git a/trunk/arch/arm/plat-samsung/Kconfig b/trunk/arch/arm/plat-samsung/Kconfig index 7a36cf85e138..d552c65fa1b0 100644 --- a/trunk/arch/arm/plat-samsung/Kconfig +++ b/trunk/arch/arm/plat-samsung/Kconfig @@ -160,11 +160,6 @@ config S3C_DEV_HSMMC2 help Compile in platform device definitions for HSMMC channel 2 -config S3C_DEV_HWMON - bool - help - Compile in platform device definitions for HWMON - config S3C_DEV_I2C1 bool help diff --git a/trunk/arch/arm/plat-samsung/Makefile b/trunk/arch/arm/plat-samsung/Makefile index 0ad820acc385..22c89d08f6e5 100644 --- a/trunk/arch/arm/plat-samsung/Makefile +++ b/trunk/arch/arm/plat-samsung/Makefile @@ -33,7 +33,6 @@ obj-$(CONFIG_S3C_ADC) += adc.o obj-$(CONFIG_S3C_DEV_HSMMC) += dev-hsmmc.o obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o obj-$(CONFIG_S3C_DEV_HSMMC2) += dev-hsmmc2.o -obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o obj-y += dev-i2c0.o obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o diff --git a/trunk/arch/arm/plat-samsung/dev-hwmon.c b/trunk/arch/arm/plat-samsung/dev-hwmon.c deleted file mode 100644 index b3ffb9587250..000000000000 --- a/trunk/arch/arm/plat-samsung/dev-hwmon.c +++ /dev/null @@ -1,42 +0,0 @@ -/* linux/arch/arm/plat-samsung/dev-hwmon.c - * - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * Adapted for HWMON by Maurus Cuelenaere - * - * Samsung series device definition for HWMON - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include - -#include -#include - -struct platform_device s3c_device_hwmon = { - .name = "s3c-hwmon", - .id = -1, - .dev.parent = &s3c_device_adc.dev, -}; - -void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) -{ - struct s3c_hwmon_pdata *npd; - - if (!pd) { - printk(KERN_ERR "%s: no platform data\n", __func__); - return; - } - - npd = kmemdup(pd, sizeof(struct s3c_hwmon_pdata), GFP_KERNEL); - if (!npd) - printk(KERN_ERR "%s: no memory for platform data\n", __func__); - - s3c_device_hwmon.dev.platform_data = npd; -} diff --git a/trunk/arch/arm/plat-samsung/gpio-config.c b/trunk/arch/arm/plat-samsung/gpio-config.c index a76eef533392..44a84e896546 100644 --- a/trunk/arch/arm/plat-samsung/gpio-config.c +++ b/trunk/arch/arm/plat-samsung/gpio-config.c @@ -1,7 +1,7 @@ /* linux/arch/arm/plat-s3c/gpio-config.c * * Copyright 2008 Openmoko, Inc. - * Copyright 2008-2010 Simtec Electronics + * Copyright 2008 Simtec Electronics * Ben Dooks * http://armlinux.simtec.co.uk/ * @@ -33,34 +33,14 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) offset = pin - chip->chip.base; - s3c_gpio_lock(chip, flags); + local_irq_save(flags); ret = s3c_gpio_do_setcfg(chip, offset, config); - s3c_gpio_unlock(chip, flags); + local_irq_restore(flags); return ret; } EXPORT_SYMBOL(s3c_gpio_cfgpin); -unsigned s3c_gpio_getcfg(unsigned int pin) -{ - struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); - unsigned long flags; - unsigned ret = 0; - int offset; - - if (chip) { - offset = pin - chip->chip.base; - - s3c_gpio_lock(chip, flags); - ret = s3c_gpio_do_getcfg(chip, offset); - s3c_gpio_unlock(chip, flags); - } - - return ret; -} -EXPORT_SYMBOL(s3c_gpio_getcfg); - - int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) { struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); @@ -72,17 +52,17 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull) offset = pin - chip->chip.base; - s3c_gpio_lock(chip, flags); + local_irq_save(flags); ret = s3c_gpio_do_setpull(chip, offset, pull); - s3c_gpio_unlock(chip, flags); + local_irq_restore(flags); return ret; } EXPORT_SYMBOL(s3c_gpio_setpull); #ifdef CONFIG_S3C_GPIO_CFG_S3C24XX -int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, - unsigned int off, unsigned int cfg) +int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip, + unsigned int off, unsigned int cfg) { void __iomem *reg = chip->base; unsigned int shift = off; @@ -107,19 +87,6 @@ int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, return 0; } -unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip, - unsigned int off) -{ - u32 con; - - con = __raw_readl(chip->base); - con >>= off; - con &= 1; - con++; - - return S3C_GPIO_SFN(con); -} - int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, unsigned int off, unsigned int cfg) { @@ -142,19 +109,6 @@ int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, return 0; } - -unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip, - unsigned int off) -{ - u32 con; - - con = __raw_readl(chip->base); - con >>= off * 2; - con &= 3; - - /* this conversion works for IN and OUT as well as special mode */ - return S3C_GPIO_SPECIAL(con); -} #endif #ifdef CONFIG_S3C_GPIO_CFG_S3C64XX @@ -180,25 +134,6 @@ int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, return 0; } - -unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, - unsigned int off) -{ - void __iomem *reg = chip->base; - unsigned int shift = (off & 7) * 4; - u32 con; - - if (off < 8 && chip->chip.ngpio > 8) - reg -= 4; - - con = __raw_readl(reg); - con >>= shift; - con &= 0xf; - - /* this conversion works for IN and OUT as well as special mode */ - return S3C_GPIO_SPECIAL(con); -} - #endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */ #ifdef CONFIG_S3C_GPIO_PULL_UPDOWN @@ -229,35 +164,3 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, return (__force s3c_gpio_pull_t)pup; } #endif - -#ifdef CONFIG_S3C_GPIO_PULL_UP -int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, - unsigned int off, s3c_gpio_pull_t pull) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - pup = __raw_readl(reg); - - if (pup == S3C_GPIO_PULL_UP) - pup &= ~(1 << off); - else if (pup == S3C_GPIO_PULL_NONE) - pup |= (1 << off); - else - return -EINVAL; - - __raw_writel(pup, reg); - return 0; -} - -s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, - unsigned int off) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - pup &= (1 << off); - return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP; -} -#endif /* CONFIG_S3C_GPIO_PULL_UP */ - diff --git a/trunk/arch/arm/plat-samsung/gpio.c b/trunk/arch/arm/plat-samsung/gpio.c index b83a83351cea..28d2ab8a08db 100644 --- a/trunk/arch/arm/plat-samsung/gpio.c +++ b/trunk/arch/arm/plat-samsung/gpio.c @@ -15,7 +15,6 @@ #include #include #include -#include #include @@ -53,14 +52,14 @@ static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset) unsigned long flags; unsigned long con; - s3c_gpio_lock(ourchip, flags); + local_irq_save(flags); con = __raw_readl(base + 0x00); con &= ~(3 << (offset * 2)); __raw_writel(con, base + 0x00); - s3c_gpio_unlock(ourchip, flags); + local_irq_restore(flags); return 0; } @@ -73,7 +72,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip, unsigned long dat; unsigned long con; - s3c_gpio_lock(ourchip, flags); + local_irq_save(flags); dat = __raw_readl(base + 0x04); dat &= ~(1 << offset); @@ -88,7 +87,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip, __raw_writel(con, base + 0x00); __raw_writel(dat, base + 0x04); - s3c_gpio_unlock(ourchip, flags); + local_irq_restore(flags); return 0; } @@ -100,7 +99,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip, unsigned long flags; unsigned long dat; - s3c_gpio_lock(ourchip, flags); + local_irq_save(flags); dat = __raw_readl(base + 0x04); dat &= ~(1 << offset); @@ -108,7 +107,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip, dat |= 1 << offset; __raw_writel(dat, base + 0x04); - s3c_gpio_unlock(ourchip, flags); + local_irq_restore(flags); } static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) @@ -132,8 +131,6 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) BUG_ON(!gc->label); BUG_ON(!gc->ngpio); - spin_lock_init(&chip->lock); - if (!gc->direction_input) gc->direction_input = s3c_gpiolib_input; if (!gc->direction_output) diff --git a/trunk/arch/arm/plat-samsung/include/plat/cpu.h b/trunk/arch/arm/plat-samsung/include/plat/cpu.h index c54f318991b6..d316b4a579f4 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/cpu.h +++ b/trunk/arch/arm/plat-samsung/include/plat/cpu.h @@ -78,9 +78,6 @@ extern struct sysdev_class s3c2442_sysclass; extern struct sysdev_class s3c2443_sysclass; extern struct sysdev_class s3c6410_sysclass; extern struct sysdev_class s3c64xx_sysclass; -extern struct sysdev_class s5p6440_sysclass; -extern struct sysdev_class s5p6442_sysclass; -extern struct sysdev_class s5pv210_sysclass; extern void (*s5pc1xx_idle)(void); diff --git a/trunk/arch/arm/plat-samsung/include/plat/dma.h b/trunk/arch/arm/plat-samsung/include/plat/dma.h index 2e8f8c6560d7..7584d751ed51 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/dma.h +++ b/trunk/arch/arm/plat-samsung/include/plat/dma.h @@ -110,8 +110,8 @@ extern int s3c2410_dma_config(unsigned int channel, int xferunit); * configure the device we're talking to */ -extern int s3c2410_dma_devconfig(unsigned int channel, - enum s3c2410_dmasrc source, unsigned long devaddr); +extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, + unsigned long devaddr); /* s3c2410_dma_getposition * diff --git a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h index 3e21c75feefa..dda19da037ad 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h @@ -30,12 +30,6 @@ static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip, return (chip->config->set_config)(chip, off, config); } -static inline unsigned s3c_gpio_do_getcfg(struct s3c_gpio_chip *chip, - unsigned int off) -{ - return (chip->config->get_config)(chip, off); -} - static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, unsigned int off, s3c_gpio_pull_t pull) { @@ -58,18 +52,6 @@ static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, unsigned int off, unsigned int cfg); -/** - * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg - * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the - * S3C_GPIO_SPECIAL() macro. - */ -unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip, - unsigned int off); - /** * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) * @chip: The gpio chip that is being configured. @@ -83,21 +65,6 @@ unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip, extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, unsigned int off, unsigned int cfg); - -/** - * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A) - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable - * GPIO configuration value. - * - * @sa s3c_gpio_getcfg_s3c24xx - * @sa s3c_gpio_getcfg_s3c64xx_4bit - */ -extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip, - unsigned int off); - /** * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. * @chip: The gpio chip that is being configured. @@ -118,20 +85,6 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, unsigned int off, unsigned int cfg); -/** - * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration - * register setting into a value the software can use, such as could be passed - * to s3c_gpio_setcfg_s3c64xx_4bit(). - * - * @sa s3c_gpio_getcfg_s3c24xx - */ -extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, - unsigned int off); - /* Pull-{up,down} resistor controls. * * S3C2410,S3C2440,S3C24A0 = Pull-UP, @@ -192,17 +145,6 @@ extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, unsigned int off); -/** - * s3c_gpio_getpull_1up() - Get configuration for choice of up or none - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-up resistor for the - * given GPIO in the same case as s3c_gpio_setpull_1up. -*/ -extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, - unsigned int off); - /** * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. * @chip: The gpio chip that is being configured. diff --git a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 8d01e853df39..29cd6a86cade 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -77,17 +77,6 @@ struct s3c_gpio_cfg { */ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); -/** - * s3c_gpio_getcfg - Read the current function for a GPIO pin - * @pin: The pin to read the configuration value for. - * - * Read the configuration state of the given @pin, returning a value that - * could be passed back to s3c_gpio_cfgpin(). - * - * @sa s3c_gpio_cfgpin - */ -extern unsigned s3c_gpio_getcfg(unsigned int pin); - /* Define values for the pull-{up,down} available for each gpio pin. * * These values control the state of the weak pull-{up,down} resistors diff --git a/trunk/arch/arm/plat-samsung/include/plat/gpio-core.h b/trunk/arch/arm/plat-samsung/include/plat/gpio-core.h index f3a68d1a07b9..49ff406a7066 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/trunk/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -44,26 +44,16 @@ struct s3c_gpio_cfg; * @chip: The chip structure to be exported via gpiolib. * @base: The base pointer to the gpio configuration registers. * @config: special function and pull-resistor control information. - * @lock: Lock for exclusive access to this gpio bank. * @pm_save: Save information for suspend/resume support. * * This wrapper provides the necessary information for the Samsung * specific gpios being registered with gpiolib. - * - * The lock protects each gpio bank from multiple access of the shared - * configuration registers, or from reading of data whilst another thread - * is writing to the register set. - * - * Each chip has its own lock to avoid any contention between different - * CPU cores trying to get one lock for different GPIO banks, where each - * bank of GPIO has its own register space and configuration registers. */ struct s3c_gpio_chip { struct gpio_chip chip; struct s3c_gpio_cfg *config; struct s3c_gpio_pm *pm; void __iomem *base; - spinlock_t lock; #ifdef CONFIG_PM u32 pm_save[4]; #endif @@ -118,9 +108,6 @@ extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); -/* exported for core SoC support to change */ -extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default; - #ifdef CONFIG_S3C_GPIO_TRACK extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; @@ -148,7 +135,3 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit; #define __gpio_pm(x) NULL #endif /* CONFIG_PM */ - -/* locking wrappers to deal with multiple access to the same gpio bank */ -#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) -#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) diff --git a/trunk/arch/arm/plat-samsung/include/plat/hwmon.h b/trunk/arch/arm/plat-samsung/include/plat/hwmon.h index c167e4429bc7..1ba88ea0aa31 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/hwmon.h +++ b/trunk/arch/arm/plat-samsung/include/plat/hwmon.h @@ -37,15 +37,5 @@ struct s3c_hwmon_pdata { struct s3c_hwmon_chcfg *in[8]; }; -/** - * s3c_hwmon_set_platdata - Set platform data for S3C HWMON device - * @pd: Platform data to register to device. - * - * Register the given platform data for use with the S3C HWMON device. - * The call will copy the platform data, so the board definitions can - * make the structure itself __initdata. - */ -extern void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd); - #endif /* __ASM_ARCH_ADC_HWMON_H */ diff --git a/trunk/arch/arm/plat-samsung/pm-gpio.c b/trunk/arch/arm/plat-samsung/pm-gpio.c index d50ab9d2af53..69a4c7f02e25 100644 --- a/trunk/arch/arm/plat-samsung/pm-gpio.c +++ b/trunk/arch/arm/plat-samsung/pm-gpio.c @@ -329,7 +329,7 @@ void s3c_pm_save_gpios(void) struct s3c_gpio_chip *ourchip; unsigned int gpio_nr; - for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { + for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { ourchip = s3c_gpiolib_getchip(gpio_nr); if (!ourchip) continue; @@ -367,7 +367,7 @@ void s3c_pm_restore_gpios(void) struct s3c_gpio_chip *ourchip; unsigned int gpio_nr; - for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { + for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { ourchip = s3c_gpiolib_getchip(gpio_nr); if (!ourchip) continue;