From 3f72e6dcbd68da7d347e152cd2ea0d088aef16d3 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Tue, 10 Aug 2010 18:03:24 -0700 Subject: [PATCH] --- yaml --- r: 208548 b: refs/heads/master c: d80e0d96a328cc864a1cb359f545a6ed0c61812d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/scsi/53c700.c | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/[refs] b/[refs] index c6463ec1cf6c..f7b32ffd686a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7896bfa451b209f73bc8ec14721dcc2c5329a0a9 +refs/heads/master: d80e0d96a328cc864a1cb359f545a6ed0c61812d diff --git a/trunk/drivers/scsi/53c700.c b/trunk/drivers/scsi/53c700.c index 80dc3ac12cde..89fc1c8af86b 100644 --- a/trunk/drivers/scsi/53c700.c +++ b/trunk/drivers/scsi/53c700.c @@ -309,9 +309,6 @@ NCR_700_detect(struct scsi_host_template *tpnt, hostdata->msgin = memory + MSGIN_OFFSET; hostdata->msgout = memory + MSGOUT_OFFSET; hostdata->status = memory + STATUS_OFFSET; - /* all of these offsets are L1_CACHE_BYTES separated. It is fatal - * if this isn't sufficient separation to avoid dma flushing issues */ - BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment()); hostdata->slots = (struct NCR_700_command_slot *)(memory + SLOTS_OFFSET); hostdata->dev = dev;