From 401aed29f8d7a4bf23b6e5322feda0139a17c29c Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 6 Jul 2011 16:04:09 +0900 Subject: [PATCH] --- yaml --- r: 254769 b: refs/heads/master c: 5f27275edb7082505eaac1c85a15620207351b63 h: refs/heads/master i: 254767: 5cd633e06cf9508324fa1b7545eb264e233b3cf8 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-exynos4/cpu.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index c6c1f1cba0a5..25f16fdc40f1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d60c98c26ac9824211c3a1f729be52cb179a1157 +refs/heads/master: 5f27275edb7082505eaac1c85a15620207351b63 diff --git a/trunk/arch/arm/mach-exynos4/cpu.c b/trunk/arch/arm/mach-exynos4/cpu.c index 9babe4473e88..bfd621460abf 100644 --- a/trunk/arch/arm/mach-exynos4/cpu.c +++ b/trunk/arch/arm/mach-exynos4/cpu.c @@ -23,6 +23,7 @@ #include #include #include +#include #include @@ -132,6 +133,11 @@ void __init exynos4_map_io(void) s3c_fimc_setname(1, "exynos4-fimc"); s3c_fimc_setname(2, "exynos4-fimc"); s3c_fimc_setname(3, "exynos4-fimc"); + + /* The I2C bus controllers are directly compatible with s3c2440 */ + s3c_i2c0_setname("s3c2440-i2c"); + s3c_i2c1_setname("s3c2440-i2c"); + s3c_i2c2_setname("s3c2440-i2c"); } void __init exynos4_init_clocks(int xtal)