From 404966b508af97cdabbc3ff983a2eaef44bc8c1e Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Fri, 14 Oct 2011 15:08:56 +0900 Subject: [PATCH] --- yaml --- r: 274100 b: refs/heads/master c: 5f33bd76f5c4df45cd5b2e4132c6451dac8afee9 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-s3c24xx/s3c2443-clock.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e9512122fae8..518ae36388f1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: efb1fb486a8187f02ac4a0170ab45823ebbe58f2 +refs/heads/master: 5f33bd76f5c4df45cd5b2e4132c6451dac8afee9 diff --git a/trunk/arch/arm/plat-s3c24xx/s3c2443-clock.c b/trunk/arch/arm/plat-s3c24xx/s3c2443-clock.c index f9c5b0343cf3..fea3d5c0252e 100644 --- a/trunk/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/trunk/arch/arm/plat-s3c24xx/s3c2443-clock.c @@ -189,6 +189,19 @@ static unsigned long s3c2443_armclk_roundrate(struct clk *clk, return parent / best; } +static unsigned long s3c2443_armclk_getrate(struct clk *clk) +{ + unsigned long rate = clk_get_rate(clk->parent); + unsigned long clkcon0; + int val; + + clkcon0 = __raw_readl(S3C2443_CLKDIV0); + clkcon0 &= armdivmask; + val = clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT; + + return rate / armdiv[val]; +} + static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate) { unsigned long parent = clk_get_rate(clk->parent); @@ -224,6 +237,7 @@ static struct clk clk_armdiv = { .parent = &clk_msysclk.clk, .ops = &(struct clk_ops) { .round_rate = s3c2443_armclk_roundrate, + .get_rate = s3c2443_armclk_getrate, .set_rate = s3c2443_armclk_setrate, }, };