From 40b467153f625e19dfe6b868e23bd886c2823f66 Mon Sep 17 00:00:00 2001
From: Krzysztof Halasa <khc@pm.waw.pl>
Date: Tue, 29 Jan 2008 01:03:00 +0100
Subject: [PATCH] --- yaml --- r: 82937 b: refs/heads/master c:
 80bbdd27e4016ad39d33160ea7f39ac05bfe1d7c h: refs/heads/master i:   82935:
 72dd75d9d884e81789c66f350e54a0b60d8de9f2 v: v3

---
 [refs]                                       |  2 +-
 trunk/include/asm-arm/arch-ixp4xx/platform.h | 21 ++++++++++++++++++++
 2 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index cf2354e98932..eaa397f8c3b5 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 82a96f5790ac93a406be72ed8f308dd29ad7e6af
+refs/heads/master: 80bbdd27e4016ad39d33160ea7f39ac05bfe1d7c
diff --git a/trunk/include/asm-arm/arch-ixp4xx/platform.h b/trunk/include/asm-arm/arch-ixp4xx/platform.h
index 2ce28e3fd325..a1f2b5404db1 100644
--- a/trunk/include/asm-arm/arch-ixp4xx/platform.h
+++ b/trunk/include/asm-arm/arch-ixp4xx/platform.h
@@ -91,6 +91,27 @@ struct ixp4xx_pata_data {
 
 struct sys_timer;
 
+#define IXP4XX_ETH_NPEA		0x00
+#define IXP4XX_ETH_NPEB		0x10
+#define IXP4XX_ETH_NPEC		0x20
+
+/* Information about built-in Ethernet MAC interfaces */
+struct eth_plat_info {
+	u8 phy;		/* MII PHY ID, 0 - 31 */
+	u8 rxq;		/* configurable, currently 0 - 31 only */
+	u8 txreadyq;
+	u8 hwaddr[6];
+};
+
+/* Information about built-in HSS (synchronous serial) interfaces */
+struct hss_plat_info {
+	int (*set_clock)(int port, unsigned int clock_type);
+	int (*open)(int port, void *pdev,
+		    void (*set_carrier_cb)(void *pdev, int carrier));
+	void (*close)(int port, void *pdev);
+	u8 txreadyq;
+};
+
 /*
  * Frequency of clock used for primary clocksource
  */