From 42caab0bee54a2ff1f25b4ad7b1059139f8a1e16 Mon Sep 17 00:00:00 2001 From: Dima Zavin Date: Mon, 27 Jun 2011 10:31:05 -0700 Subject: [PATCH] --- yaml --- r: 271362 b: refs/heads/master c: 13eae1f98255bddcbfe27ae4bd58fe3dc374bc0b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/video/omap2/dss/dispc.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index fe8948db1344..4987c567ea5a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0f770b4765846846cc531f6828fb8402f92e2649 +refs/heads/master: 13eae1f98255bddcbfe27ae4bd58fe3dc374bc0b diff --git a/trunk/drivers/video/omap2/dss/dispc.c b/trunk/drivers/video/omap2/dss/dispc.c index 0f3961a1ce26..1caea42fad8c 100644 --- a/trunk/drivers/video/omap2/dss/dispc.c +++ b/trunk/drivers/video/omap2/dss/dispc.c @@ -3306,6 +3306,8 @@ static void dispc_error_worker(struct work_struct *work) dispc.error_irqs = 0; spin_unlock_irqrestore(&dispc.irq_lock, flags); + dispc_runtime_get(); + if (errors & DISPC_IRQ_GFX_FIFO_UNDERFLOW) { DSSERR("GFX_FIFO_UNDERFLOW, disabling GFX\n"); for (i = 0; i < omap_dss_get_num_overlays(); ++i) { @@ -3492,6 +3494,8 @@ static void dispc_error_worker(struct work_struct *work) dispc.irq_error_mask |= errors; _omap_dispc_set_irqs(); spin_unlock_irqrestore(&dispc.irq_lock, flags); + + dispc_runtime_put(); } int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout)