From e0c25362384f4be9c755c98560cd4b1cdb2ec79c Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 10 Mar 2013 21:52:53 -0500 Subject: [PATCH 01/30] clocksource: add empty version of clocksource_of_init Add an empty clocksource_of_init when !CLKSRC_OF. This is needed for builds where no timer has selected CLKSRC_OF. Signed-off-by: Rob Herring Cc: John Stultz Cc: Thomas Gleixner --- include/linux/clocksource.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 27cfda427dd9..08ed5e19d8c6 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -340,6 +340,7 @@ extern void clocksource_of_init(void); __used __section(__clksrc_of_table) \ = { .compatible = compat, .data = fn }; #else +static inline void clocksource_of_init(void) {} #define CLOCKSOURCE_OF_DECLARE(name, compat, fn) #endif From effbfdd7baf7babc73154b87a5ff940969cf6559 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 6 Feb 2013 14:40:22 -0600 Subject: [PATCH 02/30] clocksource: pass DT node pointer to init functions In cases where we have multiple nodes of the same type, we may need the node pointer to know which node was matched. Passing the node pointer also keeps the init function from having to match the node a 2nd time. Update bcm2835, vt8500, and tegra20 init functions for the new function prototype. Further tegra20 clean-ups are in follow-up commit. Signed-off-by: Rob Herring Cc: John Stultz Cc: Thomas Gleixner Reviewed-by: Stephen Warren Tested-by: Stephen Warren Acked-by: Arnd Bergmann Acked-by: Tony Prisk Tested-by: Michal Simek --- drivers/clocksource/bcm2835_timer.c | 12 +----------- drivers/clocksource/clksrc-of.c | 4 ++-- drivers/clocksource/tegra20_timer.c | 3 +-- drivers/clocksource/vt8500_timer.c | 14 +------------- 4 files changed, 5 insertions(+), 28 deletions(-) diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c index 50c68fef944b..766611d29945 100644 --- a/drivers/clocksource/bcm2835_timer.c +++ b/drivers/clocksource/bcm2835_timer.c @@ -95,23 +95,13 @@ static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id) } } -static struct of_device_id bcm2835_time_match[] __initconst = { - { .compatible = "brcm,bcm2835-system-timer" }, - {} -}; - -static void __init bcm2835_timer_init(void) +static void __init bcm2835_timer_init(struct device_node *node) { - struct device_node *node; void __iomem *base; u32 freq; int irq; struct bcm2835_timer *timer; - node = of_find_matching_node(NULL, bcm2835_time_match); - if (!node) - panic("No bcm2835 timer node"); - base = of_iomap(node, 0); if (!base) panic("Can't remap registers"); diff --git a/drivers/clocksource/clksrc-of.c b/drivers/clocksource/clksrc-of.c index bdabdaa8d00f..3ef11fba781c 100644 --- a/drivers/clocksource/clksrc-of.c +++ b/drivers/clocksource/clksrc-of.c @@ -26,10 +26,10 @@ void __init clocksource_of_init(void) { struct device_node *np; const struct of_device_id *match; - void (*init_func)(void); + void (*init_func)(struct device_node *); for_each_matching_node_and_match(np, __clksrc_of_table, &match) { init_func = match->data; - init_func(); + init_func(np); } } diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index 0bde03feb095..b3396ab15f63 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -164,9 +164,8 @@ static const struct of_device_id rtc_match[] __initconst = { {} }; -static void __init tegra20_init_timer(void) +static void __init tegra20_init_timer(struct device_node *np) { - struct device_node *np; struct clk *clk; unsigned long rate; int ret; diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c index 8efc86b5b5dd..242255285597 100644 --- a/drivers/clocksource/vt8500_timer.c +++ b/drivers/clocksource/vt8500_timer.c @@ -129,22 +129,10 @@ static struct irqaction irq = { .dev_id = &clockevent, }; -static struct of_device_id vt8500_timer_ids[] = { - { .compatible = "via,vt8500-timer" }, - { } -}; - -static void __init vt8500_timer_init(void) +static void __init vt8500_timer_init(struct device_node *np) { - struct device_node *np; int timer_irq; - np = of_find_matching_node(NULL, vt8500_timer_ids); - if (!np) { - pr_err("%s: Timer description missing from Device Tree\n", - __func__); - return; - } regbase = of_iomap(np, 0); if (!regbase) { pr_err("%s: Missing iobase description in Device Tree\n", From 1d16cfb3aeba71bc6ecf2d19ccbabed0426e5c22 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 7 Feb 2013 11:36:23 -0600 Subject: [PATCH 03/30] clocksource: tegra20: use the device_node pointer passed to init We've already matched the node, so use the node pointer passed in. The rtc init was intermingled with the timer init, so split this out to a separate init function. Signed-off-by: Rob Herring Cc: John Stultz Cc: Thomas Gleixner Reviewed-by: Stephen Warren Tested-by: Stephen Warren --- drivers/clocksource/tegra20_timer.c | 67 +++++++++++------------------ 1 file changed, 26 insertions(+), 41 deletions(-) diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index b3396ab15f63..15cc723f699f 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -154,28 +154,12 @@ static struct irqaction tegra_timer_irq = { .dev_id = &tegra_clockevent, }; -static const struct of_device_id timer_match[] __initconst = { - { .compatible = "nvidia,tegra20-timer" }, - {} -}; - -static const struct of_device_id rtc_match[] __initconst = { - { .compatible = "nvidia,tegra20-rtc" }, - {} -}; - static void __init tegra20_init_timer(struct device_node *np) { struct clk *clk; unsigned long rate; int ret; - np = of_find_matching_node(NULL, timer_match); - if (!np) { - pr_err("Failed to find timer DT node\n"); - BUG(); - } - timer_reg_base = of_iomap(np, 0); if (!timer_reg_base) { pr_err("Can't map timer registers\n"); @@ -199,30 +183,6 @@ static void __init tegra20_init_timer(struct device_node *np) of_node_put(np); - np = of_find_matching_node(NULL, rtc_match); - if (!np) { - pr_err("Failed to find RTC DT node\n"); - BUG(); - } - - rtc_base = of_iomap(np, 0); - if (!rtc_base) { - pr_err("Can't map RTC registers"); - BUG(); - } - - /* - * rtc registers are used by read_persistent_clock, keep the rtc clock - * enabled - */ - clk = clk_get_sys("rtc-tegra", NULL); - if (IS_ERR(clk)) - pr_warn("Unable to get rtc-tegra clock\n"); - else - clk_prepare_enable(clk); - - of_node_put(np); - switch (rate) { case 12000000: timer_writel(0x000b, TIMERUS_USEC_CFG); @@ -261,9 +221,34 @@ static void __init tegra20_init_timer(struct device_node *np) #ifdef CONFIG_HAVE_ARM_TWD twd_local_timer_of_register(); #endif +} +CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer); + +static void __init tegra20_init_rtc(struct device_node *np) +{ + struct clk *clk; + + rtc_base = of_iomap(np, 0); + if (!rtc_base) { + pr_err("Can't map RTC registers"); + BUG(); + } + + /* + * rtc registers are used by read_persistent_clock, keep the rtc clock + * enabled + */ + clk = clk_get_sys("rtc-tegra", NULL); + if (IS_ERR(clk)) + pr_warn("Unable to get rtc-tegra clock\n"); + else + clk_prepare_enable(clk); + + of_node_put(np); + register_persistent_clock(NULL, tegra_read_persistent_clock); } -CLOCKSOURCE_OF_DECLARE(tegra20, "nvidia,tegra20-timer", tegra20_init_timer); +CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); #ifdef CONFIG_PM static u32 usec_config; From da4a686a2cfb077a8bfc1697f597e7f86235b822 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 6 Feb 2013 21:17:47 -0600 Subject: [PATCH 04/30] ARM: smp_twd: convert to use CLKSRC_OF init Now that we have OF based init with CLKSRC_OF, convert smp_twd init function to use it and covert all callers of twd_local_timer_of_register. Signed-off-by: Rob Herring Cc: Shawn Guo Cc: Sascha Hauer Cc: Russell King Cc: Viresh Kumar Cc: Shiraz Hashim Cc: Srinidhi Kasagar Cc: John Stultz Cc: Thomas Gleixner Cc: linux-omap@vger.kernel.org Cc: spear-devel@list.st.com Reviewed-by: Stephen Warren Acked-by: Santosh Shilimkar Acked-by: Tony Lindgren Acked-by: Linus Walleij --- arch/arm/Kconfig | 1 + arch/arm/include/asm/smp_twd.h | 8 -------- arch/arm/kernel/smp_twd.c | 17 ++++------------- arch/arm/mach-highbank/highbank.c | 5 ++--- arch/arm/mach-imx/mach-imx6q.c | 5 ++--- arch/arm/mach-omap2/timer.c | 2 +- arch/arm/mach-spear13xx/spear13xx.c | 4 ++-- arch/arm/mach-ux500/timer.c | 3 ++- arch/arm/mach-vexpress/v2m.c | 6 +++--- drivers/clocksource/tegra20_timer.c | 3 --- 10 files changed, 17 insertions(+), 37 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5b714695b01b..5bfd584929c8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1597,6 +1597,7 @@ config HAVE_ARM_ARCH_TIMER config HAVE_ARM_TWD bool depends on SMP + select CLKSRC_OF if OF help This options enables support for the ARM timer and watchdog unit diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h index 0f01f4677bd2..7b2899c2f7fc 100644 --- a/arch/arm/include/asm/smp_twd.h +++ b/arch/arm/include/asm/smp_twd.h @@ -34,12 +34,4 @@ struct twd_local_timer name __initdata = { \ int twd_local_timer_register(struct twd_local_timer *); -#ifdef CONFIG_HAVE_ARM_TWD -void twd_local_timer_of_register(void); -#else -static inline void twd_local_timer_of_register(void) -{ -} -#endif - #endif diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 3f2565037480..90525d9d290b 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -362,25 +362,13 @@ int __init twd_local_timer_register(struct twd_local_timer *tlt) } #ifdef CONFIG_OF -const static struct of_device_id twd_of_match[] __initconst = { - { .compatible = "arm,cortex-a9-twd-timer", }, - { .compatible = "arm,cortex-a5-twd-timer", }, - { .compatible = "arm,arm11mp-twd-timer", }, - { }, -}; - -void __init twd_local_timer_of_register(void) +static void __init twd_local_timer_of_register(struct device_node *np) { - struct device_node *np; int err; if (!is_smp() || !setup_max_cpus) return; - np = of_find_matching_node(NULL, twd_of_match); - if (!np) - return; - twd_ppi = irq_of_parse_and_map(np, 0); if (!twd_ppi) { err = -EINVAL; @@ -398,4 +386,7 @@ void __init twd_local_timer_of_register(void) out: WARN(err, "twd_local_timer_of_register failed (%d)\n", err); } +CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register); +CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register); +CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register); #endif diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index a4f9f50247d4..76c1170b3528 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include #include @@ -119,10 +118,10 @@ static void __init highbank_timer_init(void) sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1"); sp804_clockevents_init(timer_base, irq, "timer0"); - twd_local_timer_of_register(); - arch_timer_of_register(); arch_timer_sched_clock_init(); + + clocksource_of_init(); } static void highbank_power_off(void) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 9ffd103b27e4..b59ddcb57c78 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -28,11 +29,9 @@ #include #include #include -#include #include #include #include -#include #include #include "common.h" @@ -292,7 +291,7 @@ static void __init imx6q_init_irq(void) static void __init imx6q_timer_init(void) { mx6q_clocks_init(); - twd_local_timer_of_register(); + clocksource_of_init(); imx_print_silicon_rev("i.MX6Q", imx6q_revision()); } diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2bdd4cf17a8f..4fd80257c73e 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -597,7 +597,7 @@ void __init omap4_local_timer_init(void) int err; if (of_have_populated_dt()) { - twd_local_timer_of_register(); + clocksource_of_init(); return; } diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c index c7d2b4a8d8cc..25a10191b021 100644 --- a/arch/arm/mach-spear13xx/spear13xx.c +++ b/arch/arm/mach-spear13xx/spear13xx.c @@ -15,12 +15,12 @@ #include #include +#include #include #include #include #include #include -#include #include #include #include @@ -179,5 +179,5 @@ void __init spear13xx_timer_init(void) clk_put(pclk); spear_setup_of_timer(); - twd_local_timer_of_register(); + clocksource_of_init(); } diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index a6af0b8732ba..d07bbe7f04a6 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -32,7 +33,7 @@ static void __init ux500_twd_init(void) twd_local_timer = &u8500_twd_local_timer; if (of_have_populated_dt()) - twd_local_timer_of_register(); + clocksource_of_init(); else { err = twd_local_timer_register(twd_local_timer); if (err) diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 915683cb67d6..d0ad78998cb6 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include #include @@ -25,7 +26,6 @@ #include #include #include -#include #include #include #include @@ -435,6 +435,7 @@ static void __init v2m_dt_timer_init(void) vexpress_clk_of_init(); + clocksource_of_init(); do { node = of_find_compatible_node(node, NULL, "arm,sp804"); } while (node && vexpress_get_site_by_node(node) != VEXPRESS_SITE_MB); @@ -445,8 +446,7 @@ static void __init v2m_dt_timer_init(void) irq_of_parse_and_map(node, 0)); } - if (arch_timer_of_register() != 0) - twd_local_timer_of_register(); + arch_timer_of_register(); if (arch_timer_sched_clock_init() != 0) versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index 15cc723f699f..2e4d8a666c36 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -218,9 +218,6 @@ static void __init tegra20_init_timer(struct device_node *np) tegra_clockevent.irq = tegra_timer_irq.irq; clockevents_config_and_register(&tegra_clockevent, 1000000, 0x1, 0x1fffffff); -#ifdef CONFIG_HAVE_ARM_TWD - twd_local_timer_of_register(); -#endif } CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer); From 633ef4c7d18982d184242d42056c622a433d93fe Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 14:53:08 +0800 Subject: [PATCH 05/30] ARM: mxs: use CLKSRC_OF helper to initialize timer Select CLKSRC_OF and use clocksource_of_init() to initialize timer, so that the call to mxs_timer_init() in clock driver can be removed. Signed-off-by: Shawn Guo --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/include/mach/common.h | 1 - arch/arm/mach-mxs/mach-mxs.c | 3 +++ arch/arm/mach-mxs/timer.c | 10 ++-------- drivers/clk/mxs/clk-imx23.c | 3 --- drivers/clk/mxs/clk-imx28.c | 3 --- 6 files changed, 6 insertions(+), 15 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 865c25ded153..5a1f0c9e0ab0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -473,6 +473,7 @@ config ARCH_MXS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select CLKSRC_OF select COMMON_CLK select GENERIC_CLOCKEVENTS select HAVE_CLK_PREPARE diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index be5a9c93cb2a..e043c4735b5a 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -13,7 +13,6 @@ extern const u32 *mxs_get_ocotp(void); extern int mxs_reset_block(void __iomem *); -extern void mxs_timer_init(void); extern void mxs_restart(char, const char *); extern int mxs_saif_clkmux_select(unsigned int clkmux); diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index e7b781d3788f..c1c0fb414c28 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -168,11 +169,13 @@ static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { static void __init imx23_timer_init(void) { mx23_clocks_init(); + clocksource_of_init(); } static void __init imx28_timer_init(void) { mx28_clocks_init(); + clocksource_of_init(); } enum mac_oui { diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 421020498a1b..fe2903d7939a 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -242,18 +242,11 @@ static int __init mxs_clocksource_init(struct clk *timer_clk) return 0; } -void __init mxs_timer_init(void) +static void __init mxs_timer_init(struct device_node *np) { - struct device_node *np; struct clk *timer_clk; int irq; - np = of_find_compatible_node(NULL, NULL, "fsl,timrot"); - if (!np) { - pr_err("%s: failed find timrot node\n", __func__); - return; - } - timer_clk = clk_get_sys("timrot", NULL); if (IS_ERR(timer_clk)) { pr_err("%s: failed to get clk\n", __func__); @@ -304,3 +297,4 @@ void __init mxs_timer_init(void) irq = irq_of_parse_and_map(np, 0); setup_irq(irq, &mxs_timer_irq); } +CLOCKSOURCE_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init) diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index b5c06f9766f6..291cc44713f4 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include "clk.h" @@ -165,7 +164,5 @@ int __init mx23_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - mxs_timer_init(); - return 0; } diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index 76ce6c6d1113..d861bfd8c537 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include "clk.h" @@ -244,7 +243,5 @@ int __init mx28_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - mxs_timer_init(); - return 0; } From 2efb950465e9180c3ff657a755b8a973f7b9ae42 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 22:57:14 +0800 Subject: [PATCH 06/30] ARM: mxs: look up timrot clock from device tree Change call clk_get_sys() to of_clk_get() to look up timrot clock from device tree, so that the clk_register_clkdev() call for timrot can be saved in clock driver. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23.dtsi | 1 + arch/arm/boot/dts/imx28.dtsi | 1 + arch/arm/mach-mxs/timer.c | 2 +- drivers/clk/mxs/clk-imx23.c | 2 -- drivers/clk/mxs/clk-imx28.c | 1 - 5 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 56afcf41aae0..27ce8070e187 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -426,6 +426,7 @@ compatible = "fsl,imx23-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <28 29 30 31>; + clocks = <&clks 28>; }; auart0: serial@8006c000 { diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 7ba49662b9bc..c2f10d381f03 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -838,6 +838,7 @@ compatible = "fsl,imx28-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <48 49 50 51>; + clocks = <&clks 26>; }; auart0: serial@8006a000 { diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index fe2903d7939a..f5142aa234a3 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -247,7 +247,7 @@ static void __init mxs_timer_init(struct device_node *np) struct clk *timer_clk; int irq; - timer_clk = clk_get_sys("timrot", NULL); + timer_clk = of_clk_get(np, 0); if (IS_ERR(timer_clk)) { pr_err("%s: failed to get clk\n", __func__); return; diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 291cc44713f4..46ae6bebe445 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -159,8 +159,6 @@ int __init mx23_clocks_init(void) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } - clk_register_clkdev(clks[clk32k], NULL, "timrot"); - for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index d861bfd8c537..fb30cd92b234 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -237,7 +237,6 @@ int __init mx28_clocks_init(void) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } - clk_register_clkdev(clks[xbus], NULL, "timrot"); clk_register_clkdev(clks[enet_out], NULL, "enet_out"); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) From be35bd2bcd4fc5d67a24ad134138e606f69d11a4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 14:57:41 +0800 Subject: [PATCH 07/30] ARM: mxs: get timrot base address from device tree Instead of using static defines, it gets timrot base address with mapping from device tree. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/timer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index f5142aa234a3..c8cda1834655 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -79,7 +80,7 @@ static struct clock_event_device mxs_clockevent_device; static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED; -static void __iomem *mxs_timrot_base = MXS_IO_ADDRESS(MXS_TIMROT_BASE_ADDR); +static void __iomem *mxs_timrot_base; static u32 timrot_major_version; static inline void timrot_irq_disable(void) @@ -247,6 +248,9 @@ static void __init mxs_timer_init(struct device_node *np) struct clk *timer_clk; int irq; + mxs_timrot_base = of_iomap(np, 0); + WARN_ON(!mxs_timrot_base); + timer_clk = of_clk_get(np, 0); if (IS_ERR(timer_clk)) { pr_err("%s: failed to get clk\n", __func__); From 220d2f269ab017c139bbce2cb41f3bd1b1ddcffa Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 19:41:39 +0800 Subject: [PATCH 08/30] ARM: mxs: remove cpu_is_mx23() call from timer code Remove cpu_is_mx23() call from timer code by using of_device_is_compatible() instead. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index c8cda1834655..f4dd96ff081a 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -266,7 +266,8 @@ static void __init mxs_timer_init(struct device_node *np) /* get timrot version */ timrot_major_version = __raw_readl(mxs_timrot_base + - (cpu_is_mx23() ? MX23_TIMROT_VERSION_OFFSET : + (of_device_is_compatible(np, "fsl,imx23-timrot") ? + MX23_TIMROT_VERSION_OFFSET : MX28_TIMROT_VERSION_OFFSET)); timrot_major_version >>= BP_TIMROT_MAJOR_VERSION; From 7a9c39f7872afca493ccee05bd6754557cb0c586 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 20:04:34 +0800 Subject: [PATCH 09/30] ARM: mxs: select STMP_DEVICE and use it for timer code Select STMP_DEVICE and in timer code replace mxs_reset_block() with stmp_reset_block(), use STMP_OFFSET_REG_SET/CLR to replace __mxs_setl/clrl. As the result, and includsion can be removed from timer.c now. Signed-off-by: Shawn Guo --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/timer.c | 17 ++++++++--------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5a1f0c9e0ab0..2e4386cba23c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -480,6 +480,7 @@ config ARCH_MXS select MULTI_IRQ_HANDLER select PINCTRL select SPARSE_IRQ + select STMP_DEVICE select USE_OF help Support for Freescale MXS-based family of processors diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index f4dd96ff081a..a4d469b21d96 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -28,11 +28,10 @@ #include #include #include +#include #include #include -#include -#include /* * There are 2 versions of the timrot on Freescale MXS-based SoCs. @@ -85,20 +84,20 @@ static u32 timrot_major_version; static inline void timrot_irq_disable(void) { - __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ_EN, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR); } static inline void timrot_irq_enable(void) { - __mxs_setl(BM_TIMROT_TIMCTRLn_IRQ_EN, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_SET); } static void timrot_irq_acknowledge(void) { - __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR); } static cycle_t timrotv1_get_cycles(struct clocksource *cs) @@ -262,7 +261,7 @@ static void __init mxs_timer_init(struct device_node *np) /* * Initialize timers to a known state */ - mxs_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL); + stmp_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL); /* get timrot version */ timrot_major_version = __raw_readl(mxs_timrot_base + From c74512bf83f3568baf566265c5bd3b8a96ede353 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 20:16:52 +0800 Subject: [PATCH 10/30] ARM: mxs: move timer driver into drivers/clocksource Move mxs timer driver into drivers/clocksource as mxs_timer.c. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/Makefile | 2 +- drivers/clocksource/Makefile | 1 + arch/arm/mach-mxs/timer.c => drivers/clocksource/mxs_timer.c | 0 3 files changed, 2 insertions(+), 1 deletion(-) rename arch/arm/mach-mxs/timer.c => drivers/clocksource/mxs_timer.c (100%) diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 3d3c8a973062..76c336e6f5b5 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,5 @@ # Common support -obj-y := icoll.o ocotp.o system.o timer.o mm.o +obj-y := icoll.o ocotp.o system.o mm.o obj-$(CONFIG_PM) += pm.o diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 4d8283aec5b5..89c5adc498b3 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o +obj-$(CONFIG_ARCH_MXS) += mxs_timer.o obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o diff --git a/arch/arm/mach-mxs/timer.c b/drivers/clocksource/mxs_timer.c similarity index 100% rename from arch/arm/mach-mxs/timer.c rename to drivers/clocksource/mxs_timer.c From 8256aa7129f5d0d1692f6a18b83b66fef43405ed Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 21:13:22 +0800 Subject: [PATCH 11/30] ARM: mxs: get icoll base address from device tree Rather than using the static definition, it gets icoll base address with mapping from device tree. As the result, inclusion can be removed from the driver now. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/icoll.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index e26eeba46598..1cf32af1e3f6 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -22,9 +22,9 @@ #include #include #include +#include #include #include -#include #include #define HW_ICOLL_VECTOR 0x0000 @@ -38,7 +38,7 @@ #define ICOLL_NUM_IRQS 128 -static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); +static void __iomem *icoll_base; static struct irq_domain *icoll_domain; static void icoll_ack_irq(struct irq_data *d) @@ -103,6 +103,9 @@ static struct irq_domain_ops icoll_irq_domain_ops = { static void __init icoll_of_init(struct device_node *np, struct device_node *interrupt_parent) { + icoll_base = of_iomap(np, 0); + WARN_ON(!icoll_base); + /* * Interrupt Collector reset, which initializes the priority * for each irq to level 0. From cec6bae8ca0417002fa8e3376ab03198dcaaa82a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 21:20:05 +0800 Subject: [PATCH 12/30] ARM: mxs: call stmp_reset_block() in icoll Call stmp_reset_block() rather than mxs_reset_block(), so that inclusion can be removed from icoll driver. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/icoll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 1cf32af1e3f6..b4d620765cf1 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -24,8 +24,8 @@ #include #include #include +#include #include -#include #define HW_ICOLL_VECTOR 0x0000 #define HW_ICOLL_LEVELACK 0x0010 @@ -110,7 +110,7 @@ static void __init icoll_of_init(struct device_node *np, * Interrupt Collector reset, which initializes the priority * for each irq to level 0. */ - mxs_reset_block(icoll_base + HW_ICOLL_CTRL); + stmp_reset_block(icoll_base + HW_ICOLL_CTRL); icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS, &icoll_irq_domain_ops, NULL); From 6a8e95b071ecf7357d294782b6ef4e707ce0fbbd Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 21:34:51 +0800 Subject: [PATCH 13/30] ARM: mxs: move icoll driver into drivers/irqchip Move icoll.c into drivers/irqchip as irq-mxs.c, and along with the renaming, change the driver to use IRQCHIP_DECLARE. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/Makefile | 2 +- arch/arm/mach-mxs/include/mach/common.h | 3 --- arch/arm/mach-mxs/mach-mxs.c | 6 ++++-- drivers/irqchip/Makefile | 1 + .../mach-mxs/icoll.c => drivers/irqchip/irq-mxs.c | 13 +++---------- include/linux/irqchip/mxs.h | 14 ++++++++++++++ 6 files changed, 23 insertions(+), 16 deletions(-) rename arch/arm/mach-mxs/icoll.c => drivers/irqchip/irq-mxs.c (94%) create mode 100644 include/linux/irqchip/mxs.h diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 76c336e6f5b5..b934603e2765 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,5 @@ # Common support -obj-y := icoll.o ocotp.o system.o mm.o +obj-y := ocotp.o system.o mm.o obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index e043c4735b5a..df2a4ef14dae 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -22,7 +22,4 @@ extern void mx23_map_io(void); extern int mx28_clocks_init(void); extern void mx28_map_io(void); -extern void icoll_init_irq(void); -extern void icoll_handle_irq(struct pt_regs *); - #endif /* __MACH_MXS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index c1c0fb414c28..10506381b446 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -469,7 +471,7 @@ static const char *imx28_dt_compat[] __initdata = { DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") .map_io = mx23_map_io, - .init_irq = icoll_init_irq, + .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, .init_time = imx23_timer_init, .init_machine = mxs_machine_init, @@ -479,7 +481,7 @@ MACHINE_END DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") .map_io = mx28_map_io, - .init_irq = icoll_init_irq, + .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, .init_time = imx28_timer_init, .init_machine = mxs_machine_init, diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 98e3b87bdf1b..9d8f4f1c6e39 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o +obj-$(CONFIG_ARCH_MXS) += irq-mxs.o obj-$(CONFIG_METAG) += irq-metag-ext.o obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi.o diff --git a/arch/arm/mach-mxs/icoll.c b/drivers/irqchip/irq-mxs.c similarity index 94% rename from arch/arm/mach-mxs/icoll.c rename to drivers/irqchip/irq-mxs.c index b4d620765cf1..29889bbdcc6d 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/drivers/irqchip/irq-mxs.c @@ -27,6 +27,8 @@ #include #include +#include "irqchip.h" + #define HW_ICOLL_VECTOR 0x0000 #define HW_ICOLL_LEVELACK 0x0010 #define HW_ICOLL_CTRL 0x0020 @@ -116,13 +118,4 @@ static void __init icoll_of_init(struct device_node *np, &icoll_irq_domain_ops, NULL); WARN_ON(!icoll_domain); } - -static const struct of_device_id icoll_of_match[] __initconst = { - {.compatible = "fsl,icoll", .data = icoll_of_init}, - { /* sentinel */ } -}; - -void __init icoll_init_irq(void) -{ - of_irq_init(icoll_of_match); -} +IRQCHIP_DECLARE(mxs, "fsl,icoll", icoll_of_init); diff --git a/include/linux/irqchip/mxs.h b/include/linux/irqchip/mxs.h new file mode 100644 index 000000000000..9039a538a919 --- /dev/null +++ b/include/linux/irqchip/mxs.h @@ -0,0 +1,14 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_IRQCHIP_MXS_H +#define __LINUX_IRQCHIP_MXS_H + +extern void icoll_handle_irq(struct pt_regs *); + +#endif From 2835705c8a36667f862f27706cb6c84baa6ce636 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 25 Mar 2013 23:07:10 +0800 Subject: [PATCH 14/30] ARM: mxs: remove unneeded mach-types.h inclusion Remove the unneeded mach-types.h inclusion from mxs.h, which is a leftover from commit 845da6b (ARM: mxs: detect SoC by checking CHIPID register). Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/mxs.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h index 7d4fb6d0afda..a9be80a46500 100644 --- a/arch/arm/mach-mxs/include/mach/mxs.h +++ b/arch/arm/mach-mxs/include/mach/mxs.h @@ -22,7 +22,6 @@ #ifndef __ASSEMBLER__ #include #endif -#include #include #include From 38d6590f0f54ad85a7e841ef6c2c6f0fc8e2e832 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 26 Mar 2013 21:11:02 +0800 Subject: [PATCH 15/30] clk: mxs: get base address from device tree Instead of using the static definitions, get clkctrl and digctl base addresses with mapping from device tree. Use macro on variable is not nice, but it's done here to save huge pointless diff stat. Signed-off-by: Shawn Guo Acked-by: Mike Turquette --- arch/arm/boot/dts/imx23.dtsi | 1 + arch/arm/boot/dts/imx28.dtsi | 1 + drivers/clk/mxs/clk-imx23.c | 26 ++++++++++++++++++-------- drivers/clk/mxs/clk-imx28.c | 25 +++++++++++++++++-------- 4 files changed, 37 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 27ce8070e187..8d37aa7430a3 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -295,6 +295,7 @@ }; digctl@8001c000 { + compatible = "fsl,imx23-digctl"; reg = <0x8001c000 2000>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index c2f10d381f03..d306ff55e30f 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -647,6 +647,7 @@ }; digctl@8001c000 { + compatible = "fsl,imx28-digctl"; reg = <0x8001c000 0x2000>; interrupts = <89>; status = "disabled"; diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 46ae6bebe445..0c8fda48d0a2 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -15,11 +15,16 @@ #include #include #include +#include #include #include "clk.h" -#define DIGCTRL MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR) -#define CLKCTRL MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR) +static void __iomem *clkctrl; +static void __iomem *digctrl; + +#define CLKCTRL clkctrl +#define DIGCTRL digctrl + #define PLLCTRL0 (CLKCTRL + 0x0000) #define CPU (CLKCTRL + 0x0020) #define HBUS (CLKCTRL + 0x0030) @@ -100,6 +105,14 @@ int __init mx23_clocks_init(void) struct device_node *np; u32 i; + np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl"); + digctrl = of_iomap(np, 0); + WARN_ON(!digctrl); + + np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl"); + clkctrl = of_iomap(np, 0); + WARN_ON(!clkctrl); + clk_misc_init(); clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); @@ -152,12 +165,9 @@ int __init mx23_clocks_init(void) return PTR_ERR(clks[i]); } - np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl"); - if (np) { - clk_data.clks = clks; - clk_data.clk_num = ARRAY_SIZE(clks); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - } + clk_data.clks = clks; + clk_data.clk_num = ARRAY_SIZE(clks); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index fb30cd92b234..f623fdd93b46 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -15,10 +15,13 @@ #include #include #include +#include #include #include "clk.h" -#define CLKCTRL MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR) +static void __iomem *clkctrl; +#define CLKCTRL clkctrl + #define PLL0CTRL0 (CLKCTRL + 0x0000) #define PLL1CTRL0 (CLKCTRL + 0x0020) #define PLL2CTRL0 (CLKCTRL + 0x0040) @@ -52,7 +55,8 @@ #define BP_FRAC0_IO1FRAC 16 #define BP_FRAC0_IO0FRAC 24 -#define DIGCTRL MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR) +static void __iomem *digctrl; +#define DIGCTRL digctrl #define BP_SAIF_CLKMUX 10 /* @@ -155,6 +159,14 @@ int __init mx28_clocks_init(void) struct device_node *np; u32 i; + np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl"); + digctrl = of_iomap(np, 0); + WARN_ON(!digctrl); + + np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl"); + clkctrl = of_iomap(np, 0); + WARN_ON(!clkctrl); + clk_misc_init(); clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); @@ -230,12 +242,9 @@ int __init mx28_clocks_init(void) return PTR_ERR(clks[i]); } - np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl"); - if (np) { - clk_data.clks = clks; - clk_data.clk_num = ARRAY_SIZE(clks); - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - } + clk_data.clks = clks; + clk_data.clk_num = ARRAY_SIZE(clks); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); clk_register_clkdev(clks[enet_out], NULL, "enet_out"); From 0c672aae287ef0b9a12a1ca67c1ad7a4bbe470ac Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 26 Mar 2013 21:22:55 +0800 Subject: [PATCH 16/30] clk: mxs: remove the use of mach level IO accessor It removes the use of mach level IO accessor __mxs_setl/clrl, and hence removes mach header inclusion from clock driver. Signed-off-by: Shawn Guo Acked-by: Mike Turquette --- drivers/clk/mxs/clk-imx23.c | 11 +++++------ drivers/clk/mxs/clk-imx28.c | 13 ++++++------- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 0c8fda48d0a2..f6a74872f14e 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -16,7 +16,6 @@ #include #include #include -#include #include "clk.h" static void __iomem *clkctrl; @@ -52,10 +51,10 @@ static void __init clk_misc_init(void) u32 val; /* Gate off cpu clock in WFI for power saving */ - __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); + writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); /* Clear BYPASS for SAIF */ - __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ); + writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR); /* SAIF has to use frac div for functional operation */ val = readl_relaxed(SAIF); @@ -66,14 +65,14 @@ static void __init clk_misc_init(void) * Source ssp clock from ref_io than ref_xtal, * as ref_xtal only provides 24 MHz as maximum. */ - __mxs_clrl(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ); + writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR); /* * 480 MHz seems too high to be ssp clock source directly, * so set frac to get a 288 MHz ref_io. */ - __mxs_clrl(0x3f << BP_FRAC_IOFRAC, FRAC); - __mxs_setl(30 << BP_FRAC_IOFRAC, FRAC); + writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR); + writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET); } static const char *sel_pll[] __initconst = { "pll", "ref_xtal", }; diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index f623fdd93b46..d0e5eed146de 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -16,7 +16,6 @@ #include #include #include -#include #include "clk.h" static void __iomem *clkctrl; @@ -75,8 +74,8 @@ int mxs_saif_clkmux_select(unsigned int clkmux) if (clkmux > 0x3) return -EINVAL; - __mxs_clrl(0x3 << BP_SAIF_CLKMUX, DIGCTRL); - __mxs_setl(clkmux << BP_SAIF_CLKMUX, DIGCTRL); + writel_relaxed(0x3 << BP_SAIF_CLKMUX, DIGCTRL + CLR); + writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET); return 0; } @@ -86,13 +85,13 @@ static void __init clk_misc_init(void) u32 val; /* Gate off cpu clock in WFI for power saving */ - __mxs_setl(1 << BP_CPU_INTERRUPT_WAIT, CPU); + writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET); /* 0 is a bad default value for a divider */ - __mxs_setl(1 << BP_ENET_DIV_TIME, ENET); + writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET); /* Clear BYPASS for SAIF */ - __mxs_clrl(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ); + writel_relaxed(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ + CLR); /* SAIF has to use frac div for functional operation */ val = readl_relaxed(SAIF0); @@ -112,7 +111,7 @@ static void __init clk_misc_init(void) * Source ssp clock from ref_io than ref_xtal, * as ref_xtal only provides 24 MHz as maximum. */ - __mxs_clrl(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ); + writel_relaxed(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ + CLR); /* * 480 MHz seems too high to be ssp clock source directly, From 36d1da1d15743e8d25e2699a2edb19d7c492bec8 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 28 Mar 2013 23:13:14 +0800 Subject: [PATCH 17/30] rtc: stmp3xxx: use stmp_reset_block() instead The function stmp_reset_block() provides the exactly same functionality as mxs_reset_block(). So use stmp_reset_block() instead, so that inclusion can be removed. Signed-off-by: Shawn Guo Cc: Andrew Morton Cc: rtc-linux@googlegroups.com --- drivers/rtc/rtc-stmp3xxx.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/rtc/rtc-stmp3xxx.c b/drivers/rtc/rtc-stmp3xxx.c index 98f0d3c30738..67d26128bc85 100644 --- a/drivers/rtc/rtc-stmp3xxx.c +++ b/drivers/rtc/rtc-stmp3xxx.c @@ -30,8 +30,6 @@ #include #include -#include - #define STMP3XXX_RTC_CTRL 0x0 #define STMP3XXX_RTC_CTRL_SET 0x4 #define STMP3XXX_RTC_CTRL_CLR 0x8 @@ -271,7 +269,7 @@ static int stmp3xxx_rtc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, rtc_data); - mxs_reset_block(rtc_data->io); + stmp_reset_block(rtc_data->io); writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN | STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE, @@ -319,7 +317,7 @@ static int stmp3xxx_rtc_resume(struct platform_device *dev) { struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(dev); - mxs_reset_block(rtc_data->io); + stmp_reset_block(rtc_data->io); writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN | STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN | STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE, From 987869aa4afd442a40afa6e760a88cf8d5728c55 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 28 Mar 2013 23:18:33 +0800 Subject: [PATCH 18/30] iio: mxs-lradc: remove unneeded mach header inclusion Headers and are not used in the driver at all. Removed the inclusions. Signed-off-by: Shawn Guo Acked-by: Jonathan Cameron --- drivers/staging/iio/adc/mxs-lradc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/staging/iio/adc/mxs-lradc.c b/drivers/staging/iio/adc/mxs-lradc.c index 55a459b61907..0eb5b4d759e5 100644 --- a/drivers/staging/iio/adc/mxs-lradc.c +++ b/drivers/staging/iio/adc/mxs-lradc.c @@ -36,9 +36,6 @@ #include #include -#include -#include - #include #include #include From 114fe75defb04c03c100ed22617108165d546abe Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 28 Mar 2013 23:21:16 +0800 Subject: [PATCH 19/30] ASoC: mxs-saif: remove mach header inclusion The header is not needed at all, and is needed only for macros MXS_SET_ADDR and MXS_CLR_ADDR. Define the macros and remove the mach header inclusions. Signed-off-by: Shawn Guo Acked-by: Mark Brown --- sound/soc/mxs/mxs-saif.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 3a2aa1d19b93..41a6136e3535 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -33,11 +33,12 @@ #include #include #include -#include -#include #include "mxs-saif.h" +#define MXS_SET_ADDR 0x4 +#define MXS_CLR_ADDR 0x8 + static struct mxs_saif *mxs_saif[2]; /* From c226221359f3edf2f53c802dd60f69b7295a3f5c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 28 Mar 2013 23:30:57 +0800 Subject: [PATCH 20/30] ARM: mxs: remove empty hardware.h The hardware.h is an empty header and used nowhere now. Remmove it. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/hardware.h | 23 ----------------------- arch/arm/mach-mxs/include/mach/mxs.h | 1 - 2 files changed, 24 deletions(-) delete mode 100644 arch/arm/mach-mxs/include/mach/hardware.h diff --git a/arch/arm/mach-mxs/include/mach/hardware.h b/arch/arm/mach-mxs/include/mach/hardware.h deleted file mode 100644 index 4c0e8a64d8c7..000000000000 --- a/arch/arm/mach-mxs/include/mach/hardware.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_MXS_HARDWARE_H__ -#define __MACH_MXS_HARDWARE_H__ - -#endif /* __MACH_MXS_HARDWARE_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h index a9be80a46500..5820b047ea2e 100644 --- a/arch/arm/mach-mxs/include/mach/mxs.h +++ b/arch/arm/mach-mxs/include/mach/mxs.h @@ -23,7 +23,6 @@ #include #endif #include -#include /* * IO addresses common to MXS-based From 8f7cf8815f7d87534dda3657f03e925e58c1f5e1 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 09:33:09 +0800 Subject: [PATCH 21/30] ARM: mxs: get reset address from device tree Instead of using static address definition, get reset address from device tree with mapping, so that core_initcall mxs_arch_reset_init() can be killed. The "rtc" clock code in mxs_arch_reset_init() seems to be zombie, since there is no clk lookup defined in clock driver at all. Remove it together. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23.dtsi | 2 +- arch/arm/boot/dts/imx28.dtsi | 2 +- arch/arm/mach-mxs/system.c | 36 +++++++++++++++++------------------- 3 files changed, 19 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 8d37aa7430a3..30b410b2e243 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -361,7 +361,7 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx23-clkctrl"; + compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index d306ff55e30f..56d84bf208c7 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -756,7 +756,7 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx28-clkctrl"; + compatible = "fsl,imx28-clkctrl", "fsl,clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c index 30042e23bfa7..2d64ee9bbd3f 100644 --- a/arch/arm/mach-mxs/system.c +++ b/arch/arm/mach-mxs/system.c @@ -23,6 +23,8 @@ #include #include #include +#include +#include #include #include @@ -37,41 +39,37 @@ #define MXS_MODULE_CLKGATE (1 << 30) #define MXS_MODULE_SFTRST (1 << 31) -static void __iomem *mxs_clkctrl_reset_addr; - /* * Reset the system. It is called by machine_restart(). */ void mxs_restart(char mode, const char *cmd) { + struct device_node *np; + void __iomem *reset_addr; + + np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl"); + reset_addr = of_iomap(np, 0); + if (!reset_addr) + goto soft; + + if (of_device_is_compatible(np, "fsl,imx23-clkctrl")) + reset_addr += MX23_CLKCTRL_RESET_OFFSET; + else + reset_addr += MX28_CLKCTRL_RESET_OFFSET; + /* reset the chip */ - __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); + __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr); pr_err("Failed to assert the chip reset\n"); /* Delay to allow the serial port to show the message */ mdelay(50); +soft: /* We'll take a jump through zero as a poor second */ soft_restart(0); } -static int __init mxs_arch_reset_init(void) -{ - struct clk *clk; - - mxs_clkctrl_reset_addr = MXS_IO_ADDRESS(MXS_CLKCTRL_BASE_ADDR) + - (cpu_is_mx23() ? MX23_CLKCTRL_RESET_OFFSET : - MX28_CLKCTRL_RESET_OFFSET); - - clk = clk_get_sys("rtc", NULL); - if (!IS_ERR(clk)) - clk_prepare_enable(clk); - - return 0; -} -core_initcall(mxs_arch_reset_init); - /* * Clear the bit and poll it cleared. This is usually called with * a reset address and mask being either SFTRST(bit 31) or CLKGATE From 974a9af5320028bad0c4c17a67353edc4e5a1997 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 09:45:31 +0800 Subject: [PATCH 22/30] ARM: mxs: remove system.c There is no user of function mxs_reset_block() now. Let's move mxs_restart() into mach-mxs.c as a static function and remove system.c completely. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/Makefile | 2 +- arch/arm/mach-mxs/include/mach/common.h | 2 - arch/arm/mach-mxs/mach-mxs.c | 37 +++++++ arch/arm/mach-mxs/system.c | 137 ------------------------ 4 files changed, 38 insertions(+), 140 deletions(-) delete mode 100644 arch/arm/mach-mxs/system.c diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index b934603e2765..5339973d503f 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,5 @@ # Common support -obj-y := ocotp.o system.o mm.o +obj-y := ocotp.o mm.o obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index df2a4ef14dae..b7946a62d350 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -12,8 +12,6 @@ #define __MACH_MXS_COMMON_H__ extern const u32 *mxs_get_ocotp(void); -extern int mxs_reset_block(void __iomem *); -extern void mxs_restart(char, const char *); extern int mxs_saif_clkmux_select(unsigned int clkmux); extern int mx23_clocks_init(void); diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 10506381b446..c192fd62ebef 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -22,11 +22,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -459,6 +461,41 @@ static void __init mxs_machine_init(void) imx28_evk_post_init(); } +#define MX23_CLKCTRL_RESET_OFFSET 0x120 +#define MX28_CLKCTRL_RESET_OFFSET 0x1e0 +#define MXS_CLKCTRL_RESET_CHIP (1 << 1) + +/* + * Reset the system. It is called by machine_restart(). + */ +static void mxs_restart(char mode, const char *cmd) +{ + struct device_node *np; + void __iomem *reset_addr; + + np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl"); + reset_addr = of_iomap(np, 0); + if (!reset_addr) + goto soft; + + if (of_device_is_compatible(np, "fsl,imx23-clkctrl")) + reset_addr += MX23_CLKCTRL_RESET_OFFSET; + else + reset_addr += MX28_CLKCTRL_RESET_OFFSET; + + /* reset the chip */ + __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr); + + pr_err("Failed to assert the chip reset\n"); + + /* Delay to allow the serial port to show the message */ + mdelay(50); + +soft: + /* We'll take a jump through zero as a poor second */ + soft_restart(0); +} + static const char *imx23_dt_compat[] __initdata = { "fsl,imx23", NULL, diff --git a/arch/arm/mach-mxs/system.c b/arch/arm/mach-mxs/system.c deleted file mode 100644 index 2d64ee9bbd3f..000000000000 --- a/arch/arm/mach-mxs/system.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2006-2007,2010 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#define MX23_CLKCTRL_RESET_OFFSET 0x120 -#define MX28_CLKCTRL_RESET_OFFSET 0x1e0 -#define MXS_CLKCTRL_RESET_CHIP (1 << 1) - -#define MXS_MODULE_CLKGATE (1 << 30) -#define MXS_MODULE_SFTRST (1 << 31) - -/* - * Reset the system. It is called by machine_restart(). - */ -void mxs_restart(char mode, const char *cmd) -{ - struct device_node *np; - void __iomem *reset_addr; - - np = of_find_compatible_node(NULL, NULL, "fsl,clkctrl"); - reset_addr = of_iomap(np, 0); - if (!reset_addr) - goto soft; - - if (of_device_is_compatible(np, "fsl,imx23-clkctrl")) - reset_addr += MX23_CLKCTRL_RESET_OFFSET; - else - reset_addr += MX28_CLKCTRL_RESET_OFFSET; - - /* reset the chip */ - __mxs_setl(MXS_CLKCTRL_RESET_CHIP, reset_addr); - - pr_err("Failed to assert the chip reset\n"); - - /* Delay to allow the serial port to show the message */ - mdelay(50); - -soft: - /* We'll take a jump through zero as a poor second */ - soft_restart(0); -} - -/* - * Clear the bit and poll it cleared. This is usually called with - * a reset address and mask being either SFTRST(bit 31) or CLKGATE - * (bit 30). - */ -static int clear_poll_bit(void __iomem *addr, u32 mask) -{ - int timeout = 0x400; - - /* clear the bit */ - __mxs_clrl(mask, addr); - - /* - * SFTRST needs 3 GPMI clocks to settle, the reference manual - * recommends to wait 1us. - */ - udelay(1); - - /* poll the bit becoming clear */ - while ((__raw_readl(addr) & mask) && --timeout) - /* nothing */; - - return !timeout; -} - -int mxs_reset_block(void __iomem *reset_addr) -{ - int ret; - int timeout = 0x400; - - /* clear and poll SFTRST */ - ret = clear_poll_bit(reset_addr, MXS_MODULE_SFTRST); - if (unlikely(ret)) - goto error; - - /* clear CLKGATE */ - __mxs_clrl(MXS_MODULE_CLKGATE, reset_addr); - - /* set SFTRST to reset the block */ - __mxs_setl(MXS_MODULE_SFTRST, reset_addr); - udelay(1); - - /* poll CLKGATE becoming set */ - while ((!(__raw_readl(reset_addr) & MXS_MODULE_CLKGATE)) && --timeout) - /* nothing */; - if (unlikely(!timeout)) - goto error; - - /* clear and poll SFTRST */ - ret = clear_poll_bit(reset_addr, MXS_MODULE_SFTRST); - if (unlikely(ret)) - goto error; - - /* clear and poll CLKGATE */ - ret = clear_poll_bit(reset_addr, MXS_MODULE_CLKGATE); - if (unlikely(ret)) - goto error; - - return 0; - -error: - pr_err("%s(%p): module reset timeout\n", __func__, reset_addr); - return -ETIMEDOUT; -} -EXPORT_SYMBOL(mxs_reset_block); From 69d75a02db28c8bb04a4a70b1a577d571fc8e800 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 09:59:28 +0800 Subject: [PATCH 23/30] ARM: mxs: get ocotp base address from device tree Instead of using the static definitions, get ocotp base address from device tree with mapping. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23.dtsi | 1 + arch/arm/boot/dts/imx28.dtsi | 1 + arch/arm/mach-mxs/ocotp.c | 9 ++++++++- 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 30b410b2e243..ad2d79324cd3 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -322,6 +322,7 @@ }; ocotp@8002c000 { + compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 56d84bf208c7..64af2381c1b0 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -677,6 +677,7 @@ }; ocotp@8002c000 { + compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; }; diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index 1dff46703753..c2002eb2655e 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include #include /* for cpu_relax() */ @@ -33,7 +35,8 @@ static u32 ocotp_words[OCOTP_WORD_COUNT]; const u32 *mxs_get_ocotp(void) { - void __iomem *ocotp_base = MXS_IO_ADDRESS(MXS_OCOTP_BASE_ADDR); + struct device_node *np; + void __iomem *ocotp_base; int timeout = 0x400; size_t i; static int once = 0; @@ -41,6 +44,10 @@ const u32 *mxs_get_ocotp(void) if (once) return ocotp_words; + np = of_find_compatible_node(NULL, NULL, "fsl,ocotp"); + ocotp_base = of_iomap(np, 0); + WARN_ON(!ocotp_base); + mutex_lock(&ocotp_mutex); /* From 1f629564d08d44e1960800f96b1c6ad19e44b4ae Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 13:07:34 +0800 Subject: [PATCH 24/30] ARM: mxs: use debug_ll_io_init for low-level debug The only user of the static mapping done in mx23_map_io and mx28_map_io is low-level debug now. Use debug_ll_io_init() instead, so that the static mapping is used nowhere and can be removed completely later. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/debug-macro.S | 9 +++------ arch/arm/mach-mxs/mach-mxs.c | 5 +++-- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-mxs/include/mach/debug-macro.S b/arch/arm/mach-mxs/include/mach/debug-macro.S index 90c6b7836ad3..d86951551ca1 100644 --- a/arch/arm/mach-mxs/include/mach/debug-macro.S +++ b/arch/arm/mach-mxs/include/mach/debug-macro.S @@ -11,16 +11,13 @@ * */ -#include -#include - #ifdef CONFIG_DEBUG_IMX23_UART -#define UART_PADDR MX23_DUART_BASE_ADDR +#define UART_PADDR 0x80070000 #elif defined (CONFIG_DEBUG_IMX28_UART) -#define UART_PADDR MX28_DUART_BASE_ADDR +#define UART_PADDR 0x80074000 #endif -#define UART_VADDR MXS_IO_ADDRESS(UART_PADDR) +#define UART_VADDR 0xfe100000 .macro addruart, rp, rv, tmp ldr \rp, =UART_PADDR @ physical diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index c192fd62ebef..069049200eb4 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -507,7 +508,7 @@ static const char *imx28_dt_compat[] __initdata = { }; DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") - .map_io = mx23_map_io, + .map_io = debug_ll_io_init, .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, .init_time = imx23_timer_init, @@ -517,7 +518,7 @@ DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") MACHINE_END DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") - .map_io = mx28_map_io, + .map_io = debug_ll_io_init, .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, .init_time = imx28_timer_init, From 0265b6cbfe77f0064989852a2b52d6572957525c Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 13:15:53 +0800 Subject: [PATCH 25/30] ARM: mxs: remove mm.c The static mapping is used nowhere now. Hence mm.c can be removed completely. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/Makefile | 2 +- arch/arm/mach-mxs/include/mach/common.h | 2 - arch/arm/mach-mxs/mm.c | 52 ------------------------- 3 files changed, 1 insertion(+), 55 deletions(-) delete mode 100644 arch/arm/mach-mxs/mm.c diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 5339973d503f..2568d24358ef 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,5 @@ # Common support -obj-y := ocotp.o mm.o +obj-y := ocotp.o obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index b7946a62d350..79cb572c092d 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -15,9 +15,7 @@ extern const u32 *mxs_get_ocotp(void); extern int mxs_saif_clkmux_select(unsigned int clkmux); extern int mx23_clocks_init(void); -extern void mx23_map_io(void); extern int mx28_clocks_init(void); -extern void mx28_map_io(void); #endif /* __MACH_MXS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c deleted file mode 100644 index e63b7d87acbd..000000000000 --- a/arch/arm/mach-mxs/mm.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - * - * Create static mapping between physical to virtual memory. - */ - -#include -#include - -#include - -#include -#include -#include - -/* - * Define the MX23 memory map. - */ -static struct map_desc mx23_io_desc[] __initdata = { - mxs_map_entry(MX23, OCRAM, MT_DEVICE), - mxs_map_entry(MX23, IO, MT_DEVICE), -}; - -/* - * Define the MX28 memory map. - */ -static struct map_desc mx28_io_desc[] __initdata = { - mxs_map_entry(MX28, OCRAM, MT_DEVICE), - mxs_map_entry(MX28, IO, MT_DEVICE), -}; - -/* - * This function initializes the memory map. It is called during the - * system startup to create static physical to virtual memory mappings - * for the IO modules. - */ -void __init mx23_map_io(void) -{ - iotable_init(mx23_io_desc, ARRAY_SIZE(mx23_io_desc)); -} - -void __init mx28_map_io(void) -{ - iotable_init(mx28_io_desc, ARRAY_SIZE(mx28_io_desc)); -} From 1bff2d76ac88d59e45d2ba0d1103be210a9eca11 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 13:27:55 +0800 Subject: [PATCH 26/30] ARM: mxs: move mxs_get_ocotp() into mach-mxs.c All the users of mxs_get_ocotp() are in mach-mxs.c. Move the function into mach-mxs.c, make it a static function, and then remove ocotp.c. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/Makefile | 4 - arch/arm/mach-mxs/include/mach/common.h | 1 - arch/arm/mach-mxs/mach-mxs.c | 76 ++++++++++++++++++ arch/arm/mach-mxs/ocotp.c | 100 ------------------------ 4 files changed, 76 insertions(+), 105 deletions(-) delete mode 100644 arch/arm/mach-mxs/ocotp.c diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 2568d24358ef..80db7269760e 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,6 +1,2 @@ -# Common support -obj-y := ocotp.o - obj-$(CONFIG_PM) += pm.o - obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index 79cb572c092d..aca982c6d43f 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -11,7 +11,6 @@ #ifndef __MACH_MXS_COMMON_H__ #define __MACH_MXS_COMMON_H__ -extern const u32 *mxs_get_ocotp(void); extern int mxs_saif_clkmux_select(unsigned int clkmux); extern int mx23_clocks_init(void); diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 069049200eb4..f346c432cda2 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -183,6 +183,82 @@ static void __init imx28_timer_init(void) clocksource_of_init(); } +#define OCOTP_WORD_OFFSET 0x20 +#define OCOTP_WORD_COUNT 0x20 + +#define BM_OCOTP_CTRL_BUSY (1 << 8) +#define BM_OCOTP_CTRL_ERROR (1 << 9) +#define BM_OCOTP_CTRL_RD_BANK_OPEN (1 << 12) + +static DEFINE_MUTEX(ocotp_mutex); +static u32 ocotp_words[OCOTP_WORD_COUNT]; + +static const u32 *mxs_get_ocotp(void) +{ + struct device_node *np; + void __iomem *ocotp_base; + int timeout = 0x400; + size_t i; + static int once; + + if (once) + return ocotp_words; + + np = of_find_compatible_node(NULL, NULL, "fsl,ocotp"); + ocotp_base = of_iomap(np, 0); + WARN_ON(!ocotp_base); + + mutex_lock(&ocotp_mutex); + + /* + * clk_enable(hbus_clk) for ocotp can be skipped + * as it must be on when system is running. + */ + + /* try to clear ERROR bit */ + __mxs_clrl(BM_OCOTP_CTRL_ERROR, ocotp_base); + + /* check both BUSY and ERROR cleared */ + while ((__raw_readl(ocotp_base) & + (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)) && --timeout) + cpu_relax(); + + if (unlikely(!timeout)) + goto error_unlock; + + /* open OCOTP banks for read */ + __mxs_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); + + /* approximately wait 32 hclk cycles */ + udelay(1); + + /* poll BUSY bit becoming cleared */ + timeout = 0x400; + while ((__raw_readl(ocotp_base) & BM_OCOTP_CTRL_BUSY) && --timeout) + cpu_relax(); + + if (unlikely(!timeout)) + goto error_unlock; + + for (i = 0; i < OCOTP_WORD_COUNT; i++) + ocotp_words[i] = __raw_readl(ocotp_base + OCOTP_WORD_OFFSET + + i * 0x10); + + /* close banks for power saving */ + __mxs_clrl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); + + once = 1; + + mutex_unlock(&ocotp_mutex); + + return ocotp_words; + +error_unlock: + mutex_unlock(&ocotp_mutex); + pr_err("%s: timeout in reading OCOTP\n", __func__); + return NULL; +} + enum mac_oui { OUI_FSL, OUI_DENX, diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c deleted file mode 100644 index c2002eb2655e..000000000000 --- a/arch/arm/mach-mxs/ocotp.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -#include /* for cpu_relax() */ - -#include -#include - -#define OCOTP_WORD_OFFSET 0x20 -#define OCOTP_WORD_COUNT 0x20 - -#define BM_OCOTP_CTRL_BUSY (1 << 8) -#define BM_OCOTP_CTRL_ERROR (1 << 9) -#define BM_OCOTP_CTRL_RD_BANK_OPEN (1 << 12) - -static DEFINE_MUTEX(ocotp_mutex); -static u32 ocotp_words[OCOTP_WORD_COUNT]; - -const u32 *mxs_get_ocotp(void) -{ - struct device_node *np; - void __iomem *ocotp_base; - int timeout = 0x400; - size_t i; - static int once = 0; - - if (once) - return ocotp_words; - - np = of_find_compatible_node(NULL, NULL, "fsl,ocotp"); - ocotp_base = of_iomap(np, 0); - WARN_ON(!ocotp_base); - - mutex_lock(&ocotp_mutex); - - /* - * clk_enable(hbus_clk) for ocotp can be skipped - * as it must be on when system is running. - */ - - /* try to clear ERROR bit */ - __mxs_clrl(BM_OCOTP_CTRL_ERROR, ocotp_base); - - /* check both BUSY and ERROR cleared */ - while ((__raw_readl(ocotp_base) & - (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)) && --timeout) - cpu_relax(); - - if (unlikely(!timeout)) - goto error_unlock; - - /* open OCOTP banks for read */ - __mxs_setl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); - - /* approximately wait 32 hclk cycles */ - udelay(1); - - /* poll BUSY bit becoming cleared */ - timeout = 0x400; - while ((__raw_readl(ocotp_base) & BM_OCOTP_CTRL_BUSY) && --timeout) - cpu_relax(); - - if (unlikely(!timeout)) - goto error_unlock; - - for (i = 0; i < OCOTP_WORD_COUNT; i++) - ocotp_words[i] = __raw_readl(ocotp_base + OCOTP_WORD_OFFSET + - i * 0x10); - - /* close banks for power saving */ - __mxs_clrl(BM_OCOTP_CTRL_RD_BANK_OPEN, ocotp_base); - - once = 1; - - mutex_unlock(&ocotp_mutex); - - return ocotp_words; - -error_unlock: - mutex_unlock(&ocotp_mutex); - pr_err("%s: timeout in reading OCOTP\n", __func__); - return NULL; -} From 3cb7825bdc84d1d6c81ac9a2be201fe5bea5de05 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 13:36:05 +0800 Subject: [PATCH 27/30] ARM: mxs: remove common.h All three remaining functions declared in common.h are implemented by clock driver. Create header include/linux/clk/mxs.h to contain them and remove common.h. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/common.h | 20 -------------------- arch/arm/mach-mxs/mach-mxs.c | 2 +- include/linux/clk/mxs.h | 16 ++++++++++++++++ 3 files changed, 17 insertions(+), 21 deletions(-) delete mode 100644 arch/arm/mach-mxs/include/mach/common.h create mode 100644 include/linux/clk/mxs.h diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h deleted file mode 100644 index aca982c6d43f..000000000000 --- a/arch/arm/mach-mxs/include/mach/common.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_MXS_COMMON_H__ -#define __MACH_MXS_COMMON_H__ - -extern int mxs_saif_clkmux_select(unsigned int clkmux); - -extern int mx23_clocks_init(void); - -extern int mx28_clocks_init(void); - -#endif /* __MACH_MXS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index f346c432cda2..fc762579d30f 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -30,7 +31,6 @@ #include #include #include -#include #include #include diff --git a/include/linux/clk/mxs.h b/include/linux/clk/mxs.h new file mode 100644 index 000000000000..90c30dc3efc7 --- /dev/null +++ b/include/linux/clk/mxs.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_CLK_MXS_H +#define __LINUX_CLK_MXS_H + +int mx23_clocks_init(void); +int mx28_clocks_init(void); +int mxs_saif_clkmux_select(unsigned int clkmux); + +#endif From 39490ab0ff49138c8613d95ea13b79c8159f306f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 14:04:07 +0800 Subject: [PATCH 28/30] ARM: mxs: merge imx23 and imx28 into one machine_desc Most of the function hooks are same between imx23 and imx28 machine_desc, so merge them into one. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/mach-mxs.c | 43 +++++++++++------------------------- 1 file changed, 13 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index fc762579d30f..a6e1ccb05066 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -171,18 +171,6 @@ static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { { /* sentinel */ } }; -static void __init imx23_timer_init(void) -{ - mx23_clocks_init(); - clocksource_of_init(); -} - -static void __init imx28_timer_init(void) -{ - mx28_clocks_init(); - clocksource_of_init(); -} - #define OCOTP_WORD_OFFSET 0x20 #define OCOTP_WORD_COUNT 0x20 @@ -573,32 +561,27 @@ static void mxs_restart(char mode, const char *cmd) soft_restart(0); } -static const char *imx23_dt_compat[] __initdata = { - "fsl,imx23", - NULL, -}; +static void __init mxs_timer_init(void) +{ + if (of_machine_is_compatible("fsl,imx23")) + mx23_clocks_init(); + else + mx28_clocks_init(); + clocksource_of_init(); +} -static const char *imx28_dt_compat[] __initdata = { +static const char *mxs_dt_compat[] __initdata = { "fsl,imx28", + "fsl,imx23", NULL, }; -DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)") - .map_io = debug_ll_io_init, - .init_irq = irqchip_init, - .handle_irq = icoll_handle_irq, - .init_time = imx23_timer_init, - .init_machine = mxs_machine_init, - .dt_compat = imx23_dt_compat, - .restart = mxs_restart, -MACHINE_END - -DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") +DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)") .map_io = debug_ll_io_init, .init_irq = irqchip_init, .handle_irq = icoll_handle_irq, - .init_time = imx28_timer_init, + .init_time = mxs_timer_init, .init_machine = mxs_machine_init, - .dt_compat = imx28_dt_compat, + .dt_compat = mxs_dt_compat, .restart = mxs_restart, MACHINE_END From 0b48d3a6fbac641d1da12bbe202ec82ff0c89148 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Fri, 29 Mar 2013 13:53:11 +0800 Subject: [PATCH 29/30] ARM: mxs: remove unused headers Most of the stuff in the headers are used nowhere now. Move a few things that are useful for mach-mxs.c into there and remove the headers. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/digctl.h | 22 --- arch/arm/mach-mxs/include/mach/mx23.h | 169 ------------------ arch/arm/mach-mxs/include/mach/mx28.h | 225 ------------------------ arch/arm/mach-mxs/include/mach/mxs.h | 115 ------------ arch/arm/mach-mxs/mach-mxs.c | 29 ++- 5 files changed, 27 insertions(+), 533 deletions(-) delete mode 100644 arch/arm/mach-mxs/include/mach/digctl.h delete mode 100644 arch/arm/mach-mxs/include/mach/mx23.h delete mode 100644 arch/arm/mach-mxs/include/mach/mx28.h delete mode 100644 arch/arm/mach-mxs/include/mach/mxs.h diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h deleted file mode 100644 index 17964066303f..000000000000 --- a/arch/arm/mach-mxs/include/mach/digctl.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __MACH_DIGCTL_H__ -#define __MACH_DIGCTL_H__ - -/* MXS DIGCTL SAIF CLKMUX */ -#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0 -#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1 -#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2 -#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3 - -#define HW_DIGCTL_CTRL 0x0 -#define BP_DIGCTL_CTRL_SAIF_CLKMUX 10 -#define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10) -#define HW_DIGCTL_CHIPID 0x310 -#endif diff --git a/arch/arm/mach-mxs/include/mach/mx23.h b/arch/arm/mach-mxs/include/mach/mx23.h deleted file mode 100644 index 599094bc99de..000000000000 --- a/arch/arm/mach-mxs/include/mach/mx23.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_MX23_H__ -#define __MACH_MX23_H__ - -#include - -/* - * OCRAM - */ -#define MX23_OCRAM_BASE_ADDR 0x00000000 -#define MX23_OCRAM_SIZE SZ_32K - -/* - * IO - */ -#define MX23_IO_BASE_ADDR 0x80000000 -#define MX23_IO_SIZE SZ_1M - -#define MX23_ICOLL_BASE_ADDR (MX23_IO_BASE_ADDR + 0x000000) -#define MX23_APBH_DMA_BASE_ADDR (MX23_IO_BASE_ADDR + 0x004000) -#define MX23_BCH_BASE_ADDR (MX23_IO_BASE_ADDR + 0x00a000) -#define MX23_GPMI_BASE_ADDR (MX23_IO_BASE_ADDR + 0x00c000) -#define MX23_SSP1_BASE_ADDR (MX23_IO_BASE_ADDR + 0x010000) -#define MX23_PINCTRL_BASE_ADDR (MX23_IO_BASE_ADDR + 0x018000) -#define MX23_DIGCTL_BASE_ADDR (MX23_IO_BASE_ADDR + 0x01c000) -#define MX23_ETM_BASE_ADDR (MX23_IO_BASE_ADDR + 0x020000) -#define MX23_APBX_DMA_BASE_ADDR (MX23_IO_BASE_ADDR + 0x024000) -#define MX23_DCP_BASE_ADDR (MX23_IO_BASE_ADDR + 0x028000) -#define MX23_PXP_BASE_ADDR (MX23_IO_BASE_ADDR + 0x02a000) -#define MX23_OCOTP_BASE_ADDR (MX23_IO_BASE_ADDR + 0x02c000) -#define MX23_AXI_AHB0_BASE_ADDR (MX23_IO_BASE_ADDR + 0x02e000) -#define MX23_LCDIF_BASE_ADDR (MX23_IO_BASE_ADDR + 0x030000) -#define MX23_SSP2_BASE_ADDR (MX23_IO_BASE_ADDR + 0x034000) -#define MX23_TVENC_BASE_ADDR (MX23_IO_BASE_ADDR + 0x038000) -#define MX23_CLKCTRL_BASE_ADDR (MX23_IO_BASE_ADDR + 0x040000) -#define MX23_SAIF0_BASE_ADDR (MX23_IO_BASE_ADDR + 0x042000) -#define MX23_POWER_BASE_ADDR (MX23_IO_BASE_ADDR + 0x044000) -#define MX23_SAIF1_BASE_ADDR (MX23_IO_BASE_ADDR + 0x046000) -#define MX23_AUDIOOUT_BASE_ADDR (MX23_IO_BASE_ADDR + 0x048000) -#define MX23_AUDIOIN_BASE_ADDR (MX23_IO_BASE_ADDR + 0x04c000) -#define MX23_LRADC_BASE_ADDR (MX23_IO_BASE_ADDR + 0x050000) -#define MX23_SPDIF_BASE_ADDR (MX23_IO_BASE_ADDR + 0x054000) -#define MX23_I2C_BASE_ADDR (MX23_IO_BASE_ADDR + 0x058000) -#define MX23_RTC_BASE_ADDR (MX23_IO_BASE_ADDR + 0x05c000) -#define MX23_PWM_BASE_ADDR (MX23_IO_BASE_ADDR + 0x064000) -#define MX23_TIMROT_BASE_ADDR (MX23_IO_BASE_ADDR + 0x068000) -#define MX23_AUART1_BASE_ADDR (MX23_IO_BASE_ADDR + 0x06c000) -#define MX23_AUART2_BASE_ADDR (MX23_IO_BASE_ADDR + 0x06e000) -#define MX23_DUART_BASE_ADDR (MX23_IO_BASE_ADDR + 0x070000) -#define MX23_USBPHY_BASE_ADDR (MX23_IO_BASE_ADDR + 0x07c000) -#define MX23_USBCTRL_BASE_ADDR (MX23_IO_BASE_ADDR + 0x080000) -#define MX23_DRAM_BASE_ADDR (MX23_IO_BASE_ADDR + 0x0e0000) - -#define MX23_IO_P2V(x) MXS_IO_P2V(x) -#define MX23_IO_ADDRESS(x) IOMEM(MX23_IO_P2V(x)) - -/* - * IRQ - */ -#define MX23_INT_DUART 0 -#define MX23_INT_COMMS_RX 1 -#define MX23_INT_COMMS_TX 1 -#define MX23_INT_SSP2_ERROR 2 -#define MX23_INT_VDD5V 3 -#define MX23_INT_HEADPHONE_SHORT 4 -#define MX23_INT_DAC_DMA 5 -#define MX23_INT_DAC_ERROR 6 -#define MX23_INT_ADC_DMA 7 -#define MX23_INT_ADC_ERROR 8 -#define MX23_INT_SPDIF_DMA 9 -#define MX23_INT_SAIF2_DMA 9 -#define MX23_INT_SPDIF_ERROR 10 -#define MX23_INT_SAIF1_IRQ 10 -#define MX23_INT_SAIF2_IRQ 10 -#define MX23_INT_USB_CTRL 11 -#define MX23_INT_USB_WAKEUP 12 -#define MX23_INT_GPMI_DMA 13 -#define MX23_INT_SSP1_DMA 14 -#define MX23_INT_SSP1_ERROR 15 -#define MX23_INT_GPIO0 16 -#define MX23_INT_GPIO1 17 -#define MX23_INT_GPIO2 18 -#define MX23_INT_SAIF1_DMA 19 -#define MX23_INT_SSP2_DMA 20 -#define MX23_INT_ECC8_IRQ 21 -#define MX23_INT_RTC_ALARM 22 -#define MX23_INT_AUART1_TX_DMA 23 -#define MX23_INT_AUART1 24 -#define MX23_INT_AUART1_RX_DMA 25 -#define MX23_INT_I2C_DMA 26 -#define MX23_INT_I2C_ERROR 27 -#define MX23_INT_TIMER0 28 -#define MX23_INT_TIMER1 29 -#define MX23_INT_TIMER2 30 -#define MX23_INT_TIMER3 31 -#define MX23_INT_BATT_BRNOUT 32 -#define MX23_INT_VDDD_BRNOUT 33 -#define MX23_INT_VDDIO_BRNOUT 34 -#define MX23_INT_VDD18_BRNOUT 35 -#define MX23_INT_TOUCH_DETECT 36 -#define MX23_INT_LRADC_CH0 37 -#define MX23_INT_LRADC_CH1 38 -#define MX23_INT_LRADC_CH2 39 -#define MX23_INT_LRADC_CH3 40 -#define MX23_INT_LRADC_CH4 41 -#define MX23_INT_LRADC_CH5 42 -#define MX23_INT_LRADC_CH6 43 -#define MX23_INT_LRADC_CH7 44 -#define MX23_INT_LCDIF_DMA 45 -#define MX23_INT_LCDIF_ERROR 46 -#define MX23_INT_DIGCTL_DEBUG_TRAP 47 -#define MX23_INT_RTC_1MSEC 48 -#define MX23_INT_DRI_DMA 49 -#define MX23_INT_DRI_ATTENTION 50 -#define MX23_INT_GPMI_ATTENTION 51 -#define MX23_INT_IR 52 -#define MX23_INT_DCP_VMI 53 -#define MX23_INT_DCP 54 -#define MX23_INT_BCH 56 -#define MX23_INT_PXP 57 -#define MX23_INT_AUART2_TX_DMA 58 -#define MX23_INT_AUART2 59 -#define MX23_INT_AUART2_RX_DMA 60 -#define MX23_INT_VDAC_DETECT 61 -#define MX23_INT_VDD5V_DROOP 64 -#define MX23_INT_DCDC4P2_BO 65 - -/* - * APBH DMA - */ -#define MX23_DMA_SSP1 1 -#define MX23_DMA_SSP2 2 -#define MX23_DMA_GPMI0 4 -#define MX23_DMA_GPMI1 5 -#define MX23_DMA_GPMI2 6 -#define MX23_DMA_GPMI3 7 - -/* - * APBX DMA - */ -#define MX23_DMA_ADC 0 -#define MX23_DMA_DAC 1 -#define MX23_DMA_SPDIF 2 -#define MX23_DMA_I2C 3 -#define MX23_DMA_SAIF0 4 -#define MX23_DMA_UART0_RX 6 -#define MX23_DMA_UART0_TX 7 -#define MX23_DMA_UART1_RX 8 -#define MX23_DMA_UART1_TX 9 -#define MX23_DMA_SAIF1 10 - -#endif /* __MACH_MX23_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/mx28.h b/arch/arm/mach-mxs/include/mach/mx28.h deleted file mode 100644 index 30c7990f3c01..000000000000 --- a/arch/arm/mach-mxs/include/mach/mx28.h +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_MX28_H__ -#define __MACH_MX28_H__ - -#include - -/* - * OCRAM - */ -#define MX28_OCRAM_BASE_ADDR 0x00000000 -#define MX28_OCRAM_SIZE SZ_128K - -/* - * IO - */ -#define MX28_IO_BASE_ADDR 0x80000000 -#define MX28_IO_SIZE SZ_1M - -#define MX28_ICOLL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x000000) -#define MX28_HSADC_BASE_ADDR (MX28_IO_BASE_ADDR + 0x002000) -#define MX28_APBH_DMA_BASE_ADDR (MX28_IO_BASE_ADDR + 0x004000) -#define MX28_PERFMON_BASE_ADDR (MX28_IO_BASE_ADDR + 0x006000) -#define MX28_BCH_BASE_ADDR (MX28_IO_BASE_ADDR + 0x00a000) -#define MX28_GPMI_BASE_ADDR (MX28_IO_BASE_ADDR + 0x00c000) -#define MX28_SSP0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x010000) -#define MX28_SSP1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x012000) -#define MX28_SSP2_BASE_ADDR (MX28_IO_BASE_ADDR + 0x014000) -#define MX28_SSP3_BASE_ADDR (MX28_IO_BASE_ADDR + 0x016000) -#define MX28_PINCTRL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x018000) -#define MX28_DIGCTL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x01c000) -#define MX28_ETM_BASE_ADDR (MX28_IO_BASE_ADDR + 0x022000) -#define MX28_APBX_DMA_BASE_ADDR (MX28_IO_BASE_ADDR + 0x024000) -#define MX28_DCP_BASE_ADDR (MX28_IO_BASE_ADDR + 0x028000) -#define MX28_PXP_BASE_ADDR (MX28_IO_BASE_ADDR + 0x02a000) -#define MX28_OCOTP_BASE_ADDR (MX28_IO_BASE_ADDR + 0x02c000) -#define MX28_AXI_AHB0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x02e000) -#define MX28_LCDIF_BASE_ADDR (MX28_IO_BASE_ADDR + 0x030000) -#define MX28_CAN0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x032000) -#define MX28_CAN1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x034000) -#define MX28_SIMDBG_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c000) -#define MX28_SIMGPMISEL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c200) -#define MX28_SIMSSPSEL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c300) -#define MX28_SIMMEMSEL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c400) -#define MX28_GPIOMON_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c500) -#define MX28_SIMENET_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c700) -#define MX28_ARMJTAG_BASE_ADDR (MX28_IO_BASE_ADDR + 0x03c800) -#define MX28_CLKCTRL_BASE_ADDR (MX28_IO_BASE_ADDR + 0x040000) -#define MX28_SAIF0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x042000) -#define MX28_POWER_BASE_ADDR (MX28_IO_BASE_ADDR + 0x044000) -#define MX28_SAIF1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x046000) -#define MX28_LRADC_BASE_ADDR (MX28_IO_BASE_ADDR + 0x050000) -#define MX28_SPDIF_BASE_ADDR (MX28_IO_BASE_ADDR + 0x054000) -#define MX28_RTC_BASE_ADDR (MX28_IO_BASE_ADDR + 0x056000) -#define MX28_I2C0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x058000) -#define MX28_I2C1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x05a000) -#define MX28_PWM_BASE_ADDR (MX28_IO_BASE_ADDR + 0x064000) -#define MX28_TIMROT_BASE_ADDR (MX28_IO_BASE_ADDR + 0x068000) -#define MX28_AUART0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x06a000) -#define MX28_AUART1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x06c000) -#define MX28_AUART2_BASE_ADDR (MX28_IO_BASE_ADDR + 0x06e000) -#define MX28_AUART3_BASE_ADDR (MX28_IO_BASE_ADDR + 0x070000) -#define MX28_AUART4_BASE_ADDR (MX28_IO_BASE_ADDR + 0x072000) -#define MX28_DUART_BASE_ADDR (MX28_IO_BASE_ADDR + 0x074000) -#define MX28_USBPHY0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x07C000) -#define MX28_USBPHY1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x07e000) -#define MX28_USBCTRL0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x080000) -#define MX28_USBCTRL1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x090000) -#define MX28_DFLPT_BASE_ADDR (MX28_IO_BASE_ADDR + 0x0c0000) -#define MX28_DRAM_BASE_ADDR (MX28_IO_BASE_ADDR + 0x0e0000) -#define MX28_ENET_MAC0_BASE_ADDR (MX28_IO_BASE_ADDR + 0x0f0000) -#define MX28_ENET_MAC1_BASE_ADDR (MX28_IO_BASE_ADDR + 0x0f4000) - -#define MX28_IO_P2V(x) MXS_IO_P2V(x) -#define MX28_IO_ADDRESS(x) IOMEM(MX28_IO_P2V(x)) - -/* - * IRQ - */ -#define MX28_INT_BATT_BRNOUT 0 -#define MX28_INT_VDDD_BRNOUT 1 -#define MX28_INT_VDDIO_BRNOUT 2 -#define MX28_INT_VDDA_BRNOUT 3 -#define MX28_INT_VDD5V_DROOP 4 -#define MX28_INT_DCDC4P2_BRNOUT 5 -#define MX28_INT_VDD5V 6 -#define MX28_INT_CAN0 8 -#define MX28_INT_CAN1 9 -#define MX28_INT_LRADC_TOUCH 10 -#define MX28_INT_HSADC 13 -#define MX28_INT_LRADC_THRESH0 14 -#define MX28_INT_LRADC_THRESH1 15 -#define MX28_INT_LRADC_CH0 16 -#define MX28_INT_LRADC_CH1 17 -#define MX28_INT_LRADC_CH2 18 -#define MX28_INT_LRADC_CH3 19 -#define MX28_INT_LRADC_CH4 20 -#define MX28_INT_LRADC_CH5 21 -#define MX28_INT_LRADC_CH6 22 -#define MX28_INT_LRADC_CH7 23 -#define MX28_INT_LRADC_BUTTON0 24 -#define MX28_INT_LRADC_BUTTON1 25 -#define MX28_INT_PERFMON 27 -#define MX28_INT_RTC_1MSEC 28 -#define MX28_INT_RTC_ALARM 29 -#define MX28_INT_COMMS 31 -#define MX28_INT_EMI_ERR 32 -#define MX28_INT_LCDIF 38 -#define MX28_INT_PXP 39 -#define MX28_INT_BCH 41 -#define MX28_INT_GPMI 42 -#define MX28_INT_SPDIF_ERROR 45 -#define MX28_INT_DUART 47 -#define MX28_INT_TIMER0 48 -#define MX28_INT_TIMER1 49 -#define MX28_INT_TIMER2 50 -#define MX28_INT_TIMER3 51 -#define MX28_INT_DCP_VMI 52 -#define MX28_INT_DCP 53 -#define MX28_INT_DCP_SECURE 54 -#define MX28_INT_SAIF1 58 -#define MX28_INT_SAIF0 59 -#define MX28_INT_SPDIF_DMA 66 -#define MX28_INT_I2C0_DMA 68 -#define MX28_INT_I2C1_DMA 69 -#define MX28_INT_AUART0_RX_DMA 70 -#define MX28_INT_AUART0_TX_DMA 71 -#define MX28_INT_AUART1_RX_DMA 72 -#define MX28_INT_AUART1_TX_DMA 73 -#define MX28_INT_AUART2_RX_DMA 74 -#define MX28_INT_AUART2_TX_DMA 75 -#define MX28_INT_AUART3_RX_DMA 76 -#define MX28_INT_AUART3_TX_DMA 77 -#define MX28_INT_AUART4_RX_DMA 78 -#define MX28_INT_AUART4_TX_DMA 79 -#define MX28_INT_SAIF0_DMA 80 -#define MX28_INT_SAIF1_DMA 81 -#define MX28_INT_SSP0_DMA 82 -#define MX28_INT_SSP1_DMA 83 -#define MX28_INT_SSP2_DMA 84 -#define MX28_INT_SSP3_DMA 85 -#define MX28_INT_LCDIF_DMA 86 -#define MX28_INT_HSADC_DMA 87 -#define MX28_INT_GPMI_DMA 88 -#define MX28_INT_DIGCTL_DEBUG_TRAP 89 -#define MX28_INT_USB1 92 -#define MX28_INT_USB0 93 -#define MX28_INT_USB1_WAKEUP 94 -#define MX28_INT_USB0_WAKEUP 95 -#define MX28_INT_SSP0_ERROR 96 -#define MX28_INT_SSP1_ERROR 97 -#define MX28_INT_SSP2_ERROR 98 -#define MX28_INT_SSP3_ERROR 99 -#define MX28_INT_ENET_SWI 100 -#define MX28_INT_ENET_MAC0 101 -#define MX28_INT_ENET_MAC1 102 -#define MX28_INT_ENET_MAC0_1588 103 -#define MX28_INT_ENET_MAC1_1588 104 -#define MX28_INT_I2C1_ERROR 110 -#define MX28_INT_I2C0_ERROR 111 -#define MX28_INT_AUART0 112 -#define MX28_INT_AUART1 113 -#define MX28_INT_AUART2 114 -#define MX28_INT_AUART3 115 -#define MX28_INT_AUART4 116 -#define MX28_INT_GPIO4 123 -#define MX28_INT_GPIO3 124 -#define MX28_INT_GPIO2 125 -#define MX28_INT_GPIO1 126 -#define MX28_INT_GPIO0 127 - -/* - * APBH DMA - */ -#define MX28_DMA_SSP0 0 -#define MX28_DMA_SSP1 1 -#define MX28_DMA_SSP2 2 -#define MX28_DMA_SSP3 3 -#define MX28_DMA_GPMI0 4 -#define MX28_DMA_GPMI1 5 -#define MX28_DMA_GPMI2 6 -#define MX28_DMA_GPMI3 7 -#define MX28_DMA_GPMI4 8 -#define MX28_DMA_GPMI5 9 -#define MX28_DMA_GPMI6 10 -#define MX28_DMA_GPMI7 11 -#define MX28_DMA_HSADC 12 -#define MX28_DMA_LCDIF 13 - -/* - * APBX DMA - */ -#define MX28_DMA_AUART4_RX 0 -#define MX28_DMA_AUART4_TX 1 -#define MX28_DMA_SPDIF_TX 2 -#define MX28_DMA_SAIF0 4 -#define MX28_DMA_SAIF1 5 -#define MX28_DMA_I2C0 6 -#define MX28_DMA_I2C1 7 -#define MX28_DMA_AUART0_RX 8 -#define MX28_DMA_AUART0_TX 9 -#define MX28_DMA_AUART1_RX 10 -#define MX28_DMA_AUART1_TX 11 -#define MX28_DMA_AUART2_RX 12 -#define MX28_DMA_AUART2_TX 13 -#define MX28_DMA_AUART3_RX 14 -#define MX28_DMA_AUART3_TX 15 - -#endif /* __MACH_MX28_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/mxs.h b/arch/arm/mach-mxs/include/mach/mxs.h deleted file mode 100644 index 5820b047ea2e..000000000000 --- a/arch/arm/mach-mxs/include/mach/mxs.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_MXS_H__ -#define __MACH_MXS_H__ - -#ifndef __ASSEMBLER__ -#include -#endif -#include - -/* - * IO addresses common to MXS-based - */ -#define MXS_IO_BASE_ADDR 0x80000000 -#define MXS_IO_SIZE SZ_1M - -#define MXS_ICOLL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x000000) -#define MXS_APBH_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x004000) -#define MXS_BCH_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00a000) -#define MXS_GPMI_BASE_ADDR (MXS_IO_BASE_ADDR + 0x00c000) -#define MXS_PINCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x018000) -#define MXS_DIGCTL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x01c000) -#define MXS_APBX_DMA_BASE_ADDR (MXS_IO_BASE_ADDR + 0x024000) -#define MXS_DCP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x028000) -#define MXS_PXP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02a000) -#define MXS_OCOTP_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02c000) -#define MXS_AXI_AHB0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x02e000) -#define MXS_LCDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x030000) -#define MXS_CLKCTRL_BASE_ADDR (MXS_IO_BASE_ADDR + 0x040000) -#define MXS_SAIF0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x042000) -#define MXS_POWER_BASE_ADDR (MXS_IO_BASE_ADDR + 0x044000) -#define MXS_SAIF1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x046000) -#define MXS_LRADC_BASE_ADDR (MXS_IO_BASE_ADDR + 0x050000) -#define MXS_SPDIF_BASE_ADDR (MXS_IO_BASE_ADDR + 0x054000) -#define MXS_I2C0_BASE_ADDR (MXS_IO_BASE_ADDR + 0x058000) -#define MXS_PWM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x064000) -#define MXS_TIMROT_BASE_ADDR (MXS_IO_BASE_ADDR + 0x068000) -#define MXS_AUART1_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06c000) -#define MXS_AUART2_BASE_ADDR (MXS_IO_BASE_ADDR + 0x06e000) -#define MXS_DRAM_BASE_ADDR (MXS_IO_BASE_ADDR + 0x0e0000) - -/* - * It maps the whole address space to [0xf4000000, 0xf50fffff]. - * - * OCRAM 0x00000000+0x020000 -> 0xf4000000+0x020000 - * IO 0x80000000+0x100000 -> 0xf5000000+0x100000 - */ -#define MXS_IO_P2V(x) (0xf4000000 + \ - (((x) & 0x80000000) >> 7) + \ - (((x) & 0x000fffff))) - -#define MXS_IO_ADDRESS(x) IOMEM(MXS_IO_P2V(x)) - -#define mxs_map_entry(soc, name, _type) { \ - .virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \ - .pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \ - .length = soc ## _ ## name ## _SIZE, \ - .type = _type, \ -} - -#define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr)) - -#define MXS_SET_ADDR 0x4 -#define MXS_CLR_ADDR 0x8 -#define MXS_TOG_ADDR 0xc - -#ifndef __ASSEMBLER__ -static inline void __mxs_setl(u32 mask, void __iomem *reg) -{ - __raw_writel(mask, reg + MXS_SET_ADDR); -} - -static inline void __mxs_clrl(u32 mask, void __iomem *reg) -{ - __raw_writel(mask, reg + MXS_CLR_ADDR); -} - -static inline void __mxs_togl(u32 mask, void __iomem *reg) -{ - __raw_writel(mask, reg + MXS_TOG_ADDR); -} - -/* - * MXS CPU types - */ -#define MXS_CHIPID (MXS_IO_ADDRESS(MXS_DIGCTL_BASE_ADDR) + HW_DIGCTL_CHIPID) - -static inline int cpu_is_mx23(void) -{ - return ((__raw_readl(MXS_CHIPID) >> 16) == 0x3780); -} - -static inline int cpu_is_mx28(void) -{ - return ((__raw_readl(MXS_CHIPID) >> 16) == 0x2800); -} -#endif - -#endif /* __MACH_MXS_H__ */ diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index a6e1ccb05066..16870bf853b8 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -31,8 +31,33 @@ #include #include #include -#include -#include + +/* MXS DIGCTL SAIF CLKMUX */ +#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0 +#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1 +#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2 +#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3 + +#define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr)) + +#define MXS_SET_ADDR 0x4 +#define MXS_CLR_ADDR 0x8 +#define MXS_TOG_ADDR 0xc + +static inline void __mxs_setl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_SET_ADDR); +} + +static inline void __mxs_clrl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_CLR_ADDR); +} + +static inline void __mxs_togl(u32 mask, void __iomem *reg) +{ + __raw_writel(mask, reg + MXS_TOG_ADDR); +} static struct fb_videomode mx23evk_video_modes[] = { { From e933a1a12a02f42e0013cda87bba37ccb59efc47 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 2 Apr 2013 13:30:32 -0300 Subject: [PATCH 30/30] clocksource: mxs_timer: Add semicolon at end of line Fix the following build error: drivers/clocksource/mxs_timer.c:304:1: error: expected ',' or ';' at end of input Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- drivers/clocksource/mxs_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c index a4d469b21d96..02af4204af86 100644 --- a/drivers/clocksource/mxs_timer.c +++ b/drivers/clocksource/mxs_timer.c @@ -301,4 +301,4 @@ static void __init mxs_timer_init(struct device_node *np) irq = irq_of_parse_and_map(np, 0); setup_irq(irq, &mxs_timer_irq); } -CLOCKSOURCE_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init) +CLOCKSOURCE_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init);