From 42d9cedf21ba07085041566a9d6e99533fd20bda Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 16 May 2012 13:22:41 -0700 Subject: [PATCH] --- yaml --- r: 309166 b: refs/heads/master c: 796038799a72adb279d785c9154df6eeb98b6e8d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86/kernel/realmode.c | 11 ++++++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 7da9a8aaa8db..96f2371c8ecf 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 34d0b02e08470c56a411ba6da1f377bc6da02826 +refs/heads/master: 796038799a72adb279d785c9154df6eeb98b6e8d diff --git a/trunk/arch/x86/kernel/realmode.c b/trunk/arch/x86/kernel/realmode.c index 66ac276cf361..099277984b80 100644 --- a/trunk/arch/x86/kernel/realmode.c +++ b/trunk/arch/x86/kernel/realmode.c @@ -22,6 +22,7 @@ void __init setup_real_mode(void) size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob); #ifdef CONFIG_X86_64 u64 *trampoline_pgd; + u32 efer_low, efer_high; #endif /* Has to be in very low memory so we can execute real-mode AP code. */ @@ -65,9 +66,13 @@ void __init setup_real_mode(void) trampoline_header->gdt_limit = __BOOT_DS + 7; trampoline_header->gdt_base = __pa(boot_gdt); #else - if (rdmsr_safe(MSR_EFER, &trampoline_header->efer_low, - &trampoline_header->efer_high)) - BUG(); + /* + * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR + * so we need to mask it out. + */ + rdmsr(MSR_EFER, efer_low, efer_high); + trampoline_header->efer_low = efer_low & ~EFER_LMA; + trampoline_header->efer_high = efer_high; trampoline_header->start = (u64) secondary_startup_64; trampoline_cr4_features = &trampoline_header->cr4;