From 431c77a8e180ee210bd70484ccaf0181e410bb59 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@snapgear.com>
Date: Mon, 12 Sep 2005 11:18:10 +1000
Subject: [PATCH] --- yaml --- r: 8538 b: refs/heads/master c:
 8a6e43e9ee84eb8fb39bfdf8f0b6e466905491d0 h: refs/heads/master v: v3

---
 [refs]                                 |  2 +-
 trunk/include/asm-m68knommu/mcfcache.h | 25 +++++++++++--------------
 2 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/[refs] b/[refs]
index 44e838a0fe8f..bd119d01ad8e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7dd6a2aa27a7a8036fbaf60cbce38a64128d1d4d
+refs/heads/master: 8a6e43e9ee84eb8fb39bfdf8f0b6e466905491d0
diff --git a/trunk/include/asm-m68knommu/mcfcache.h b/trunk/include/asm-m68knommu/mcfcache.h
index bdd8c53ef34c..b17cd920977f 100644
--- a/trunk/include/asm-m68knommu/mcfcache.h
+++ b/trunk/include/asm-m68knommu/mcfcache.h
@@ -33,7 +33,7 @@
 .endm
 #endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
 
-#if defined(CONFIG_M527x)
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x)
 /*
  *	New version 2 cores have a configurable split cache arrangement.
  *	For now I am just enabling instruction cache - but ultimately I
@@ -51,23 +51,20 @@
 	movec	%d0,%CACR		/* enable cache */
 	nop
 .endm
-#endif /* CONFIG_M527x */
+#endif /* CONFIG_M523x || CONFIG_M527x */
 
 #if defined(CONFIG_M528x)
-/*
- *	Cache is totally broken on early 5282 silicon. So far now we
- *	disable its cache all together.
- */
 .macro CACHE_ENABLE
-	movel	#0x01000000,%d0
-	movec	%d0,%CACR		/* invalidate cache */
 	nop
-	movel	#0x0000c000,%d0		/* set SDRAM cached only */
-	movec	%d0,%ACR0
-	movel	#0x00000000,%d0		/* no other regions cached */
-	movec	%d0,%ACR1
-	movel	#0x00000000,%d0		/* configure cache */
-	movec	%d0,%CACR		/* enable cache */
+	movel	#0x01000000, %d0
+	movec	%d0, %CACR		/* Invalidate cache */
+	nop
+	movel	#0x0000c020, %d0	/* Set SDRAM cached only */
+	movec	%d0, %ACR0
+	movel	#0xff00c000, %d0	/* Cache Flash also */
+	movec	%d0, %ACR1
+	movel	#0x80000200, %d0	/* Setup cache mask */
+	movec	%d0, %CACR		/* Enable cache */
 	nop
 .endm
 #endif /* CONFIG_M528x */