From 44ac749749e6cb1c480932abb9388a67d4f225b9 Mon Sep 17 00:00:00 2001 From: Marcus Sundberg Date: Thu, 10 Jul 2008 21:28:08 +0200 Subject: [PATCH] --- yaml --- r: 104893 b: refs/heads/master c: 77332894c21165404496c56763d7df6c15c4bb09 h: refs/heads/master i: 104891: ef6a3d268612c71c9737611ec67afac34bea8dde v: v3 --- [refs] | 2 +- trunk/drivers/net/r8169.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 9e4dfb76c428..15b3f47879c5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f887cce8de019bb32917789379af89ae4c0294ee +refs/heads/master: 77332894c21165404496c56763d7df6c15c4bb09 diff --git a/trunk/drivers/net/r8169.c b/trunk/drivers/net/r8169.c index 2a5486ffe5c4..a3e3895e5032 100644 --- a/trunk/drivers/net/r8169.c +++ b/trunk/drivers/net/r8169.c @@ -1418,8 +1418,10 @@ static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp) rtl_hw_phy_config(dev); - dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); - RTL_W8(0x82, 0x01); + if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { + dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); + RTL_W8(0x82, 0x01); + } pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);