From 44dc520658433a3aabe6fe3c37803270d89b09c1 Mon Sep 17 00:00:00 2001 From: Matt Carlson Date: Sun, 21 Oct 2007 16:17:55 -0700 Subject: [PATCH] --- yaml --- r: 72094 b: refs/heads/master c: 8a6eac90e21633e054e17d21454a2c26824aeb18 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/tg3.c | 7 ++----- trunk/drivers/net/tg3.h | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 18494efd83a3..881e9754ac79 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9c8a620e7f85fff050a54697da44bbd1a66e8e0b +refs/heads/master: 8a6eac90e21633e054e17d21454a2c26824aeb18 diff --git a/trunk/drivers/net/tg3.c b/trunk/drivers/net/tg3.c index 98f465828110..328eb4adc10b 100644 --- a/trunk/drivers/net/tg3.c +++ b/trunk/drivers/net/tg3.c @@ -5029,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp) /* Save PCI command register before chip reset */ static void tg3_save_pci_state(struct tg3 *tp) { - u32 val; - - pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val); - tp->pci_cmd = val; + pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd); } /* Restore PCI state after chip reset */ @@ -5055,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp) PCISTATE_ALLOW_APE_SHMEM_WR; pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val); - pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd); + pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd); if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) { pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, diff --git a/trunk/drivers/net/tg3.h b/trunk/drivers/net/tg3.h index 495a1dfaba5a..1d5b2a3dd29d 100644 --- a/trunk/drivers/net/tg3.h +++ b/trunk/drivers/net/tg3.h @@ -2421,7 +2421,7 @@ struct tg3 { #define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */ u32 led_ctrl; - u32 pci_cmd; + u16 pci_cmd; char board_part_number[24]; #define TG3_VER_SIZE 32