From 451c43b8934d6cc3d821d9ac03e192e87fc167e1 Mon Sep 17 00:00:00 2001 From: Jean-Luc Leger Date: Fri, 23 Jun 2006 02:05:19 -0700 Subject: [PATCH] --- yaml --- r: 29039 b: refs/heads/master c: 1e11d2782b2f8e86d22ad92c75b70ec8cad14dcf h: refs/heads/master i: 29037: 76680ffe49e3636e201d495892a8b334ef7e3117 29035: 62888019c7c0a2e443ec3d89ba77192f9d52af43 29031: b3c763d1833fad1c956ac8e878af7ddec356d830 29023: 14ae69c68814d48a889f493a22681343321aed36 v: v3 --- [refs] | 2 +- trunk/arch/i386/Kconfig | 1 - trunk/arch/ia64/Kconfig | 1 - trunk/arch/powerpc/Kconfig | 1 - 4 files changed, 1 insertion(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 722d1888093f..599a4bec12e7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 260ea1013283d8acbb451459ed1ca560c1445c20 +refs/heads/master: 1e11d2782b2f8e86d22ad92c75b70ec8cad14dcf diff --git a/trunk/arch/i386/Kconfig b/trunk/arch/i386/Kconfig index 15d23da2455f..1596101cfaf8 100644 --- a/trunk/arch/i386/Kconfig +++ b/trunk/arch/i386/Kconfig @@ -230,7 +230,6 @@ config NR_CPUS config SCHED_SMT bool "SMT (Hyperthreading) scheduler support" depends on SMP - default off help SMT scheduler support improves the CPU scheduler's decision making when dealing with Intel Pentium 4 chips with HyperThreading at a diff --git a/trunk/arch/ia64/Kconfig b/trunk/arch/ia64/Kconfig index 0f3076a820c3..c1c9b4224081 100644 --- a/trunk/arch/ia64/Kconfig +++ b/trunk/arch/ia64/Kconfig @@ -273,7 +273,6 @@ config HOTPLUG_CPU config SCHED_SMT bool "SMT scheduler support" depends on SMP - default off help Improves the CPU scheduler's decision making when dealing with Intel IA64 chips with MultiThreading at a cost of slightly increased diff --git a/trunk/arch/powerpc/Kconfig b/trunk/arch/powerpc/Kconfig index 7b829c754d0d..e922a88b2bad 100644 --- a/trunk/arch/powerpc/Kconfig +++ b/trunk/arch/powerpc/Kconfig @@ -718,7 +718,6 @@ config PPC_64K_PAGES config SCHED_SMT bool "SMT (Hyperthreading) scheduler support" depends on PPC64 && SMP - default off help SMT scheduler support improves the CPU scheduler's decision making when dealing with POWER5 cpus at a cost of slightly increased