From 458be74e12d50e467e7d210c2c1e9e9f5f3818c5 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@snapgear.com>
Date: Tue, 21 Sep 2010 20:39:40 +1000
Subject: [PATCH] --- yaml --- r: 212487 b: refs/heads/master c:
 cb809b1a5ebffca8cf0314b788919989e8e4ab5f h: refs/heads/master i:   212485:
 8a82e0f40477cbfaf47e9366c22a47e3e4231743   212483:
 f7b0ef09782cb2a7657c3bfdae77dc442693de04   212479:
 493f017ed3e1b0029d32a37dbad4046f8e6ee297 v: v3

---
 [refs]                                          | 2 +-
 trunk/arch/arm/mach-at91/include/mach/at91x40.h | 6 ++++++
 trunk/arch/arm/mach-at91/include/mach/system.h  | 4 ++++
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 14aa24f8b420..018e2d6949ee 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a6e016f19d393fbe4e040bee8155b03b840fa689
+refs/heads/master: cb809b1a5ebffca8cf0314b788919989e8e4ab5f
diff --git a/trunk/arch/arm/mach-at91/include/mach/at91x40.h b/trunk/arch/arm/mach-at91/include/mach/at91x40.h
index d34cdb8abdca..063ac44a0204 100644
--- a/trunk/arch/arm/mach-at91/include/mach/at91x40.h
+++ b/trunk/arch/arm/mach-at91/include/mach/at91x40.h
@@ -52,4 +52,10 @@
 #define AT91_DBGU_CIDR	(AT91_SF + 0)	/* CIDR in PS segment */
 #define AT91_DBGU_EXID	(AT91_SF + 4)	/* EXID in PS segment */
 
+/*
+ * Support defines for the simple Power Controller module.
+ */
+#define	AT91_PS_CR	(AT91_PS + 0)	/* PS Control register */
+#define	AT91_PS_CR_CPU	(1 << 0)	/* CPU clock disable bit */
+
 #endif /* AT91X40_H */
diff --git a/trunk/arch/arm/mach-at91/include/mach/system.h b/trunk/arch/arm/mach-at91/include/mach/system.h
index c80e090b3670..bfbb612265d6 100644
--- a/trunk/arch/arm/mach-at91/include/mach/system.h
+++ b/trunk/arch/arm/mach-at91/include/mach/system.h
@@ -33,7 +33,11 @@ static inline void arch_idle(void)
 	 * Disable the processor clock.  The processor will be automatically
 	 * re-enabled by an interrupt or by a reset.
 	 */
+#ifdef AT91_PS
+	at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
+#else
 	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
+#endif
 #else
 	/*
 	 * Set the processor (CP15) into 'Wait for Interrupt' mode.