diff --git a/[refs] b/[refs] index 0a7f86399a2f..728e4192d88b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9d84588bdb72b6ec9d891fbdaa4305023e16ee3a +refs/heads/master: 5c5dccad31670faa716cbc9d8a6f918487f60a09 diff --git a/trunk/arch/arm/mach-imx/generic.c b/trunk/arch/arm/mach-imx/generic.c index c342595dc318..a58b678006df 100644 --- a/trunk/arch/arm/mach-imx/generic.c +++ b/trunk/arch/arm/mach-imx/generic.c @@ -138,7 +138,7 @@ EXPORT_SYMBOL(imx_gpio_direction_input); int imx_gpio_direction_output(unsigned gpio, int value) { imx_gpio_set_value(gpio, value); - imx_gpio_mode(gpio | GPIO_OUT | GPIO_GIUS | GPIO_DR); + imx_gpio_mode(gpio| GPIO_OUT); return 0; } diff --git a/trunk/arch/arm/plat-omap/common.c b/trunk/arch/arm/plat-omap/common.c index 7987aa6e95f8..4f0f9c4e938e 100644 --- a/trunk/arch/arm/plat-omap/common.c +++ b/trunk/arch/arm/plat-omap/common.c @@ -172,7 +172,7 @@ console_initcall(omap_add_serial_console); #if defined(CONFIG_ARCH_OMAP16XX) #define TIMER_32K_SYNCHRONIZED 0xfffbc410 #elif defined(CONFIG_ARCH_OMAP24XX) -#define TIMER_32K_SYNCHRONIZED 0x48004010 +#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) #endif #ifdef TIMER_32K_SYNCHRONIZED diff --git a/trunk/arch/arm/plat-omap/timer32k.c b/trunk/arch/arm/plat-omap/timer32k.c index b0af014b0e2c..ea76f1979a3d 100644 --- a/trunk/arch/arm/plat-omap/timer32k.c +++ b/trunk/arch/arm/plat-omap/timer32k.c @@ -71,7 +71,7 @@ struct sys_timer omap_timer; #if defined(CONFIG_ARCH_OMAP16XX) #define TIMER_32K_SYNCHRONIZED 0xfffbc410 #elif defined(CONFIG_ARCH_OMAP24XX) -#define TIMER_32K_SYNCHRONIZED 0x48004010 +#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) #else #error OMAP 32KHz timer does not currently work on 15XX! #endif @@ -147,14 +147,15 @@ static inline void omap_32k_timer_ack_irq(void) static void omap_32k_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { + omap_32k_timer_stop(); + switch (mode) { - case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_PERIODIC: omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); break; + case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: - omap_32k_timer_stop(); break; case CLOCK_EVT_MODE_RESUME: break; @@ -194,8 +195,6 @@ omap_32k_ticks_to_nsecs(unsigned long ticks_32k) return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9; } -static unsigned long omap_32k_last_tick = 0; - /* * Returns current time from boot in nsecs. It's OK for this to wrap * around for now, as it's just a relative time stamp. @@ -225,7 +224,6 @@ static __init void omap_init_32k_timer(void) { if (cpu_class_is_omap1()) setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); - omap_32k_last_tick = omap_32k_sync_timer_read(); #ifdef CONFIG_ARCH_OMAP2 /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ diff --git a/trunk/drivers/mtd/maps/lubbock-flash.c b/trunk/drivers/mtd/maps/lubbock-flash.c index e8560683b973..1aa0447c5e66 100644 --- a/trunk/drivers/mtd/maps/lubbock-flash.c +++ b/trunk/drivers/mtd/maps/lubbock-flash.c @@ -15,7 +15,9 @@ #include #include #include +#include +#include #include #include #include @@ -24,7 +26,7 @@ #include #include #include -#include + #define ROM_ADDR 0x00000000 #define FLASH_ADDR 0x04000000 @@ -33,7 +35,7 @@ static void lubbock_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len) { - flush_ioremap_region(map->phys, map->cached, from, len); + consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE); } static struct map_info lubbock_maps[2] = { { diff --git a/trunk/drivers/mtd/maps/mainstone-flash.c b/trunk/drivers/mtd/maps/mainstone-flash.c index d76487d82dcd..eaa4bbb868a3 100644 --- a/trunk/drivers/mtd/maps/mainstone-flash.c +++ b/trunk/drivers/mtd/maps/mainstone-flash.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include #include #include @@ -24,7 +26,6 @@ #include #include #include -#include #define ROM_ADDR 0x00000000 @@ -35,7 +36,7 @@ static void mainstone_map_inval_cache(struct map_info *map, unsigned long from, ssize_t len) { - flush_ioremap_region(map->phys, map->cached, from, len); + consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE); } static struct map_info mainstone_maps[2] = { { diff --git a/trunk/include/asm-arm/arch-at91/irqs.h b/trunk/include/asm-arm/arch-at91/irqs.h index 70b1216dce5d..1127a3b5e928 100644 --- a/trunk/include/asm-arm/arch-at91/irqs.h +++ b/trunk/include/asm-arm/arch-at91/irqs.h @@ -42,7 +42,4 @@ */ #define NR_IRQS (NR_AIC_IRQS + (5 * 32)) -/* FIQ is AIC source 0. */ -#define FIQ_START AT91_ID_FIQ - #endif diff --git a/trunk/include/asm-arm/cacheflush.h b/trunk/include/asm-arm/cacheflush.h index 6c1c968b2987..d1294a46c70c 100644 --- a/trunk/include/asm-arm/cacheflush.h +++ b/trunk/include/asm-arm/cacheflush.h @@ -426,13 +426,6 @@ static inline void flush_anon_page(struct vm_area_struct *vma, */ #define flush_icache_page(vma,page) do { } while (0) -static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, - unsigned offset, size_t size) -{ - const void *start = (void __force *)virt + offset; - dmac_inv_range(start, start + size); -} - #define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) #define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29)) diff --git a/trunk/include/asm-arm/plat-s3c/map.h b/trunk/include/asm-arm/plat-s3c/map.h index b84289d32a54..95a82b0e84a1 100644 --- a/trunk/include/asm-arm/plat-s3c/map.h +++ b/trunk/include/asm-arm/plat-s3c/map.h @@ -30,11 +30,11 @@ #define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) #endif -#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ -#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ -#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */ -#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ -#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ -#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ +#define S3C_VA_IRQ S3C_ADDR(0x000000000) /* irq controller(s) */ +#define S3C_VA_SYS S3C_ADDR(0x001000000) /* system control */ +#define S3C_VA_MEM S3C_ADDR(0x002000000) /* system control */ +#define S3C_VA_TIMER S3C_ADDR(0x003000000) /* timer block */ +#define S3C_VA_WATCHDOG S3C_ADDR(0x004000000) /* watchdog */ +#define S3C_VA_UART S3C_ADDR(0x010000000) /* UART */ #endif /* __ASM_PLAT_MAP_H */