From 4789e6e67239e0e238d492e3bf12766f65fe843f Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Wed, 12 Sep 2007 23:19:45 +0900 Subject: [PATCH] --- yaml --- r: 66158 b: refs/heads/master c: 718f05f6ddc171a90fb7a277be6f6f65b4ca82be h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-mips/mach-mips/mach-gt64120.h | 9 --------- trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h | 1 - 3 files changed, 1 insertion(+), 11 deletions(-) diff --git a/[refs] b/[refs] index 273cf1eda381..04ec7ecf3653 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d80c1c0b2207ba326b2c06249dfebddf8ac863bd +refs/heads/master: 718f05f6ddc171a90fb7a277be6f6f65b4ca82be diff --git a/trunk/include/asm-mips/mach-mips/mach-gt64120.h b/trunk/include/asm-mips/mach-mips/mach-gt64120.h index 511f7cf3a6be..0f863148f3b6 100644 --- a/trunk/include/asm-mips/mach-mips/mach-gt64120.h +++ b/trunk/include/asm-mips/mach-mips/mach-gt64120.h @@ -16,13 +16,4 @@ extern unsigned long _pcictrl_gt64120; */ #define GT64120_BASE _pcictrl_gt64120 -/* - * PCI Bus allocation - */ -#define GT_PCI_MEM_BASE 0x12000000UL -#define GT_PCI_MEM_SIZE 0x02000000UL -#define GT_PCI_IO_BASE 0x10000000UL -#define GT_PCI_IO_SIZE 0x02000000UL -#define GT_ISA_IO_BASE PCI_IO_BASE - #endif /* _ASM_MACH_MIPS_MACH_GT64120_DEP_H */ diff --git a/trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h b/trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h index ba9205a04582..00d8bf6164a9 100644 --- a/trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h +++ b/trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h @@ -43,7 +43,6 @@ #define GT_PCI_MEM_SIZE 0x02000000UL #define GT_PCI_IO_BASE 0x11000000UL #define GT_PCI_IO_SIZE 0x02000000UL -#define GT_ISA_IO_BASE PCI_IO_BASE /* * PCI interrupts will come in on either the INTA or INTD interrups lines,