From 47ab2298ab091a2a3878502f5905b720efa755cd Mon Sep 17 00:00:00 2001
From: Shiraz Hashim <shiraz.hashim@st.com>
Date: Wed, 14 Mar 2012 11:47:13 +0530
Subject: [PATCH] --- yaml --- r: 298174 b: refs/heads/master c:
 f63acb75c5d8a9eb7cc5548e3e778d2a00bf3bae h: refs/heads/master v: v3

---
 [refs]                             |  2 +-
 trunk/drivers/mtd/nand/fsmc_nand.c | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/[refs] b/[refs]
index 248e89fe7f9d..c8ae5c18cd34 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 467e6e7be2e26fd5bbaabd849717d37de99df8f1
+refs/heads/master: f63acb75c5d8a9eb7cc5548e3e778d2a00bf3bae
diff --git a/trunk/drivers/mtd/nand/fsmc_nand.c b/trunk/drivers/mtd/nand/fsmc_nand.c
index 91f5b3404c79..a5099607d203 100644
--- a/trunk/drivers/mtd/nand/fsmc_nand.c
+++ b/trunk/drivers/mtd/nand/fsmc_nand.c
@@ -382,7 +382,7 @@ static void fsmc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  * This routine initializes timing parameters related to NAND memory access in
  * FSMC registers
  */
-static void __init fsmc_nand_setup(struct fsmc_regs *regs, uint32_t bank,
+static void fsmc_nand_setup(struct fsmc_regs *regs, uint32_t bank,
 				   uint32_t busw)
 {
 	uint32_t value = FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON;
@@ -976,15 +976,15 @@ static int fsmc_nand_suspend(struct device *dev)
 static int fsmc_nand_resume(struct device *dev)
 {
 	struct fsmc_nand_data *host = dev_get_drvdata(dev);
-	if (host)
+	if (host) {
 		clk_enable(host->clk);
+		fsmc_nand_setup(host->regs_va, host->bank,
+				host->nand.options & NAND_BUSWIDTH_16);
+	}
 	return 0;
 }
 
-static const struct dev_pm_ops fsmc_nand_pm_ops = {
-	.suspend = fsmc_nand_suspend,
-	.resume = fsmc_nand_resume,
-};
+static SIMPLE_DEV_PM_OPS(fsmc_nand_pm_ops, fsmc_nand_suspend, fsmc_nand_resume);
 #endif
 
 static struct platform_driver fsmc_nand_driver = {