From 5df5d01dd04ce0dde58e305dd258c7e54f079e65 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Sun, 1 Jul 2012 21:06:44 +0200 Subject: [PATCH 1/6] ARM: LPC32xx: Init MMC via clock This patch moves MMC/SD controller initialization from the board specific file phy3250.c to clock.c. Signed-off-by: Roland Stigge Acked-by: Alexandre Pereira da Silva --- arch/arm/mach-lpc32xx/clock.c | 6 ++++-- arch/arm/mach-lpc32xx/phy3250.c | 5 ----- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index e8d315e6db09..345c28d5615b 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -812,11 +812,13 @@ static int mmc_onoff_enable(struct clk *clk, int enable) u32 tmp; tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) & - ~LPC32XX_CLKPWR_MSCARD_SDCARD_EN; + ~(LPC32XX_CLKPWR_MSCARD_SDCARD_EN | + LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN); /* If rate is 0, disable clock */ if (enable != 0) - tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN; + tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN | + LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN; __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index c1aabfcbde49..5be2cbfb4d99 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -262,11 +262,6 @@ static void __init lpc3250_machine_init(void) lpc32xx_serial_init(); - tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); - tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN | - LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN; - __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); - /* Test clock needed for UDA1380 initial init */ __raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC | LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN, From b0d9ef0e2df67685ffc74b1bafa648261ede30c0 Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Sun, 1 Jul 2012 21:06:44 +0200 Subject: [PATCH 2/6] ARM: LPC32xx: Add further bits to MMC init This patch makes sure certain MMC bits are cleared as they should for initialization. Signed-off-by: Roland Stigge Acked-by: Alexandre Pereira da Silva --- arch/arm/mach-lpc32xx/clock.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index 345c28d5615b..eb1b12092951 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -813,7 +813,11 @@ static int mmc_onoff_enable(struct clk *clk, int enable) tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) & ~(LPC32XX_CLKPWR_MSCARD_SDCARD_EN | - LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN); + LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN | + LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS | + LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS | + LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS | + LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS); /* If rate is 0, disable clock */ if (enable != 0) From a0a30b6a69275c54542130a8391e0fda30a4553b Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Sun, 1 Jul 2012 21:06:45 +0200 Subject: [PATCH 3/6] ARM: LPC32xx: Remove wrong re-initialization of MMC clock register This patch fixes a bug, (wrongfully) resetting the value of LPC32XX_CLKPWR_MS_CTRL back to its initial contents (after careful setup). This was discovered only with a board/bootloader combination (EA3250) where the contents of the respective register wasn't already at the correct value on Linux boot. Signed-off-by: Roland Stigge Acked-by: Alexandre Pereira da Silva --- arch/arm/mach-lpc32xx/clock.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index eb1b12092951..b64f98537b5d 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -871,7 +871,7 @@ static unsigned long mmc_round_rate(struct clk *clk, unsigned long rate) static int mmc_set_rate(struct clk *clk, unsigned long rate) { - u32 oldclk, tmp; + u32 tmp; unsigned long prate, div, crate = mmc_round_rate(clk, rate); prate = clk->parent->get_rate(clk->parent); @@ -879,16 +879,12 @@ static int mmc_set_rate(struct clk *clk, unsigned long rate) div = prate / crate; /* The MMC clock must be on when accessing an MMC register */ - oldclk = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); - __raw_writel(oldclk | LPC32XX_CLKPWR_MSCARD_SDCARD_EN, - LPC32XX_CLKPWR_MS_CTRL); tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) & ~LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(0xf); - tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div); + tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(div) | + LPC32XX_CLKPWR_MSCARD_SDCARD_EN; __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); - __raw_writel(oldclk, LPC32XX_CLKPWR_MS_CTRL); - return 0; } From a408e8f423e91a50727e7e85461cf7677d25ebf6 Mon Sep 17 00:00:00 2001 From: Alexandre Pereira da Silva Date: Sun, 1 Jul 2012 21:06:45 +0200 Subject: [PATCH 4/6] ARM: LPC32xx: Cleanup USB clock init Move most of usb clock initialization from lpc32xx_udc and ohci-nxp to clock.c. Also adds ohci clocks and otg clocks. Signed-off-by: Alexandre Pereira da Silva Signed-off-by: Roland Stigge --- arch/arm/mach-lpc32xx/clock.c | 68 ++++++++++++++++++- arch/arm/mach-lpc32xx/include/mach/platform.h | 14 ++++ 2 files changed, 81 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c index b64f98537b5d..8a4e7cb74ae1 100644 --- a/arch/arm/mach-lpc32xx/clock.c +++ b/arch/arm/mach-lpc32xx/clock.c @@ -739,14 +739,77 @@ static struct clk clk_rtc = { .get_rate = local_return_parent_rate, }; +static int local_usb_enable(struct clk *clk, int enable) +{ + u32 tmp; + + if (enable) { + /* Set up I2C pull levels */ + tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL); + tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE; + __raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL); + } + + return local_onoff_enable(clk, enable); +} + static struct clk clk_usbd = { .parent = &clk_usbpll, - .enable = local_onoff_enable, + .enable = local_usb_enable, .enable_reg = LPC32XX_CLKPWR_USB_CTRL, .enable_mask = LPC32XX_CLKPWR_USBCTRL_HCLK_EN, .get_rate = local_return_parent_rate, }; +#define OTG_ALWAYS_MASK (LPC32XX_USB_OTG_OTG_CLOCK_ON | \ + LPC32XX_USB_OTG_I2C_CLOCK_ON) + +static int local_usb_otg_enable(struct clk *clk, int enable) +{ + int to = 1000; + + if (enable) { + __raw_writel(clk->enable_mask, clk->enable_reg); + + while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) & + clk->enable_mask) != clk->enable_mask) && (to > 0)) + to--; + } else { + __raw_writel(OTG_ALWAYS_MASK, clk->enable_reg); + + while (((__raw_readl(LPC32XX_USB_OTG_CLK_STAT) & + OTG_ALWAYS_MASK) != OTG_ALWAYS_MASK) && (to > 0)) + to--; + } + + if (to) + return 0; + else + return -1; +} + +static struct clk clk_usb_otg_dev = { + .parent = &clk_usbpll, + .enable = local_usb_otg_enable, + .enable_reg = LPC32XX_USB_OTG_CLK_CTRL, + .enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON | + LPC32XX_USB_OTG_OTG_CLOCK_ON | + LPC32XX_USB_OTG_DEV_CLOCK_ON | + LPC32XX_USB_OTG_I2C_CLOCK_ON, + .get_rate = local_return_parent_rate, +}; + +static struct clk clk_usb_otg_host = { + .parent = &clk_usbpll, + .enable = local_usb_otg_enable, + .enable_reg = LPC32XX_USB_OTG_CLK_CTRL, + .enable_mask = LPC32XX_USB_OTG_AHB_M_CLOCK_ON | + LPC32XX_USB_OTG_OTG_CLOCK_ON | + LPC32XX_USB_OTG_HOST_CLOCK_ON | + LPC32XX_USB_OTG_I2C_CLOCK_ON, + .get_rate = local_return_parent_rate, +}; + static int tsc_onoff_enable(struct clk *clk, int enable) { u32 tmp; @@ -1145,6 +1208,9 @@ static struct clk_lookup lookups[] = { CLKDEV_INIT("31060000.ethernet", NULL, &clk_net), CLKDEV_INIT("dev:clcd", NULL, &clk_lcd), CLKDEV_INIT("31020000.usbd", "ck_usbd", &clk_usbd), + CLKDEV_INIT("31020000.ohci", "ck_usbd", &clk_usbd), + CLKDEV_INIT("31020000.usbd", "ck_usb_otg", &clk_usb_otg_dev), + CLKDEV_INIT("31020000.ohci", "ck_usb_otg", &clk_usb_otg_host), CLKDEV_INIT("lpc32xx_rtc", NULL, &clk_rtc), }; diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/include/mach/platform.h index c584f5bb164f..acc4aabf1c7b 100644 --- a/arch/arm/mach-lpc32xx/include/mach/platform.h +++ b/arch/arm/mach-lpc32xx/include/mach/platform.h @@ -694,4 +694,18 @@ #define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C) #define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030) +/* + * USB Otg Registers + */ +#define _OTGREG(x) io_p2v(LPC32XX_USB_OTG_BASE + (x)) +#define LPC32XX_USB_OTG_CLK_CTRL _OTGREG(0xFF4) +#define LPC32XX_USB_OTG_CLK_STAT _OTGREG(0xFF8) + +/* USB OTG CLK CTRL bit defines */ +#define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4) +#define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3) +#define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2) +#define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1) +#define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0) + #endif From 382656d81be23853f1a1a49d6669a92f70f5938b Mon Sep 17 00:00:00 2001 From: Roland Stigge Date: Sun, 1 Jul 2012 21:06:45 +0200 Subject: [PATCH 5/6] ARM: LPC32xx: Remove USB and I2C init from phy3250.c USB and I2C initialization can be removed safely from the board specific phy3250.c, now that initialization moved to the generalized clock.c. Signed-off-by: Roland Stigge Tested-by: Alexandre Pereira da Silva --- arch/arm/mach-lpc32xx/phy3250.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 5be2cbfb4d99..ff3c1f4aa500 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -248,18 +248,6 @@ static void __init lpc3250_machine_init(void) tmp |= LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16; __raw_writel(tmp, LPC32XX_CLKPWR_LCDCLK_CTRL); - /* Set up USB power */ - tmp = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); - tmp |= LPC32XX_CLKPWR_USBCTRL_HCLK_EN | - LPC32XX_CLKPWR_USBCTRL_USBI2C_EN; - __raw_writel(tmp, LPC32XX_CLKPWR_USB_CTRL); - - /* Set up I2C pull levels */ - tmp = __raw_readl(LPC32XX_CLKPWR_I2C_CLK_CTRL); - tmp |= LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE | - LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE; - __raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL); - lpc32xx_serial_init(); /* Test clock needed for UDA1380 initial init */ From dcdd1339a3cda33f216628142eea78f3d41b47fe Mon Sep 17 00:00:00 2001 From: Alexandre Pereira da Silva Date: Sun, 1 Jul 2012 21:06:45 +0200 Subject: [PATCH 6/6] ARM: LPC32xx: Remove unused gpios Remove SPI0_CS, MMC_CD and MMC_WP gpios as they moved to devicetree. Signed-off-by: Alexandre Pereira da Silva Signed-off-by: Roland Stigge --- arch/arm/mach-lpc32xx/phy3250.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index ff3c1f4aa500..8625237ce656 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -51,12 +51,9 @@ /* * Mapped GPIOLIB GPIOs */ -#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) #define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0) #define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4) #define MMC_PWR_ENABLE_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 5) -#define MMC_CD_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 1) -#define MMC_WP_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 0) /* * AMBA LCD controller