From 49012fd79f3f1935ac808328ab34eefe606e2a9a Mon Sep 17 00:00:00 2001 From: Divy Le Ray Date: Wed, 30 May 2007 10:01:39 -0700 Subject: [PATCH] --- yaml --- r: 57927 b: refs/heads/master c: c706bfb52afc9b5d115f61a8e1c0c30540feb3f4 h: refs/heads/master i: 57925: d1ced28fd233d8314f3b7ef5a2cef1c57e2cfcfa 57923: c4a94eac50731f28655e940319025ed8cade9d77 57919: 1c3218545ce1fbfec4949a2e3158478182c07e5b v: v3 --- [refs] | 2 +- trunk/drivers/net/cxgb3/ael1002.c | 10 ++++++++-- trunk/drivers/net/cxgb3/regs.h | 2 ++ 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 876b60fdbbe1..8b5254f0d3e0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 890de332834a95450a74e5f615f4f9a0fa564623 +refs/heads/master: c706bfb52afc9b5d115f61a8e1c0c30540feb3f4 diff --git a/trunk/drivers/net/cxgb3/ael1002.c b/trunk/drivers/net/cxgb3/ael1002.c index 73a41e6a5bfc..ee140e63ddc5 100644 --- a/trunk/drivers/net/cxgb3/ael1002.c +++ b/trunk/drivers/net/cxgb3/ael1002.c @@ -219,7 +219,13 @@ static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok, unsigned int status; status = t3_read_reg(phy->adapter, - XGM_REG(A_XGM_SERDES_STAT0, phy->addr)); + XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) | + t3_read_reg(phy->adapter, + XGM_REG(A_XGM_SERDES_STAT3, phy->addr)); *link_ok = !(status & F_LOWSIG0); } if (speed) @@ -247,5 +253,5 @@ static struct cphy_ops xaui_direct_ops = { void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr, const struct mdio_ops *mdio_ops) { - cphy_init(phy, adapter, 1, &xaui_direct_ops, mdio_ops); + cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops); } diff --git a/trunk/drivers/net/cxgb3/regs.h b/trunk/drivers/net/cxgb3/regs.h index e5a553410e24..bf9d6be7f214 100644 --- a/trunk/drivers/net/cxgb3/regs.h +++ b/trunk/drivers/net/cxgb3/regs.h @@ -2128,6 +2128,8 @@ #define F_RESETPLL01 V_RESETPLL01(1U) #define A_XGM_SERDES_STAT0 0x8f0 +#define A_XGM_SERDES_STAT1 0x8f4 +#define A_XGM_SERDES_STAT2 0x8f8 #define S_LOWSIG0 0 #define V_LOWSIG0(x) ((x) << S_LOWSIG0)