From 4a57c0a015d9c83a08b44daa1e2c6051705bd5fe Mon Sep 17 00:00:00 2001 From: Kevin Cernekee Date: Sat, 16 Oct 2010 14:22:33 -0700 Subject: [PATCH] --- yaml --- r: 260381 b: refs/heads/master c: 273f2d7e64f9fd22192b4cd31e7408284a721e69 h: refs/heads/master i: 260379: 962a5fd8af37c89c4947c8e8d2df16c01a35e292 v: v3 --- [refs] | 2 +- trunk/arch/mips/kernel/irq_cpu.c | 14 ++++++-------- 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/[refs] b/[refs] index 5545e7e6fc43..a378254f32c1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 565b60de325070ccc54b18346a1238d4fae17954 +refs/heads/master: 273f2d7e64f9fd22192b4cd31e7408284a721e69 diff --git a/trunk/arch/mips/kernel/irq_cpu.c b/trunk/arch/mips/kernel/irq_cpu.c index 6e71b284f6c9..191eb52228c4 100644 --- a/trunk/arch/mips/kernel/irq_cpu.c +++ b/trunk/arch/mips/kernel/irq_cpu.c @@ -103,14 +103,12 @@ void __init mips_cpu_irq_init(void) clear_c0_status(ST0_IM); clear_c0_cause(CAUSEF_IP); - /* - * Only MT is using the software interrupts currently, so we just - * leave them uninitialized for other processors. - */ - if (cpu_has_mipsmt) - for (i = irq_base; i < irq_base + 2; i++) - irq_set_chip_and_handler(i, &mips_mt_cpu_irq_controller, - handle_percpu_irq); + /* Software interrupts are used for MT/CMT IPI */ + for (i = irq_base; i < irq_base + 2; i++) + irq_set_chip_and_handler(i, cpu_has_mipsmt ? + &mips_mt_cpu_irq_controller : + &mips_cpu_irq_controller, + handle_percpu_irq); for (i = irq_base + 2; i < irq_base + 8; i++) irq_set_chip_and_handler(i, &mips_cpu_irq_controller,