From 4a61c93cc1677a40fabb4b7ee12c9b1f842cf97c Mon Sep 17 00:00:00 2001
From: Hiroshi Doyu <hdoyu@nvidia.com>
Date: Fri, 11 Jan 2013 15:11:54 +0200
Subject: [PATCH] --- yaml --- r: 355580 b: refs/heads/master c:
 7d19a34a89b8c5401bfa56c96fe05c644ecaeafe h: refs/heads/master v: v3

---
 [refs]                               |  2 +-
 trunk/arch/arm/boot/dts/tegra30.dtsi | 29 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index a4950b0a5fa5..89d917faa1ae 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4dd2bd3736d1c40a9bcc12bd6d9a9fd30e99aa7a
+refs/heads/master: 7d19a34a89b8c5401bfa56c96fe05c644ecaeafe
diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi
index 529fdb82dfdb..d7f5b54e61de 100644
--- a/trunk/arch/arm/boot/dts/tegra30.dtsi
+++ b/trunk/arch/arm/boot/dts/tegra30.dtsi
@@ -446,6 +446,35 @@
 		status = "disabled";
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <1>;
+		};
+
+		cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <2>;
+		};
+
+		cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <3>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a9-pmu";
 		interrupts = <0 144 0x04