From 4aa4f195f78b9d459ddf6ce25ec6a5360cd79b0f Mon Sep 17 00:00:00 2001
From: David Daney <david.daney@cavium.com>
Date: Tue, 30 Aug 2011 06:45:20 -0700
Subject: [PATCH] --- yaml --- r: 264311 b: refs/heads/master c:
 d968275921f9fa7fbc602ac6618ffec6a062ee3c h: refs/heads/master i:   264309:
 8ddd148c6140393568cbb6ff69b0a96c6f88823e   264307:
 e4ed94d7b47b8bd008e59c59d9a806753d281542   264303:
 3263fbe44a4d173e5e088d9403b5397b9fe61a4a v: v3

---
 [refs]                                   | 2 +-
 trunk/arch/mips/include/asm/stackframe.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 0146e1c3a682..5c8a3709eb1b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 465aaed0030b23d905f3eca5e65481773bea9ea1
+refs/heads/master: d968275921f9fa7fbc602ac6618ffec6a062ee3c
diff --git a/trunk/arch/mips/include/asm/stackframe.h b/trunk/arch/mips/include/asm/stackframe.h
index b4ba2449444b..cb41af5f3406 100644
--- a/trunk/arch/mips/include/asm/stackframe.h
+++ b/trunk/arch/mips/include/asm/stackframe.h
@@ -195,9 +195,9 @@
 		 * to cover the pipeline delay.
 		 */
 		.set	mips32
-		mfc0	v1, CP0_TCSTATUS
+		mfc0	k0, CP0_TCSTATUS
 		.set	mips0
-		LONG_S	v1, PT_TCSTATUS(sp)
+		LONG_S	k0, PT_TCSTATUS(sp)
 #endif /* CONFIG_MIPS_MT_SMTC */
 		LONG_S	$4, PT_R4(sp)
 		LONG_S	$5, PT_R5(sp)