From 4aa53bb0da64ed239ef1ab72107c6a3a26f4783c Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 7 Mar 2012 17:22:30 +0000 Subject: [PATCH] --- yaml --- r: 296704 b: refs/heads/master c: dab6487e35680ac5043c58a60554c49052276f5e h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/boot/dts/db8500.dtsi | 11 +++++++++++ trunk/arch/arm/mach-ux500/cpu.c | 14 +++++++++++++- 3 files changed, 25 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 2d0768a272e2..d706ad0d974c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7e0ce270b2ef3d0d00c3f0725f48aa3127d73edf +refs/heads/master: dab6487e35680ac5043c58a60554c49052276f5e diff --git a/trunk/arch/arm/boot/dts/db8500.dtsi b/trunk/arch/arm/boot/dts/db8500.dtsi index 67423e4fe107..614a471df4a7 100644 --- a/trunk/arch/arm/boot/dts/db8500.dtsi +++ b/trunk/arch/arm/boot/dts/db8500.dtsi @@ -16,8 +16,19 @@ #address-cells = <1>; #size-cells = <1>; compatible = "stericsson,db8500"; + interrupt-parent = <&intc>; ranges; + intc: interrupt-controller@a0411000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <1>; + interrupt-controller; + interrupt-parent; + reg = <0xa0411000 0x1000>, + <0xa0410100 0x100>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 7 0x4>; diff --git a/trunk/arch/arm/mach-ux500/cpu.c b/trunk/arch/arm/mach-ux500/cpu.c index 6242e88e5fd3..d11f3892a27d 100644 --- a/trunk/arch/arm/mach-ux500/cpu.c +++ b/trunk/arch/arm/mach-ux500/cpu.c @@ -16,6 +16,8 @@ #include #include #include +#include +#include #include #include @@ -28,6 +30,11 @@ void __iomem *_PRCMU_BASE; +static const struct of_device_id ux500_dt_irq_match[] = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + {}, +}; + void __init ux500_init_irq(void) { void __iomem *dist_base; @@ -42,7 +49,12 @@ void __init ux500_init_irq(void) } else ux500_unknown_soc(); - gic_init(0, 29, dist_base, cpu_base); +#ifdef CONFIG_OF + if (of_have_populated_dt()) + of_irq_init(ux500_dt_irq_match); + else +#endif + gic_init(0, 29, dist_base, cpu_base); /* * Init clocks here so that they are available for system timer