From 4c083dd48e6bd68fdc2f3ca4b1f6a50830a6546f Mon Sep 17 00:00:00 2001
From: Tony Prisk <linux@prisktech.co.nz>
Date: Tue, 20 Nov 2012 06:44:46 +1300
Subject: [PATCH] --- yaml --- r: 347115 b: refs/heads/master c:
 422470a8265fbb1d182c00ab2421f4b416ab2dba h: refs/heads/master i:   347113:
 0f4450883d65feb9459709fbcdb71597a9a6d956   347111:
 0e78f8242a5aa3f22e3bdce29d20921aff700537 v: v3

---
 [refs]                         |  2 +-
 trunk/drivers/pwm/pwm-vt8500.c | 14 ++++++++++++--
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 9cad1623700c..04b384845de3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2f9569f7ceab31242b306d040861737580e1876f
+refs/heads/master: 422470a8265fbb1d182c00ab2421f4b416ab2dba
diff --git a/trunk/drivers/pwm/pwm-vt8500.c b/trunk/drivers/pwm/pwm-vt8500.c
index 806f72c2421f..b0ba2d403439 100644
--- a/trunk/drivers/pwm/pwm-vt8500.c
+++ b/trunk/drivers/pwm/pwm-vt8500.c
@@ -62,6 +62,13 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
 	unsigned long long c;
 	unsigned long period_cycles, prescale, pv, dc;
+	int err;
+
+	err = clk_enable(vt8500->clk);
+	if (err < 0) {
+		dev_err(chip->dev, "failed to enable clock\n");
+		return err;
+	}
 
 	c = clk_get_rate(vt8500->clk);
 	c = c * period_ns;
@@ -75,8 +82,10 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	if (pv > 4095)
 		pv = 4095;
 
-	if (prescale > 1023)
+	if (prescale > 1023) {
+		clk_disable(vt8500->clk);
 		return -EINVAL;
+	}
 
 	c = (unsigned long long)pv * duty_ns;
 	do_div(c, period_ns);
@@ -91,6 +100,7 @@ static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 3));
 	writel(dc, vt8500->base + 0xc + (pwm->hwpwm << 4));
 
+	clk_disable(vt8500->clk);
 	return 0;
 }
 
@@ -103,7 +113,7 @@ static int vt8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 	if (err < 0) {
 		dev_err(chip->dev, "failed to enable clock\n");
 		return err;
-	};
+	}
 
 	pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 0));
 	writel(5, vt8500->base + (pwm->hwpwm << 4));