From 4c3905e5ac33ea6a8e19dba14faa64538e8a001f Mon Sep 17 00:00:00 2001
From: Tim Abbott <tabbott@ksplice.com>
Date: Wed, 16 Sep 2009 16:44:29 -0400
Subject: [PATCH] --- yaml --- r: 166422 b: refs/heads/master c:
 07e81d61605f885920f31634a65aace52beb97db h: refs/heads/master v: v3

---
 [refs]                              | 2 +-
 trunk/arch/x86/kernel/traps.c       | 6 ++----
 trunk/arch/x86/kernel/vmlinux.lds.S | 1 -
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/[refs] b/[refs]
index 6495f64d7199..e874ee3ce143 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4ae59b916d269255800d69a07ac5b0c368a417f8
+refs/heads/master: 07e81d61605f885920f31634a65aace52beb97db
diff --git a/trunk/arch/x86/kernel/traps.c b/trunk/arch/x86/kernel/traps.c
index 83264922a878..ea23d3b76f95 100644
--- a/trunk/arch/x86/kernel/traps.c
+++ b/trunk/arch/x86/kernel/traps.c
@@ -73,11 +73,9 @@ char ignore_fpu_irq;
 
 /*
  * The IDT has to be page-aligned to simplify the Pentium
- * F0 0F bug workaround.. We have a special link segment
- * for this.
+ * F0 0F bug workaround.
  */
-gate_desc idt_table[NR_VECTORS]
-	__attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
+gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, };
 #endif
 
 DECLARE_BITMAP(used_vectors, NR_VECTORS);
diff --git a/trunk/arch/x86/kernel/vmlinux.lds.S b/trunk/arch/x86/kernel/vmlinux.lds.S
index 5c7826dd804b..7d6cef363c47 100644
--- a/trunk/arch/x86/kernel/vmlinux.lds.S
+++ b/trunk/arch/x86/kernel/vmlinux.lds.S
@@ -112,7 +112,6 @@ SECTIONS
 #endif
 
 		PAGE_ALIGNED_DATA(PAGE_SIZE)
-		*(.data.idt)
 
 		CACHELINE_ALIGNED_DATA(CONFIG_X86_L1_CACHE_BYTES)