From 4c7b84d9089d5d6e8c87e1a91683bf9c1ceff957 Mon Sep 17 00:00:00 2001
From: Richard Kuo <rkuo@codeaurora.org>
Date: Sun, 28 Oct 2012 19:54:37 -0500
Subject: [PATCH] --- yaml --- r: 367948 b: refs/heads/master c:
 db0fe532db3f60c93147514adfd1765894ea501e h: refs/heads/master v: v3

---
 [refs]                            |  2 +-
 trunk/arch/hexagon/kernel/traps.c | 10 ++++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 1b48a54ba22c..4127bae6a7e3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 20f704b69af63bffbc8e70bcf21990318a8912f5
+refs/heads/master: db0fe532db3f60c93147514adfd1765894ea501e
diff --git a/trunk/arch/hexagon/kernel/traps.c b/trunk/arch/hexagon/kernel/traps.c
index d59ee62f772d..12164a30e8ff 100644
--- a/trunk/arch/hexagon/kernel/traps.c
+++ b/trunk/arch/hexagon/kernel/traps.c
@@ -65,6 +65,10 @@ static const char *ex_name(int ex)
 		return "Write protection fault";
 	case HVM_GE_C_XMAL:
 		return "Misaligned instruction";
+	case HVM_GE_C_WREG:
+		return "Multiple writes to same register in packet";
+	case HVM_GE_C_PCAL:
+		return "Program counter values that are not properly aligned";
 	case HVM_GE_C_RMAL:
 		return "Misaligned data load";
 	case HVM_GE_C_WMAL:
@@ -324,6 +328,12 @@ void do_genex(struct pt_regs *regs)
 	case HVM_GE_C_XMAL:
 		misaligned_instruction(regs);
 		break;
+	case HVM_GE_C_WREG:
+		illegal_instruction(regs);
+		break;
+	case HVM_GE_C_PCAL:
+		misaligned_instruction(regs);
+		break;
 	case HVM_GE_C_RMAL:
 		misaligned_data_load(regs);
 		break;