From 4cfbca6a82e5b8f53abc888c274cbd1f3da7b6b6 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Sun, 25 Mar 2012 19:47:33 +0200 Subject: [PATCH] --- yaml --- r: 306993 b: refs/heads/master c: 3ae5378330f581466b05bcea2dd3bc8731a598cb h: refs/heads/master i: 306991: d34d12ea3271e24834c68b4688aea380377f4c10 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_gem.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 2bf5d740456d..8725629dba1d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a0356fc373517bc19713c9ff3aeedccbcc2ef7a4 +refs/heads/master: 3ae5378330f581466b05bcea2dd3bc8731a598cb diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c index 34ef339158c1..75e3b841fffb 100644 --- a/trunk/drivers/gpu/drm/i915/i915_gem.c +++ b/trunk/drivers/gpu/drm/i915/i915_gem.c @@ -808,6 +808,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, } if (obj->gtt_space && + obj->cache_level == I915_CACHE_NONE && obj->base.write_domain != I915_GEM_DOMAIN_CPU) { ret = i915_gem_object_pin(obj, 0, true); if (ret)