From 4d2f3e93062650871ba3608a74a952bc75c3bc06 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 24 Jan 2011 15:22:13 +0100 Subject: [PATCH] --- yaml --- r: 232399 b: refs/heads/master c: 8cb2815574278a1bf966f041cbfe5b7c91472dcd h: refs/heads/master i: 232397: 2eddf963e0c9a181160796059f30e02cff813c37 232395: 5c39bc1d33a7232eec7a590cddbf5bd9a13013ce 232391: dabd4a95d5c38c8b355c15bde3d43f6444505b23 232383: 439ec53991abf55a36d1f3a472cacc5ecd5a3135 v: v3 --- [refs] | 2 +- trunk/arch/arm/include/asm/hardware/sp810.h | 6 -- trunk/arch/arm/include/asm/memory.h | 2 +- trunk/arch/arm/kernel/smp_twd.c | 7 +- trunk/arch/arm/mach-ep93xx/gpio.c | 7 -- trunk/arch/arm/mach-realview/Kconfig | 49 +++++------ trunk/arch/arm/mach-realview/platsmp.c | 2 +- trunk/arch/arm/mach-versatile/Kconfig | 10 +-- trunk/arch/arm/mach-vexpress/platsmp.c | 2 +- trunk/arch/arm/mach-vexpress/v2m.c | 9 -- trunk/drivers/mmc/host/mmci.c | 98 +++++---------------- trunk/drivers/mmc/host/mmci.h | 5 +- trunk/sound/arm/aaci.c | 48 +++++----- 13 files changed, 78 insertions(+), 169 deletions(-) diff --git a/[refs] b/[refs] index 82460a3f9477..556966e20c6f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 250c7a61c35a258e2422b3d55c61bfbad33326be +refs/heads/master: 8cb2815574278a1bf966f041cbfe5b7c91472dcd diff --git a/trunk/arch/arm/include/asm/hardware/sp810.h b/trunk/arch/arm/include/asm/hardware/sp810.h index 721847dc68ab..a101f10bb5b1 100644 --- a/trunk/arch/arm/include/asm/hardware/sp810.h +++ b/trunk/arch/arm/include/asm/hardware/sp810.h @@ -50,12 +50,6 @@ #define SCPCELLID2 0xFF8 #define SCPCELLID3 0xFFC -#define SCCTRL_TIMEREN0SEL_REFCLK (0 << 15) -#define SCCTRL_TIMEREN0SEL_TIMCLK (1 << 15) - -#define SCCTRL_TIMEREN1SEL_REFCLK (0 << 17) -#define SCCTRL_TIMEREN1SEL_TIMCLK (1 << 17) - static inline void sysctl_soft_reset(void __iomem *base) { /* writing any value to SCSYSSTAT reg will reset system */ diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index d0ee74b7cf86..23c2e8e5c0fa 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -188,7 +188,7 @@ * translation for translating DMA addresses. Use the driver * DMA support - see dma-mapping.h. */ -static inline unsigned long virt_to_phys(const volatile void *x) +static inline unsigned long virt_to_phys(void *x) { return __virt_to_phys((unsigned long)(x)); } diff --git a/trunk/arch/arm/kernel/smp_twd.c b/trunk/arch/arm/kernel/smp_twd.c index 60636f499cb3..fd9156698ab9 100644 --- a/trunk/arch/arm/kernel/smp_twd.c +++ b/trunk/arch/arm/kernel/smp_twd.c @@ -36,7 +36,6 @@ static void twd_set_mode(enum clock_event_mode mode, /* timer load already set up */ ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; - __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: /* period set, and timer enabled in 'next_event' hook */ @@ -82,7 +81,7 @@ int twd_timer_ack(void) static void __cpuinit twd_calibrate_rate(void) { - unsigned long count; + unsigned long load, count; u64 waitjiffies; /* @@ -117,6 +116,10 @@ static void __cpuinit twd_calibrate_rate(void) printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, (twd_timer_rate / 1000000) % 100); } + + load = twd_timer_rate / HZ; + + __raw_writel(load, twd_base + TWD_TIMER_LOAD); } /* diff --git a/trunk/arch/arm/mach-ep93xx/gpio.c b/trunk/arch/arm/mach-ep93xx/gpio.c index bec34b834958..f3dc76fdcea8 100644 --- a/trunk/arch/arm/mach-ep93xx/gpio.c +++ b/trunk/arch/arm/mach-ep93xx/gpio.c @@ -427,13 +427,6 @@ void __init ep93xx_gpio_init(void) { int i; - /* Set Ports C, D, E, G, and H for GPIO use */ - ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | - EP93XX_SYSCON_DEVCFG_GONK | - EP93XX_SYSCON_DEVCFG_EONIDE | - EP93XX_SYSCON_DEVCFG_GONIDE | - EP93XX_SYSCON_DEVCFG_HONIDE); - for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++) gpiochip_add(&ep93xx_gpio_banks[i].chip); } diff --git a/trunk/arch/arm/mach-realview/Kconfig b/trunk/arch/arm/mach-realview/Kconfig index 7ca138a943a9..b4575ae9648e 100644 --- a/trunk/arch/arm/mach-realview/Kconfig +++ b/trunk/arch/arm/mach-realview/Kconfig @@ -2,56 +2,52 @@ menu "RealView platform type" depends on ARCH_REALVIEW config MACH_REALVIEW_EB - bool "Support RealView(R) Emulation Baseboard" + bool "Support RealView/EB platform" select ARM_GIC help - Include support for the ARM(R) RealView(R) Emulation Baseboard - platform. + Include support for the ARM(R) RealView Emulation Baseboard platform. config REALVIEW_EB_A9MP - bool "Support Multicore Cortex-A9 Tile" + bool "Support Multicore Cortex-A9" depends on MACH_REALVIEW_EB select CPU_V7 help - Enable support for the Cortex-A9MPCore tile fitted to the - Realview(R) Emulation Baseboard platform. + Enable support for the Cortex-A9MPCore tile on the Realview platform. config REALVIEW_EB_ARM11MP - bool "Support ARM11MPCore Tile" + bool "Support ARM11MPCore tile" depends on MACH_REALVIEW_EB select CPU_V6 select ARCH_HAS_BARRIERS if SMP help - Enable support for the ARM11MPCore tile fitted to the Realview(R) - Emulation Baseboard platform. + Enable support for the ARM11MPCore tile on the Realview platform. config REALVIEW_EB_ARM11MP_REVB - bool "Support ARM11MPCore RevB Tile" + bool "Support ARM11MPCore RevB tile" depends on REALVIEW_EB_ARM11MP help - Enable support for the ARM11MPCore Revision B tile on the - Realview(R) Emulation Baseboard platform. Since there are device - address differences, a kernel built with this option enabled is - not compatible with other revisions of the ARM11MPCore tile. + Enable support for the ARM11MPCore RevB tile on the Realview + platform. Since there are device address differences, a + kernel built with this option enabled is not compatible with + other revisions of the ARM11MPCore tile. config MACH_REALVIEW_PB11MP - bool "Support RealView(R) Platform Baseboard for ARM11MPCore" + bool "Support RealView/PB11MPCore platform" select CPU_V6 select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_HAS_BARRIERS if SMP help - Include support for the ARM(R) RealView(R) Platform Baseboard for - the ARM11MPCore. This platform has an on-board ARM11MPCore and has + Include support for the ARM(R) RealView MPCore Platform Baseboard. + PB11MPCore is a platform with an on-board ARM11MPCore and has support for PCI-E and Compact Flash. config MACH_REALVIEW_PB1176 - bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S" + bool "Support RealView/PB1176 platform" select CPU_V6 select ARM_GIC help - Include support for the ARM(R) RealView(R) Platform Baseboard for - ARM1176JZF-S. + Include support for the ARM(R) RealView ARM1176 Platform Baseboard. config REALVIEW_PB1176_SECURE_FLASH bool "Allow access to the secure flash memory block" @@ -63,24 +59,23 @@ config REALVIEW_PB1176_SECURE_FLASH block (64MB @ 0x3c000000) is required. config MACH_REALVIEW_PBA8 - bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" + bool "Support RealView/PB-A8 platform" select CPU_V7 select ARM_GIC select HAVE_PATA_PLATFORM help - Include support for the ARM(R) RealView Platform Baseboard for - Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has - support for PCI-E and Compact Flash. + Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard. + PB-A8 is a platform with an on-board Cortex-A8 and has support for + PCI-E and Compact Flash. config MACH_REALVIEW_PBX - bool "Support RealView(R) Platform Baseboard Explore" + bool "Support RealView/PBX platform" select ARM_GIC select HAVE_PATA_PLATFORM select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ZONE_DMA if SPARSEMEM help - Include support for the ARM(R) RealView(R) Platform Baseboard - Explore. + Include support for the ARM(R) RealView PBX platform. config REALVIEW_HIGH_PHYS_OFFSET bool "High physical base address for the RealView platform" diff --git a/trunk/arch/arm/mach-realview/platsmp.c b/trunk/arch/arm/mach-realview/platsmp.c index 6959d13d908a..a22bf67f2f78 100644 --- a/trunk/arch/arm/mach-realview/platsmp.c +++ b/trunk/arch/arm/mach-realview/platsmp.c @@ -41,7 +41,7 @@ volatile int __cpuinitdata pen_release = -1; * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void __cpuinit write_pen_release(int val) +static void write_pen_release(int val) { pen_release = val; smp_wmb(); diff --git a/trunk/arch/arm/mach-versatile/Kconfig b/trunk/arch/arm/mach-versatile/Kconfig index 9cdec5aa04a0..3f7b5e9d83c5 100644 --- a/trunk/arch/arm/mach-versatile/Kconfig +++ b/trunk/arch/arm/mach-versatile/Kconfig @@ -2,19 +2,17 @@ menu "Versatile platform type" depends on ARCH_VERSATILE config ARCH_VERSATILE_PB - bool "Support Versatile Platform Baseboard for ARM926EJ-S" + bool "Support Versatile/PB platform" select CPU_ARM926T select MIGHT_HAVE_PCI default y help - Include support for the ARM(R) Versatile Platform Baseboard - for the ARM926EJ-S. + Include support for the ARM(R) Versatile/PB platform. config MACH_VERSATILE_AB - bool "Support Versatile Application Baseboard for ARM926EJ-S" + bool "Support Versatile/AB platform" select CPU_ARM926T help - Include support for the ARM(R) Versatile Application Baseboard - for the ARM926EJ-S. + Include support for the ARM(R) Versatile/AP platform. endmenu diff --git a/trunk/arch/arm/mach-vexpress/platsmp.c b/trunk/arch/arm/mach-vexpress/platsmp.c index 634bf1d3a311..b1687b6abe63 100644 --- a/trunk/arch/arm/mach-vexpress/platsmp.c +++ b/trunk/arch/arm/mach-vexpress/platsmp.c @@ -39,7 +39,7 @@ volatile int __cpuinitdata pen_release = -1; * observers, irrespective of whether they're taking part in coherency * or not. This is necessary for the hotplug code to work reliably. */ -static void __cpuinit write_pen_release(int val) +static void write_pen_release(int val) { pen_release = val; smp_wmb(); diff --git a/trunk/arch/arm/mach-vexpress/v2m.c b/trunk/arch/arm/mach-vexpress/v2m.c index 1edae65a0e72..a9ed3428a2fa 100644 --- a/trunk/arch/arm/mach-vexpress/v2m.c +++ b/trunk/arch/arm/mach-vexpress/v2m.c @@ -19,7 +19,6 @@ #include #include #include -#include #include @@ -51,16 +50,8 @@ void __init v2m_map_io(struct map_desc *tile, size_t num) static void __init v2m_timer_init(void) { - u32 scctrl; - versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000); - /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ - scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL)); - scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; - scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK; - writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL)); - writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL); writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL); diff --git a/trunk/drivers/mmc/host/mmci.c b/trunk/drivers/mmc/host/mmci.c index 563022825667..2de12fe155da 100644 --- a/trunk/drivers/mmc/host/mmci.c +++ b/trunk/drivers/mmc/host/mmci.c @@ -46,10 +46,6 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY * is asserted (likewise for RX) - * @broken_blockend: the MCI_DATABLOCKEND is broken on the hardware - * and will not work at all. - * @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when - * using DMA. * @sdio: variant supports SDIO * @st_clkdiv: true if using a ST-specific clock divider algorithm */ @@ -59,8 +55,6 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; - bool broken_blockend; - bool broken_blockend_dma; bool sdio; bool st_clkdiv; }; @@ -76,7 +70,6 @@ static struct variant_data variant_u300 = { .fifohalfsize = 8 * 4, .clkreg_enable = 1 << 13, /* HWFCEN */ .datalength_bits = 16, - .broken_blockend_dma = true, .sdio = true, }; @@ -86,7 +79,6 @@ static struct variant_data variant_ux500 = { .clkreg = MCI_CLK_ENABLE, .clkreg_enable = 1 << 14, /* HWFCEN */ .datalength_bits = 24, - .broken_blockend = true, .sdio = true, .st_clkdiv = true, }; @@ -210,8 +202,6 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) host->data = data; host->size = data->blksz * data->blocks; host->data_xfered = 0; - host->blockend = false; - host->dataend = false; mmci_init_sg(host, data); @@ -288,21 +278,26 @@ static void mmci_data_irq(struct mmci_host *host, struct mmc_data *data, unsigned int status) { - struct variant_data *variant = host->variant; - /* First check for errors */ if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { + u32 remain, success; + + /* Calculate how far we are into the transfer */ + remain = readl(host->base + MMCIDATACNT) << 2; + success = data->blksz * data->blocks - remain; + dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status); - if (status & MCI_DATACRCFAIL) + if (status & MCI_DATACRCFAIL) { + /* Last block was not successful */ + host->data_xfered = ((success / data->blksz) - 1 * data->blksz); data->error = -EILSEQ; - else if (status & MCI_DATATIMEOUT) + } else if (status & MCI_DATATIMEOUT) { + host->data_xfered = success; data->error = -ETIMEDOUT; - else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) + } else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) { + host->data_xfered = success; data->error = -EIO; - - /* Force-complete the transaction */ - host->blockend = true; - host->dataend = true; + } /* * We hit an error condition. Ensure that any data @@ -321,61 +316,14 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, } } - /* - * On ARM variants in PIO mode, MCI_DATABLOCKEND - * is always sent first, and we increase the - * transfered number of bytes for that IRQ. Then - * MCI_DATAEND follows and we conclude the transaction. - * - * On the Ux500 single-IRQ variant MCI_DATABLOCKEND - * doesn't seem to immediately clear from the status, - * so we can't use it keep count when only one irq is - * used because the irq will hit for other reasons, and - * then the flag is still up. So we use the MCI_DATAEND - * IRQ at the end of the entire transfer because - * MCI_DATABLOCKEND is broken. - * - * In the U300, the IRQs can arrive out-of-order, - * e.g. MCI_DATABLOCKEND sometimes arrives after MCI_DATAEND, - * so for this case we use the flags "blockend" and - * "dataend" to make sure both IRQs have arrived before - * concluding the transaction. (This does not apply - * to the Ux500 which doesn't fire MCI_DATABLOCKEND - * at all.) In DMA mode it suffers from the same problem - * as the Ux500. - */ - if (status & MCI_DATABLOCKEND) { - /* - * Just being a little over-cautious, we do not - * use this progressive update if the hardware blockend - * flag is unreliable: since it can stay high between - * IRQs it will corrupt the transfer counter. - */ - if (!variant->broken_blockend) - host->data_xfered += data->blksz; - host->blockend = true; - } - - if (status & MCI_DATAEND) - host->dataend = true; + if (status & MCI_DATABLOCKEND) + dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); - /* - * On variants with broken blockend we shall only wait for dataend, - * on others we must sync with the blockend signal since they can - * appear out-of-order. - */ - if (host->dataend && (host->blockend || variant->broken_blockend)) { + if (status & MCI_DATAEND) { mmci_stop_data(host); - /* Reset these flags */ - host->blockend = false; - host->dataend = false; - - /* - * Variants with broken blockend flags need to handle the - * end of the entire transfer here. - */ - if (variant->broken_blockend && !data->error) + if (!data->error) + /* The error clause is handled above, success! */ host->data_xfered += data->blksz * data->blocks; if (!data->stop) { @@ -770,7 +718,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) struct variant_data *variant = id->data; struct mmci_host *host; struct mmc_host *mmc; - unsigned int mask; int ret; /* must have platform data */ @@ -951,12 +898,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) goto irq0_free; } - mask = MCI_IRQENABLE; - /* Don't use the datablockend flag if it's broken */ - if (variant->broken_blockend) - mask &= ~MCI_DATABLOCKEND; - - writel(mask, host->base + MMCIMASK0); + writel(MCI_IRQENABLE, host->base + MMCIMASK0); amba_set_drvdata(dev, mmc); diff --git a/trunk/drivers/mmc/host/mmci.h b/trunk/drivers/mmc/host/mmci.h index df06f01aac89..c1df7b82d36c 100644 --- a/trunk/drivers/mmc/host/mmci.h +++ b/trunk/drivers/mmc/host/mmci.h @@ -137,7 +137,7 @@ #define MCI_IRQENABLE \ (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \ MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ - MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK) + MCI_CMDRESPENDMASK|MCI_CMDSENTMASK) /* These interrupts are directed to IRQ1 when two IRQ lines are available */ #define MCI_IRQ1MASK \ @@ -177,9 +177,6 @@ struct mmci_host { struct timer_list timer; unsigned int oldstat; - bool blockend; - bool dataend; - /* pio stuff */ struct sg_mapping_iter sg_miter; unsigned int size; diff --git a/trunk/sound/arm/aaci.c b/trunk/sound/arm/aaci.c index 24d3013c0231..91acc9a243ec 100644 --- a/trunk/sound/arm/aaci.c +++ b/trunk/sound/arm/aaci.c @@ -30,8 +30,6 @@ #define DRIVER_NAME "aaci-pl041" -#define FRAME_PERIOD_US 21 - /* * PM support is not complete. Turn it off. */ @@ -66,8 +64,8 @@ static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) { struct aaci *aaci = ac97->private_data; - int timeout; u32 v; + int timeout = 5000; if (ac97->num >= 4) return; @@ -83,17 +81,14 @@ static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, writel(val << 4, aaci->base + AACI_SL2TX); writel(reg << 12, aaci->base + AACI_SL1TX); - /* Initially, wait one frame period */ - udelay(FRAME_PERIOD_US); - - /* And then wait an additional eight frame periods for it to be sent */ - timeout = FRAME_PERIOD_US * 8; + /* + * Wait for the transmission of both slots to complete. + */ do { - udelay(1); v = readl(aaci->base + AACI_SLFR); } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout); - if (v & (SLFR_1TXB|SLFR_2TXB)) + if (!timeout) dev_err(&aaci->dev->dev, "timeout waiting for write to complete\n"); @@ -106,8 +101,9 @@ static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) { struct aaci *aaci = ac97->private_data; - int timeout, retries = 10; u32 v; + int timeout = 5000; + int retries = 10; if (ac97->num >= 4) return ~0; @@ -121,34 +117,35 @@ static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) */ writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX); - /* Initially, wait one frame period */ - udelay(FRAME_PERIOD_US); - - /* And then wait an additional eight frame periods for it to be sent */ - timeout = FRAME_PERIOD_US * 8; + /* + * Wait for the transmission to complete. + */ do { - udelay(1); v = readl(aaci->base + AACI_SLFR); } while ((v & SLFR_1TXB) && --timeout); - if (v & SLFR_1TXB) { + if (!timeout) { dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n"); v = ~0; goto out; } - /* Now wait for the response frame */ - udelay(FRAME_PERIOD_US); + /* + * Give the AC'97 codec more than enough time + * to respond. (42us = ~2 frames at 48kHz.) + */ + udelay(42); - /* And then wait an additional eight frame periods for data */ - timeout = FRAME_PERIOD_US * 8; + /* + * Wait for slot 2 to indicate data. + */ + timeout = 5000; do { - udelay(1); cond_resched(); v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout); - if (v != (SLFR_1RXV|SLFR_2RXV)) { + if (!timeout) { dev_err(&aaci->dev->dev, "timeout on RX valid\n"); v = ~0; goto out; @@ -182,7 +179,6 @@ aaci_chan_wait_ready(struct aaci_runtime *aacirun, unsigned long mask) int timeout = 5000; do { - udelay(1); val = readl(aacirun->base + AACI_SR); } while (val & mask && timeout--); } @@ -878,7 +874,7 @@ static int __devinit aaci_probe_ac97(struct aaci *aaci) * Give the AC'97 codec more than enough time * to wake up. (42us = ~2 frames at 48kHz.) */ - udelay(FRAME_PERIOD_US * 2); + udelay(42); ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus); if (ret)