From 4d587468621d4692ca22ea51b2998be83c8d74b6 Mon Sep 17 00:00:00 2001 From: Kyle McMartin Date: Tue, 15 Apr 2008 18:36:38 -0400 Subject: [PATCH] --- yaml --- r: 88337 b: refs/heads/master c: cf39cc3b56bc4a562db6242d3069f65034ec7549 h: refs/heads/master i: 88335: 2c5d6da204c5c8bf8cd250ea931ba732baa03ed2 v: v3 --- [refs] | 2 +- trunk/arch/parisc/kernel/signal.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 90a0b1c4f30f..60b3d06280c5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 093a07e2fdfaddab7fc7d4adc76cc569c86603d7 +refs/heads/master: cf39cc3b56bc4a562db6242d3069f65034ec7549 diff --git a/trunk/arch/parisc/kernel/signal.c b/trunk/arch/parisc/kernel/signal.c index 58fccc96d003..06213d1d6d95 100644 --- a/trunk/arch/parisc/kernel/signal.c +++ b/trunk/arch/parisc/kernel/signal.c @@ -534,7 +534,8 @@ insert_restart_trampoline(struct pt_regs *regs) * Flushing one cacheline is cheap. * "sync" on bigger (> 4 way) boxes is not. */ - flush_icache_range(regs->gr[30], regs->gr[30] + 4); + flush_user_dcache_range(regs->gr[30], regs->gr[30] + 4); + flush_user_icache_range(regs->gr[30], regs->gr[30] + 4); regs->gr[31] = regs->gr[30] + 8; /* Preserve original r28. */