From 4d7375244139131f4c89047ec2d8063c7e5ea740 Mon Sep 17 00:00:00 2001
From: Yu Zhao <yu.zhao@intel.com>
Date: Sat, 22 Nov 2008 02:40:40 +0800
Subject: [PATCH] --- yaml --- r: 127382 b: refs/heads/master c:
 0b400c7ed4d027e02f6231afa39852a2d48e6f25 h: refs/heads/master v: v3

---
 [refs]                    |  2 +-
 trunk/drivers/pci/pci.h   |  9 +++++++++
 trunk/drivers/pci/probe.c | 20 +++++++++-----------
 3 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/[refs] b/[refs]
index 5e9c5ee2dee6..d7cb4301e7f6 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: bc5f5a8277cb353161454b6704b3186ebcf3a2a3
+refs/heads/master: 0b400c7ed4d027e02f6231afa39852a2d48e6f25
diff --git a/trunk/drivers/pci/pci.h b/trunk/drivers/pci/pci.h
index 392388468f6f..d881fde8bb82 100644
--- a/trunk/drivers/pci/pci.h
+++ b/trunk/drivers/pci/pci.h
@@ -162,6 +162,15 @@ struct pci_slot_attribute {
 };
 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 
+enum pci_bar_type {
+	pci_bar_unknown,	/* Standard PCI BAR probe */
+	pci_bar_io,		/* An io port BAR */
+	pci_bar_mem32,		/* A 32-bit memory BAR */
+	pci_bar_mem64,		/* A 64-bit memory BAR */
+};
+
+extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+				struct resource *res, unsigned int reg);
 extern void pci_enable_ari(struct pci_dev *dev);
 /**
  * pci_ari_enabled - query ARI forwarding status
diff --git a/trunk/drivers/pci/probe.c b/trunk/drivers/pci/probe.c
index e1cf5d50ed4d..5372d3699e08 100644
--- a/trunk/drivers/pci/probe.c
+++ b/trunk/drivers/pci/probe.c
@@ -135,13 +135,6 @@ static u64 pci_size(u64 base, u64 maxbase, u64 mask)
 	return size;
 }
 
-enum pci_bar_type {
-	pci_bar_unknown,	/* Standard PCI BAR probe */
-	pci_bar_io,		/* An io port BAR */
-	pci_bar_mem32,		/* A 32-bit memory BAR */
-	pci_bar_mem64,		/* A 64-bit memory BAR */
-};
-
 static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
 {
 	if ((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
@@ -156,11 +149,16 @@ static inline enum pci_bar_type decode_bar(struct resource *res, u32 bar)
 	return pci_bar_mem32;
 }
 
-/*
- * If the type is not unknown, we assume that the lowest bit is 'enable'.
- * Returns 1 if the BAR was 64-bit and 0 if it was 32-bit.
+/**
+ * pci_read_base - read a PCI BAR
+ * @dev: the PCI device
+ * @type: type of the BAR
+ * @res: resource buffer to be filled in
+ * @pos: BAR position in the config space
+ *
+ * Returns 1 if the BAR is 64-bit, or 0 if 32-bit.
  */
-static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 			struct resource *res, unsigned int pos)
 {
 	u32 l, sz, mask;