From 4da1e879ea81627d25ff98f5b1ba8d41a78e4824 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 6 Oct 2009 10:45:19 -0500 Subject: [PATCH] --- yaml --- r: 174762 b: refs/heads/master c: bc577d2bb98cc44371287fce3e892d26ad4050a8 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/probe.c | 6 ++++++ trunk/include/linux/pci_regs.h | 5 +++++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 8e68ca3118b4..8af84c86295d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0584396157ad2d008e2cc76b4ed6254151183a25 +refs/heads/master: bc577d2bb98cc44371287fce3e892d26ad4050a8 diff --git a/trunk/drivers/pci/probe.c b/trunk/drivers/pci/probe.c index 118463befef0..4842b09b7f3c 100644 --- a/trunk/drivers/pci/probe.c +++ b/trunk/drivers/pci/probe.c @@ -730,6 +730,7 @@ int pci_setup_device(struct pci_dev *dev) u32 class; u8 hdr_type; struct pci_slot *slot; + int pos = 0; if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type)) return -EIO; @@ -822,6 +823,11 @@ int pci_setup_device(struct pci_dev *dev) dev->transparent = ((dev->class & 0xff) == 1); pci_read_bases(dev, 2, PCI_ROM_ADDRESS1); set_pcie_hotplug_bridge(dev); + pos = pci_find_capability(dev, PCI_CAP_ID_SSVID); + if (pos) { + pci_read_config_word(dev, pos + PCI_SSVID_VENDOR_ID, &dev->subsystem_vendor); + pci_read_config_word(dev, pos + PCI_SSVID_DEVICE_ID, &dev->subsystem_device); + } break; case PCI_HEADER_TYPE_CARDBUS: /* CardBus bridge header */ diff --git a/trunk/include/linux/pci_regs.h b/trunk/include/linux/pci_regs.h index d798770f08cd..9f2ad0aa3c39 100644 --- a/trunk/include/linux/pci_regs.h +++ b/trunk/include/linux/pci_regs.h @@ -365,6 +365,11 @@ #define PCI_X_STATUS_266MHZ 0x40000000 /* 266 MHz capable */ #define PCI_X_STATUS_533MHZ 0x80000000 /* 533 MHz capable */ +/* PCI Bridge Subsystem ID registers */ + +#define PCI_SSVID_VENDOR_ID 4 /* PCI-Bridge subsystem vendor id register */ +#define PCI_SSVID_DEVICE_ID 6 /* PCI-Bridge subsystem device id register */ + /* PCI Express capability registers */ #define PCI_EXP_FLAGS 2 /* Capabilities register */