From 4e00495be1d460a01ea2739c4ee039d3314c5ee4 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Mon, 27 Jun 2011 15:39:07 +0800 Subject: [PATCH] --- yaml --- r: 257932 b: refs/heads/master c: c5697462ae94693764e468b701c616bbbd6f951c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/crypto/amcc/crypto4xx_core.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index dbac9d045f27..62b725609106 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 23457bc9566be64f33afdc159aadd42712673e0b +refs/heads/master: c5697462ae94693764e468b701c616bbbd6f951c diff --git a/trunk/drivers/crypto/amcc/crypto4xx_core.c b/trunk/drivers/crypto/amcc/crypto4xx_core.c index 18912521a7a5..1d103f997dc2 100644 --- a/trunk/drivers/crypto/amcc/crypto4xx_core.c +++ b/trunk/drivers/crypto/amcc/crypto4xx_core.c @@ -51,6 +51,7 @@ static void crypto4xx_hw_init(struct crypto4xx_device *dev) union ce_io_threshold io_threshold; u32 rand_num; union ce_pe_dma_cfg pe_dma_cfg; + u32 device_ctrl; writel(PPC4XX_BYTE_ORDER, dev->ce_base + CRYPTO4XX_BYTE_ORDER_CFG); /* setup pe dma, include reset sg, pdr and pe, then release reset */ @@ -84,7 +85,9 @@ static void crypto4xx_hw_init(struct crypto4xx_device *dev) writel(ring_size.w, dev->ce_base + CRYPTO4XX_RING_SIZE); ring_ctrl.w = 0; writel(ring_ctrl.w, dev->ce_base + CRYPTO4XX_RING_CTRL); - writel(PPC4XX_DC_3DES_EN, dev->ce_base + CRYPTO4XX_DEVICE_CTRL); + device_ctrl = readl(dev->ce_base + CRYPTO4XX_DEVICE_CTRL); + device_ctrl |= PPC4XX_DC_3DES_EN; + writel(device_ctrl, dev->ce_base + CRYPTO4XX_DEVICE_CTRL); writel(dev->gdr_pa, dev->ce_base + CRYPTO4XX_GATH_RING_BASE); writel(dev->sdr_pa, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE); part_ring_size.w = 0;