From 4ecddfa9e3c70de0428afde10a7c8d03d95ac6dd Mon Sep 17 00:00:00 2001 From: Adam Kropelin Date: Fri, 16 Sep 2005 19:28:19 -0700 Subject: [PATCH] --- yaml --- r: 9046 b: refs/heads/master c: 06c6d271f41ffa20f2dadc9bfe100a89f7f1dd1d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/hotplug/shpchp_ctrl.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 4b067b8cecf9..fc6b561fac26 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c2fa4f4ad8ddf4b9fac344f1da7a25d4868f08f5 +refs/heads/master: 06c6d271f41ffa20f2dadc9bfe100a89f7f1dd1d diff --git a/trunk/drivers/pci/hotplug/shpchp_ctrl.c b/trunk/drivers/pci/hotplug/shpchp_ctrl.c index 783b5abb0717..91c9903e621f 100644 --- a/trunk/drivers/pci/hotplug/shpchp_ctrl.c +++ b/trunk/drivers/pci/hotplug/shpchp_ctrl.c @@ -2824,8 +2824,7 @@ static int configure_new_function (struct controller * ctrl, struct pci_func * f } #endif /* Disable ROM base Address */ - temp_word = 0x00L; - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word); + rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00); /* Set HP parameters (Cache Line Size, Latency Timer) */ rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);