From 4f097ca86a5a58878e9c557365dbfed5b0adf207 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Fri, 24 Aug 2012 20:24:24 +0530 Subject: [PATCH] --- yaml --- r: 326665 b: refs/heads/master c: 78da264019e18db25b937fbb98328c680b1161cd h: refs/heads/master i: 326663: 9e093e094fc9f61e645db80454238b8d4a389dd3 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap2/clkt_dpll.c | 4 ++-- trunk/arch/arm/mach-omap2/dpll3xxx.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index bf5c468d11df..65d86e8605cc 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a2cfc509bc4eeef9f5c4607b1203f17f22ea2a36 +refs/heads/master: 78da264019e18db25b937fbb98328c680b1161cd diff --git a/trunk/arch/arm/mach-omap2/clkt_dpll.c b/trunk/arch/arm/mach-omap2/clkt_dpll.c index cd7fd0f91149..05ff99e528c8 100644 --- a/trunk/arch/arm/mach-omap2/clkt_dpll.c +++ b/trunk/arch/arm/mach-omap2/clkt_dpll.c @@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) clk_reparent(clk, dd->clk_bypass); - } else if (cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) @@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) return dd->clk_bypass->rate; - } else if (cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) diff --git a/trunk/arch/arm/mach-omap2/dpll3xxx.c b/trunk/arch/arm/mach-omap2/dpll3xxx.c index b9c8d2f6a81f..063e1f9b465a 100644 --- a/trunk/arch/arm/mach-omap2/dpll3xxx.c +++ b/trunk/arch/arm/mach-omap2/dpll3xxx.c @@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) * Set jitter correction. No jitter correction for OMAP4 and 3630 * since freqsel field is no longer present */ - if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { v = __raw_readl(dd->control_reg); v &= ~dd->freqsel_mask; v |= freqsel << __ffs(dd->freqsel_mask); @@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* No freqsel on OMAP4 and OMAP3630 */ - if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n); if (!freqsel)