From 4fa499c0b44f0ce19b4c2cbe5ea9dfe7b8fdd342 Mon Sep 17 00:00:00 2001 From: Patrik Jakobsson Date: Tue, 5 Mar 2013 14:24:48 +0100 Subject: [PATCH] --- yaml --- r: 360921 b: refs/heads/master c: f40ebd6bcbbd0d30591f42dc16be52b5086a366b h: refs/heads/master i: 360919: d4d3a0186d71df8ebcafc3515d55e3ea3c0632ff v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_crt.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 6fab7c9e330e..5a55637e1cd8 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 60222c0c2b4d813c72296b55f07d46b19ef83e44 +refs/heads/master: f40ebd6bcbbd0d30591f42dc16be52b5086a366b diff --git a/trunk/drivers/gpu/drm/i915/intel_crt.c b/trunk/drivers/gpu/drm/i915/intel_crt.c index cfc96878d742..da1f176a40b7 100644 --- a/trunk/drivers/gpu/drm/i915/intel_crt.c +++ b/trunk/drivers/gpu/drm/i915/intel_crt.c @@ -88,7 +88,7 @@ static void intel_disable_crt(struct intel_encoder *encoder) u32 temp; temp = I915_READ(crt->adpa_reg); - temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); + temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; temp &= ~ADPA_DAC_ENABLE; I915_WRITE(crt->adpa_reg, temp); }