From 501e33ef42fd43fe8aca8dc4782a934bc241c6ed Mon Sep 17 00:00:00 2001 From: Austin Zhang Date: Mon, 25 Aug 2008 11:14:51 -0400 Subject: [PATCH] --- yaml --- r: 109112 b: refs/heads/master c: 2a61812af2e564cba2c8170cf96e1c823210f619 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-x86/cpufeature.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 12e9c462356f..00cbd4d250e5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 52a8968ce95da8469ba0a9b3e4010fe31caf77a3 +refs/heads/master: 2a61812af2e564cba2c8170cf96e1c823210f619 diff --git a/trunk/include/asm-x86/cpufeature.h b/trunk/include/asm-x86/cpufeature.h index 2f5a792b0acc..762f6a6bc707 100644 --- a/trunk/include/asm-x86/cpufeature.h +++ b/trunk/include/asm-x86/cpufeature.h @@ -91,6 +91,7 @@ #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */ +#define X86_FEATURE_XMM4_2 (4*32+20) /* Streaming SIMD Extensions-4.2 */ /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ @@ -189,6 +190,7 @@ extern const char * const x86_power_flags[32]; #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) +#define cpu_has_xmm4_2 boot_cpu_has(X86_FEATURE_XMM4_2) #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) # define cpu_has_invlpg 1