diff --git a/[refs] b/[refs]
index a2b6c72decd6..f07afc9c2fbb 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
---
-refs/heads/master: 6861ff35ec5b60fafaf8651754c9a75142bfa9a4
+refs/heads/master: 4dd9ec4946b4651a295d3bc8df9c15ac692a8f4e
diff --git a/trunk/Documentation/00-INDEX b/trunk/Documentation/00-INDEX
index 5b5aba404aac..73060819ed99 100644
--- a/trunk/Documentation/00-INDEX
+++ b/trunk/Documentation/00-INDEX
@@ -251,8 +251,6 @@ mono.txt
- how to execute Mono-based .NET binaries with the help of BINFMT_MISC.
moxa-smartio
- file with info on installing/using Moxa multiport serial driver.
-mtrr.txt
- - how to use PPro Memory Type Range Registers to increase performance.
mutex-design.txt
- info on the generic mutex subsystem.
namespaces/
diff --git a/trunk/Documentation/DMA-API.txt b/trunk/Documentation/DMA-API.txt
index d8b63d164e41..b8e86460046e 100644
--- a/trunk/Documentation/DMA-API.txt
+++ b/trunk/Documentation/DMA-API.txt
@@ -337,7 +337,7 @@ With scatterlists, you use the resulting mapping like this:
int i, count = dma_map_sg(dev, sglist, nents, direction);
struct scatterlist *sg;
- for (i = 0, sg = sglist; i < count; i++, sg++) {
+ for_each_sg(sglist, sg, count, i) {
hw_address[i] = sg_dma_address(sg);
hw_len[i] = sg_dma_len(sg);
}
diff --git a/trunk/Documentation/DocBook/kernel-api.tmpl b/trunk/Documentation/DocBook/kernel-api.tmpl
index b7b1482f6e04..9d0058e788e5 100644
--- a/trunk/Documentation/DocBook/kernel-api.tmpl
+++ b/trunk/Documentation/DocBook/kernel-api.tmpl
@@ -283,6 +283,7 @@ X!Earch/x86/kernel/mca_32.c
Security Framework
!Isecurity/security.c
+!Esecurity/inode.c
@@ -364,6 +365,10 @@ X!Edrivers/pnp/system.c
!Eblock/blk-barrier.c
!Eblock/blk-tag.c
!Iblock/blk-tag.c
+!Eblock/blk-integrity.c
+!Iblock/blktrace.c
+!Iblock/genhd.c
+!Eblock/genhd.c
diff --git a/trunk/Documentation/RCU/checklist.txt b/trunk/Documentation/RCU/checklist.txt
index cf5562cbe356..6e253407b3dc 100644
--- a/trunk/Documentation/RCU/checklist.txt
+++ b/trunk/Documentation/RCU/checklist.txt
@@ -210,7 +210,7 @@ over a rather long period of time, but improvements are always welcome!
number of updates per grace period.
9. All RCU list-traversal primitives, which include
- rcu_dereference(), list_for_each_rcu(), list_for_each_entry_rcu(),
+ rcu_dereference(), list_for_each_entry_rcu(),
list_for_each_continue_rcu(), and list_for_each_safe_rcu(),
must be either within an RCU read-side critical section or
must be protected by appropriate update-side locks. RCU
diff --git a/trunk/Documentation/RCU/rcuref.txt b/trunk/Documentation/RCU/rcuref.txt
index 451de2ad8329..4202ad093130 100644
--- a/trunk/Documentation/RCU/rcuref.txt
+++ b/trunk/Documentation/RCU/rcuref.txt
@@ -29,9 +29,9 @@ release_referenced() delete()
}
If this list/array is made lock free using RCU as in changing the
-write_lock() in add() and delete() to spin_lock and changing read_lock
-in search_and_reference to rcu_read_lock(), the atomic_get in
-search_and_reference could potentially hold reference to an element which
+write_lock() in add() and delete() to spin_lock() and changing read_lock()
+in search_and_reference() to rcu_read_lock(), the atomic_inc() in
+search_and_reference() could potentially hold reference to an element which
has already been deleted from the list/array. Use atomic_inc_not_zero()
in this scenario as follows:
@@ -40,20 +40,20 @@ add() search_and_reference()
{ {
alloc_object rcu_read_lock();
... search_for_element
- atomic_set(&el->rc, 1); if (atomic_inc_not_zero(&el->rc)) {
- write_lock(&list_lock); rcu_read_unlock();
+ atomic_set(&el->rc, 1); if (!atomic_inc_not_zero(&el->rc)) {
+ spin_lock(&list_lock); rcu_read_unlock();
return FAIL;
add_element }
... ...
- write_unlock(&list_lock); rcu_read_unlock();
+ spin_unlock(&list_lock); rcu_read_unlock();
} }
3. 4.
release_referenced() delete()
{ {
- ... write_lock(&list_lock);
+ ... spin_lock(&list_lock);
if (atomic_dec_and_test(&el->rc)) ...
call_rcu(&el->head, el_free); delete_element
- ... write_unlock(&list_lock);
+ ... spin_unlock(&list_lock);
} ...
if (atomic_dec_and_test(&el->rc))
call_rcu(&el->head, el_free);
diff --git a/trunk/Documentation/RCU/whatisRCU.txt b/trunk/Documentation/RCU/whatisRCU.txt
index e04d643a9f57..96170824a717 100644
--- a/trunk/Documentation/RCU/whatisRCU.txt
+++ b/trunk/Documentation/RCU/whatisRCU.txt
@@ -786,8 +786,6 @@ RCU pointer/list traversal:
list_for_each_entry_rcu
hlist_for_each_entry_rcu
- list_for_each_rcu (to be deprecated in favor of
- list_for_each_entry_rcu)
list_for_each_continue_rcu (to be deprecated in favor of new
list_for_each_entry_continue_rcu)
diff --git a/trunk/Documentation/SELinux.txt b/trunk/Documentation/SELinux.txt
new file mode 100644
index 000000000000..07eae00f3314
--- /dev/null
+++ b/trunk/Documentation/SELinux.txt
@@ -0,0 +1,27 @@
+If you want to use SELinux, chances are you will want
+to use the distro-provided policies, or install the
+latest reference policy release from
+ http://oss.tresys.com/projects/refpolicy
+
+However, if you want to install a dummy policy for
+testing, you can do using 'mdp' provided under
+scripts/selinux. Note that this requires the selinux
+userspace to be installed - in particular you will
+need checkpolicy to compile a kernel, and setfiles and
+fixfiles to label the filesystem.
+
+ 1. Compile the kernel with selinux enabled.
+ 2. Type 'make' to compile mdp.
+ 3. Make sure that you are not running with
+ SELinux enabled and a real policy. If
+ you are, reboot with selinux disabled
+ before continuing.
+ 4. Run install_policy.sh:
+ cd scripts/selinux
+ sh install_policy.sh
+
+Step 4 will create a new dummy policy valid for your
+kernel, with a single selinux user, role, and type.
+It will compile the policy, will set your SELINUXTYPE to
+dummy in /etc/selinux/config, install the compiled policy
+as 'dummy', and relabel your filesystem.
diff --git a/trunk/Documentation/block/deadline-iosched.txt b/trunk/Documentation/block/deadline-iosched.txt
index c23cab13c3d1..72576769e0f4 100644
--- a/trunk/Documentation/block/deadline-iosched.txt
+++ b/trunk/Documentation/block/deadline-iosched.txt
@@ -30,12 +30,18 @@ write_expire (in ms)
Similar to read_expire mentioned above, but for writes.
-fifo_batch
+fifo_batch (number of requests)
----------
-When a read request expires its deadline, we must move some requests from
-the sorted io scheduler list to the block device dispatch queue. fifo_batch
-controls how many requests we move.
+Requests are grouped into ``batches'' of a particular data direction (read or
+write) which are serviced in increasing sector order. To limit extra seeking,
+deadline expiries are only checked between batches. fifo_batch controls the
+maximum number of requests per batch.
+
+This parameter tunes the balance between per-request latency and aggregate
+throughput. When low latency is the primary concern, smaller is better (where
+a value of 1 yields first-come first-served behaviour). Increasing fifo_batch
+generally improves throughput, at the cost of latency variation.
writes_starved (number of dispatches)
diff --git a/trunk/Documentation/cdrom/ide-cd b/trunk/Documentation/cdrom/ide-cd
index 91c0dcc6fa5c..2c558cd6c1ef 100644
--- a/trunk/Documentation/cdrom/ide-cd
+++ b/trunk/Documentation/cdrom/ide-cd
@@ -145,8 +145,7 @@ useful for reading photocds.
To play an audio CD, you should first unmount and remove any data
CDROM. Any of the CDROM player programs should then work (workman,
-workbone, cdplayer, etc.). Lacking anything else, you could use the
-cdtester program in Documentation/cdrom/sbpcd.
+workbone, cdplayer, etc.).
On a few drives, you can read digital audio directly using a program
such as cdda2wav. The only types of drive which I've heard support
diff --git a/trunk/Documentation/cpu-freq/index.txt b/trunk/Documentation/cpu-freq/index.txt
index ffdb5323df37..3d0b915035b9 100644
--- a/trunk/Documentation/cpu-freq/index.txt
+++ b/trunk/Documentation/cpu-freq/index.txt
@@ -35,11 +35,9 @@ Mailing List
------------
There is a CPU frequency changing CVS commit and general list where
you can report bugs, problems or submit patches. To post a message,
-send an email to cpufreq@lists.linux.org.uk, to subscribe go to
-http://lists.linux.org.uk/mailman/listinfo/cpufreq. Previous post to the
-mailing list are available to subscribers at
-http://lists.linux.org.uk/mailman/private/cpufreq/.
-
+send an email to cpufreq@vger.kernel.org, to subscribe go to
+http://vger.kernel.org/vger-lists.html#cpufreq and follow the
+instructions there.
Links
-----
@@ -50,7 +48,7 @@ how to access the CVS repository:
* http://cvs.arm.linux.org.uk/
the CPUFreq Mailing list:
-* http://lists.linux.org.uk/mailman/listinfo/cpufreq
+* http://vger.kernel.org/vger-lists.html#cpufreq
Clock and voltage scaling for the SA-1100:
* http://www.lartmaker.nl/projects/scaling
diff --git a/trunk/Documentation/hwmon/adt7473 b/trunk/Documentation/hwmon/adt7473
index 2126de34c711..1cbf671822e2 100644
--- a/trunk/Documentation/hwmon/adt7473
+++ b/trunk/Documentation/hwmon/adt7473
@@ -14,14 +14,14 @@ Description
This driver implements support for the Analog Devices ADT7473 chip family.
-The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
+The ADT7473 uses the 2-wire interface compatible with the SMBUS 2.0
specification. Using an analog to digital converter it measures three (3)
-temperatures and two (2) voltages. It has three (3) 16-bit counters for
+temperatures and two (2) voltages. It has four (4) 16-bit counters for
measuring fan speed. There are three (3) PWM outputs that can be used
to control fan speed.
A sophisticated control system for the PWM outputs is designed into the
-LM85 that allows fan speed to be adjusted automatically based on any of the
+ADT7473 that allows fan speed to be adjusted automatically based on any of the
three temperature sensors. Each PWM output is individually adjustable and
programmable. Once configured, the ADT7473 will adjust the PWM outputs in
response to the measured temperatures without further host intervention.
@@ -46,14 +46,6 @@ from the raw value to get the temperature value.
The Analog Devices datasheet is very detailed and describes a procedure for
determining an optimal configuration for the automatic PWM control.
-Hardware Configurations
------------------------
-
-The ADT7473 chips have an optional SMBALERT output that can be used to
-signal the chipset in case a limit is exceeded or the temperature sensors
-fail. Individual sensor interrupts can be masked so they won't trigger
-SMBALERT. The SMBALERT output if configured replaces the PWM2 function.
-
Configuration Notes
-------------------
@@ -61,8 +53,8 @@ Besides standard interfaces driver adds the following:
* PWM Control
-* pwm#_auto_point1_pwm and pwm#_auto_point1_temp and
-* pwm#_auto_point2_pwm and pwm#_auto_point2_temp -
+* pwm#_auto_point1_pwm and temp#_auto_point1_temp and
+* pwm#_auto_point2_pwm and temp#_auto_point2_temp -
point1: Set the pwm speed at a lower temperature bound.
point2: Set the pwm speed at a higher temperature bound.
diff --git a/trunk/Documentation/hwmon/sysfs-interface b/trunk/Documentation/hwmon/sysfs-interface
index 2d845730d4e0..6dbfd5efd991 100644
--- a/trunk/Documentation/hwmon/sysfs-interface
+++ b/trunk/Documentation/hwmon/sysfs-interface
@@ -329,6 +329,10 @@ power[1-*]_average Average power use
Unit: microWatt
RO
+power[1-*]_average_interval Power use averaging interval
+ Unit: milliseconds
+ RW
+
power[1-*]_average_highest Historical average maximum power use
Unit: microWatt
RO
@@ -353,6 +357,14 @@ power[1-*]_reset_history Reset input_highest, input_lowest,
average_highest and average_lowest.
WO
+**********
+* Energy *
+**********
+
+energy[1-*]_input Cumulative energy use
+ Unit: microJoule
+ RO
+
**********
* Alarms *
**********
diff --git a/trunk/Documentation/kernel-doc-nano-HOWTO.txt b/trunk/Documentation/kernel-doc-nano-HOWTO.txt
index 0bd32748a467..c6841eee9598 100644
--- a/trunk/Documentation/kernel-doc-nano-HOWTO.txt
+++ b/trunk/Documentation/kernel-doc-nano-HOWTO.txt
@@ -168,10 +168,10 @@ if ($#ARGV < 0) {
mkdir $ARGV[0],0777;
$state = 0;
while () {
- if (/^\.TH \"[^\"]*\" 4 \"([^\"]*)\"/) {
+ if (/^\.TH \"[^\"]*\" 9 \"([^\"]*)\"/) {
if ($state == 1) { close OUT }
$state = 1;
- $fn = "$ARGV[0]/$1.4";
+ $fn = "$ARGV[0]/$1.9";
print STDERR "Creating $fn\n";
open OUT, ">$fn" or die "can't open $fn: $!\n";
print OUT $_;
diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt
index 1150444a21ab..d0fff6302f68 100644
--- a/trunk/Documentation/kernel-parameters.txt
+++ b/trunk/Documentation/kernel-parameters.txt
@@ -463,12 +463,6 @@ and is between 256 and 4096 characters. It is defined in the file
Range: 0 - 8192
Default: 64
- disable_8254_timer
- enable_8254_timer
- [IA32/X86_64] Disable/Enable interrupt 0 timer routing
- over the 8254 in addition to over the IO-APIC. The
- kernel tries to set a sensible default.
-
hpet= [X86-32,HPET] option to control HPET usage
Format: { enable (default) | disable | force }
disable: disable HPET and use PIT instead
@@ -1020,6 +1014,10 @@ and is between 256 and 4096 characters. It is defined in the file
(only serial suported for now)
Format: [,baud]
+ kmac= [MIPS] korina ethernet MAC address.
+ Configure the RouterBoard 532 series on-chip
+ Ethernet adapter MAC address.
+
l2cr= [PPC]
l3cr= [PPC]
@@ -1882,6 +1880,12 @@ and is between 256 and 4096 characters. It is defined in the file
shapers= [NET]
Maximal number of shapers.
+ show_msr= [x86] show boot-time MSR settings
+ Format: { }
+ Show boot-time (BIOS-initialized) MSR settings.
+ The parameter means the number of CPUs to show,
+ for example 1 means boot CPU only.
+
sim710= [SCSI,HW]
See header of drivers/scsi/sim710.c.
diff --git a/trunk/Documentation/s390/CommonIO b/trunk/Documentation/s390/CommonIO
index bf0baa19ec24..339207d11d95 100644
--- a/trunk/Documentation/s390/CommonIO
+++ b/trunk/Documentation/s390/CommonIO
@@ -70,13 +70,19 @@ Command line parameters
Note: While already known devices can be added to the list of devices to be
ignored, there will be no effect on then. However, if such a device
- disappears and then reappears, it will then be ignored.
+ disappears and then reappears, it will then be ignored. To make
+ known devices go away, you need the "purge" command (see below).
For example,
"echo add 0.0.a000-0.0.accc, 0.0.af00-0.0.afff > /proc/cio_ignore"
will add 0.0.a000-0.0.accc and 0.0.af00-0.0.afff to the list of ignored
devices.
+ You can remove already known but now ignored devices via
+ "echo purge > /proc/cio_ignore"
+ All devices ignored but still registered and not online (= not in use)
+ will be deregistered and thus removed from the system.
+
The devices can be specified either by bus id (0.x.abcd) or, for 2.4 backward
compatibility, by the device number in hexadecimal (0xabcd or abcd). Device
numbers given as 0xabcd will be interpreted as 0.0.abcd.
@@ -98,8 +104,7 @@ debugfs entries
handling).
- /sys/kernel/debug/s390dbf/cio_msg/sprintf
- Various debug messages from the common I/O-layer, including messages
- printed when cio_msg=yes.
+ Various debug messages from the common I/O-layer.
- /sys/kernel/debug/s390dbf/cio_trace/hex_ascii
Logs the calling of functions in the common I/O-layer and, if applicable,
diff --git a/trunk/Documentation/scheduler/sched-design-CFS.txt b/trunk/Documentation/scheduler/sched-design-CFS.txt
index 88bcb8767335..9d8eb553884c 100644
--- a/trunk/Documentation/scheduler/sched-design-CFS.txt
+++ b/trunk/Documentation/scheduler/sched-design-CFS.txt
@@ -1,151 +1,242 @@
+ =============
+ CFS Scheduler
+ =============
-This is the CFS scheduler.
-
-80% of CFS's design can be summed up in a single sentence: CFS basically
-models an "ideal, precise multi-tasking CPU" on real hardware.
-
-"Ideal multi-tasking CPU" is a (non-existent :-)) CPU that has 100%
-physical power and which can run each task at precise equal speed, in
-parallel, each at 1/nr_running speed. For example: if there are 2 tasks
-running then it runs each at 50% physical power - totally in parallel.
-
-On real hardware, we can run only a single task at once, so while that
-one task runs, the other tasks that are waiting for the CPU are at a
-disadvantage - the current task gets an unfair amount of CPU time. In
-CFS this fairness imbalance is expressed and tracked via the per-task
-p->wait_runtime (nanosec-unit) value. "wait_runtime" is the amount of
-time the task should now run on the CPU for it to become completely fair
-and balanced.
-
-( small detail: on 'ideal' hardware, the p->wait_runtime value would
- always be zero - no task would ever get 'out of balance' from the
- 'ideal' share of CPU time. )
-
-CFS's task picking logic is based on this p->wait_runtime value and it
-is thus very simple: it always tries to run the task with the largest
-p->wait_runtime value. In other words, CFS tries to run the task with
-the 'gravest need' for more CPU time. So CFS always tries to split up
-CPU time between runnable tasks as close to 'ideal multitasking
-hardware' as possible.
-
-Most of the rest of CFS's design just falls out of this really simple
-concept, with a few add-on embellishments like nice levels,
-multiprocessing and various algorithm variants to recognize sleepers.
-
-In practice it works like this: the system runs a task a bit, and when
-the task schedules (or a scheduler tick happens) the task's CPU usage is
-'accounted for': the (small) time it just spent using the physical CPU
-is deducted from p->wait_runtime. [minus the 'fair share' it would have
-gotten anyway]. Once p->wait_runtime gets low enough so that another
-task becomes the 'leftmost task' of the time-ordered rbtree it maintains
-(plus a small amount of 'granularity' distance relative to the leftmost
-task so that we do not over-schedule tasks and trash the cache) then the
-new leftmost task is picked and the current task is preempted.
-
-The rq->fair_clock value tracks the 'CPU time a runnable task would have
-fairly gotten, had it been runnable during that time'. So by using
-rq->fair_clock values we can accurately timestamp and measure the
-'expected CPU time' a task should have gotten. All runnable tasks are
-sorted in the rbtree by the "rq->fair_clock - p->wait_runtime" key, and
-CFS picks the 'leftmost' task and sticks to it. As the system progresses
-forwards, newly woken tasks are put into the tree more and more to the
-right - slowly but surely giving a chance for every task to become the
-'leftmost task' and thus get on the CPU within a deterministic amount of
-time.
-
-Some implementation details:
-
- - the introduction of Scheduling Classes: an extensible hierarchy of
- scheduler modules. These modules encapsulate scheduling policy
- details and are handled by the scheduler core without the core
- code assuming about them too much.
-
- - sched_fair.c implements the 'CFS desktop scheduler': it is a
- replacement for the vanilla scheduler's SCHED_OTHER interactivity
- code.
-
- I'd like to give credit to Con Kolivas for the general approach here:
- he has proven via RSDL/SD that 'fair scheduling' is possible and that
- it results in better desktop scheduling. Kudos Con!
-
- The CFS patch uses a completely different approach and implementation
- from RSDL/SD. My goal was to make CFS's interactivity quality exceed
- that of RSDL/SD, which is a high standard to meet :-) Testing
- feedback is welcome to decide this one way or another. [ and, in any
- case, all of SD's logic could be added via a kernel/sched_sd.c module
- as well, if Con is interested in such an approach. ]
-
- CFS's design is quite radical: it does not use runqueues, it uses a
- time-ordered rbtree to build a 'timeline' of future task execution,
- and thus has no 'array switch' artifacts (by which both the vanilla
- scheduler and RSDL/SD are affected).
-
- CFS uses nanosecond granularity accounting and does not rely on any
- jiffies or other HZ detail. Thus the CFS scheduler has no notion of
- 'timeslices' and has no heuristics whatsoever. There is only one
- central tunable (you have to switch on CONFIG_SCHED_DEBUG):
-
- /proc/sys/kernel/sched_granularity_ns
-
- which can be used to tune the scheduler from 'desktop' (low
- latencies) to 'server' (good batching) workloads. It defaults to a
- setting suitable for desktop workloads. SCHED_BATCH is handled by the
- CFS scheduler module too.
-
- Due to its design, the CFS scheduler is not prone to any of the
- 'attacks' that exist today against the heuristics of the stock
- scheduler: fiftyp.c, thud.c, chew.c, ring-test.c, massive_intr.c all
- work fine and do not impact interactivity and produce the expected
- behavior.
-
- the CFS scheduler has a much stronger handling of nice levels and
- SCHED_BATCH: both types of workloads should be isolated much more
- agressively than under the vanilla scheduler.
-
- ( another detail: due to nanosec accounting and timeline sorting,
- sched_yield() support is very simple under CFS, and in fact under
- CFS sched_yield() behaves much better than under any other
- scheduler i have tested so far. )
-
- - sched_rt.c implements SCHED_FIFO and SCHED_RR semantics, in a simpler
- way than the vanilla scheduler does. It uses 100 runqueues (for all
- 100 RT priority levels, instead of 140 in the vanilla scheduler)
- and it needs no expired array.
-
- - reworked/sanitized SMP load-balancing: the runqueue-walking
- assumptions are gone from the load-balancing code now, and
- iterators of the scheduling modules are used. The balancing code got
- quite a bit simpler as a result.
-
-
-Group scheduler extension to CFS
-================================
-
-Normally the scheduler operates on individual tasks and strives to provide
-fair CPU time to each task. Sometimes, it may be desirable to group tasks
-and provide fair CPU time to each such task group. For example, it may
-be desirable to first provide fair CPU time to each user on the system
-and then to each task belonging to a user.
-
-CONFIG_FAIR_GROUP_SCHED strives to achieve exactly that. It lets
-SCHED_NORMAL/BATCH tasks be be grouped and divides CPU time fairly among such
-groups. At present, there are two (mutually exclusive) mechanisms to group
-tasks for CPU bandwidth control purpose:
-
- - Based on user id (CONFIG_FAIR_USER_SCHED)
- In this option, tasks are grouped according to their user id.
- - Based on "cgroup" pseudo filesystem (CONFIG_FAIR_CGROUP_SCHED)
- This options lets the administrator create arbitrary groups
- of tasks, using the "cgroup" pseudo filesystem. See
- Documentation/cgroups.txt for more information about this
- filesystem.
-Only one of these options to group tasks can be chosen and not both.
+1. OVERVIEW
+
+CFS stands for "Completely Fair Scheduler," and is the new "desktop" process
+scheduler implemented by Ingo Molnar and merged in Linux 2.6.23. It is the
+replacement for the previous vanilla scheduler's SCHED_OTHER interactivity
+code.
+
+80% of CFS's design can be summed up in a single sentence: CFS basically models
+an "ideal, precise multi-tasking CPU" on real hardware.
+
+"Ideal multi-tasking CPU" is a (non-existent :-)) CPU that has 100% physical
+power and which can run each task at precise equal speed, in parallel, each at
+1/nr_running speed. For example: if there are 2 tasks running, then it runs
+each at 50% physical power --- i.e., actually in parallel.
+
+On real hardware, we can run only a single task at once, so we have to
+introduce the concept of "virtual runtime." The virtual runtime of a task
+specifies when its next timeslice would start execution on the ideal
+multi-tasking CPU described above. In practice, the virtual runtime of a task
+is its actual runtime normalized to the total number of running tasks.
+
+
+
+2. FEW IMPLEMENTATION DETAILS
+
+In CFS the virtual runtime is expressed and tracked via the per-task
+p->se.vruntime (nanosec-unit) value. This way, it's possible to accurately
+timestamp and measure the "expected CPU time" a task should have gotten.
+
+[ small detail: on "ideal" hardware, at any time all tasks would have the same
+ p->se.vruntime value --- i.e., tasks would execute simultaneously and no task
+ would ever get "out of balance" from the "ideal" share of CPU time. ]
+
+CFS's task picking logic is based on this p->se.vruntime value and it is thus
+very simple: it always tries to run the task with the smallest p->se.vruntime
+value (i.e., the task which executed least so far). CFS always tries to split
+up CPU time between runnable tasks as close to "ideal multitasking hardware" as
+possible.
+
+Most of the rest of CFS's design just falls out of this really simple concept,
+with a few add-on embellishments like nice levels, multiprocessing and various
+algorithm variants to recognize sleepers.
+
+
+
+3. THE RBTREE
+
+CFS's design is quite radical: it does not use the old data structures for the
+runqueues, but it uses a time-ordered rbtree to build a "timeline" of future
+task execution, and thus has no "array switch" artifacts (by which both the
+previous vanilla scheduler and RSDL/SD are affected).
+
+CFS also maintains the rq->cfs.min_vruntime value, which is a monotonic
+increasing value tracking the smallest vruntime among all tasks in the
+runqueue. The total amount of work done by the system is tracked using
+min_vruntime; that value is used to place newly activated entities on the left
+side of the tree as much as possible.
+
+The total number of running tasks in the runqueue is accounted through the
+rq->cfs.load value, which is the sum of the weights of the tasks queued on the
+runqueue.
+
+CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the
+p->se.vruntime key (there is a subtraction using rq->cfs.min_vruntime to
+account for possible wraparounds). CFS picks the "leftmost" task from this
+tree and sticks to it.
+As the system progresses forwards, the executed tasks are put into the tree
+more and more to the right --- slowly but surely giving a chance for every task
+to become the "leftmost task" and thus get on the CPU within a deterministic
+amount of time.
+
+Summing up, CFS works like this: it runs a task a bit, and when the task
+schedules (or a scheduler tick happens) the task's CPU usage is "accounted
+for": the (small) time it just spent using the physical CPU is added to
+p->se.vruntime. Once p->se.vruntime gets high enough so that another task
+becomes the "leftmost task" of the time-ordered rbtree it maintains (plus a
+small amount of "granularity" distance relative to the leftmost task so that we
+do not over-schedule tasks and trash the cache), then the new leftmost task is
+picked and the current task is preempted.
+
+
+
+4. SOME FEATURES OF CFS
+
+CFS uses nanosecond granularity accounting and does not rely on any jiffies or
+other HZ detail. Thus the CFS scheduler has no notion of "timeslices" in the
+way the previous scheduler had, and has no heuristics whatsoever. There is
+only one central tunable (you have to switch on CONFIG_SCHED_DEBUG):
+
+ /proc/sys/kernel/sched_granularity_ns
+
+which can be used to tune the scheduler from "desktop" (i.e., low latencies) to
+"server" (i.e., good batching) workloads. It defaults to a setting suitable
+for desktop workloads. SCHED_BATCH is handled by the CFS scheduler module too.
+
+Due to its design, the CFS scheduler is not prone to any of the "attacks" that
+exist today against the heuristics of the stock scheduler: fiftyp.c, thud.c,
+chew.c, ring-test.c, massive_intr.c all work fine and do not impact
+interactivity and produce the expected behavior.
+
+The CFS scheduler has a much stronger handling of nice levels and SCHED_BATCH
+than the previous vanilla scheduler: both types of workloads are isolated much
+more aggressively.
+
+SMP load-balancing has been reworked/sanitized: the runqueue-walking
+assumptions are gone from the load-balancing code now, and iterators of the
+scheduling modules are used. The balancing code got quite a bit simpler as a
+result.
+
+
+
+5. Scheduling policies
+
+CFS implements three scheduling policies:
+
+ - SCHED_NORMAL (traditionally called SCHED_OTHER): The scheduling
+ policy that is used for regular tasks.
+
+ - SCHED_BATCH: Does not preempt nearly as often as regular tasks
+ would, thereby allowing tasks to run longer and make better use of
+ caches but at the cost of interactivity. This is well suited for
+ batch jobs.
+
+ - SCHED_IDLE: This is even weaker than nice 19, but its not a true
+ idle timer scheduler in order to avoid to get into priority
+ inversion problems which would deadlock the machine.
+
+SCHED_FIFO/_RR are implemented in sched_rt.c and are as specified by
+POSIX.
+
+The command chrt from util-linux-ng 2.13.1.1 can set all of these except
+SCHED_IDLE.
-Group scheduler tunables:
-When CONFIG_FAIR_USER_SCHED is defined, a directory is created in sysfs for
-each new user and a "cpu_share" file is added in that directory.
+
+6. SCHEDULING CLASSES
+
+The new CFS scheduler has been designed in such a way to introduce "Scheduling
+Classes," an extensible hierarchy of scheduler modules. These modules
+encapsulate scheduling policy details and are handled by the scheduler core
+without the core code assuming too much about them.
+
+sched_fair.c implements the CFS scheduler described above.
+
+sched_rt.c implements SCHED_FIFO and SCHED_RR semantics, in a simpler way than
+the previous vanilla scheduler did. It uses 100 runqueues (for all 100 RT
+priority levels, instead of 140 in the previous scheduler) and it needs no
+expired array.
+
+Scheduling classes are implemented through the sched_class structure, which
+contains hooks to functions that must be called whenever an interesting event
+occurs.
+
+This is the (partial) list of the hooks:
+
+ - enqueue_task(...)
+
+ Called when a task enters a runnable state.
+ It puts the scheduling entity (task) into the red-black tree and
+ increments the nr_running variable.
+
+ - dequeue_tree(...)
+
+ When a task is no longer runnable, this function is called to keep the
+ corresponding scheduling entity out of the red-black tree. It decrements
+ the nr_running variable.
+
+ - yield_task(...)
+
+ This function is basically just a dequeue followed by an enqueue, unless the
+ compat_yield sysctl is turned on; in that case, it places the scheduling
+ entity at the right-most end of the red-black tree.
+
+ - check_preempt_curr(...)
+
+ This function checks if a task that entered the runnable state should
+ preempt the currently running task.
+
+ - pick_next_task(...)
+
+ This function chooses the most appropriate task eligible to run next.
+
+ - set_curr_task(...)
+
+ This function is called when a task changes its scheduling class or changes
+ its task group.
+
+ - task_tick(...)
+
+ This function is mostly called from time tick functions; it might lead to
+ process switch. This drives the running preemption.
+
+ - task_new(...)
+
+ The core scheduler gives the scheduling module an opportunity to manage new
+ task startup. The CFS scheduling module uses it for group scheduling, while
+ the scheduling module for a real-time task does not use it.
+
+
+
+7. GROUP SCHEDULER EXTENSIONS TO CFS
+
+Normally, the scheduler operates on individual tasks and strives to provide
+fair CPU time to each task. Sometimes, it may be desirable to group tasks and
+provide fair CPU time to each such task group. For example, it may be
+desirable to first provide fair CPU time to each user on the system and then to
+each task belonging to a user.
+
+CONFIG_GROUP_SCHED strives to achieve exactly that. It lets tasks to be
+grouped and divides CPU time fairly among such groups.
+
+CONFIG_RT_GROUP_SCHED permits to group real-time (i.e., SCHED_FIFO and
+SCHED_RR) tasks.
+
+CONFIG_FAIR_GROUP_SCHED permits to group CFS (i.e., SCHED_NORMAL and
+SCHED_BATCH) tasks.
+
+At present, there are two (mutually exclusive) mechanisms to group tasks for
+CPU bandwidth control purposes:
+
+ - Based on user id (CONFIG_USER_SCHED)
+
+ With this option, tasks are grouped according to their user id.
+
+ - Based on "cgroup" pseudo filesystem (CONFIG_CGROUP_SCHED)
+
+ This options needs CONFIG_CGROUPS to be defined, and lets the administrator
+ create arbitrary groups of tasks, using the "cgroup" pseudo filesystem. See
+ Documentation/cgroups.txt for more information about this filesystem.
+
+Only one of these options to group tasks can be chosen and not both.
+
+When CONFIG_USER_SCHED is defined, a directory is created in sysfs for each new
+user and a "cpu_share" file is added in that directory.
# cd /sys/kernel/uids
# cat 512/cpu_share # Display user 512's CPU share
@@ -155,16 +246,14 @@ each new user and a "cpu_share" file is added in that directory.
2048
#
-CPU bandwidth between two users are divided in the ratio of their CPU shares.
-For ex: if you would like user "root" to get twice the bandwidth of user
-"guest", then set the cpu_share for both the users such that "root"'s
-cpu_share is twice "guest"'s cpu_share
-
+CPU bandwidth between two users is divided in the ratio of their CPU shares.
+For example: if you would like user "root" to get twice the bandwidth of user
+"guest," then set the cpu_share for both the users such that "root"'s cpu_share
+is twice "guest"'s cpu_share.
-When CONFIG_FAIR_CGROUP_SCHED is defined, a "cpu.shares" file is created
-for each group created using the pseudo filesystem. See example steps
-below to create task groups and modify their CPU share using the "cgroups"
-pseudo filesystem
+When CONFIG_CGROUP_SCHED is defined, a "cpu.shares" file is created for each
+group created using the pseudo filesystem. See example steps below to create
+task groups and modify their CPU share using the "cgroups" pseudo filesystem.
# mkdir /dev/cpuctl
# mount -t cgroup -ocpu none /dev/cpuctl
diff --git a/trunk/Documentation/scsi/scsi_fc_transport.txt b/trunk/Documentation/scsi/scsi_fc_transport.txt
index 75143f0c23b6..38d324d62b25 100644
--- a/trunk/Documentation/scsi/scsi_fc_transport.txt
+++ b/trunk/Documentation/scsi/scsi_fc_transport.txt
@@ -436,6 +436,42 @@ Other:
was updated to remove all vports for the fc_host as well.
+Transport supplied functions
+----------------------------
+
+The following functions are supplied by the FC-transport for use by LLDs.
+
+ fc_vport_create - create a vport
+ fc_vport_terminate - detach and remove a vport
+
+Details:
+
+/**
+ * fc_vport_create - Admin App or LLDD requests creation of a vport
+ * @shost: scsi host the virtual port is connected to.
+ * @ids: The world wide names, FC4 port roles, etc for
+ * the virtual port.
+ *
+ * Notes:
+ * This routine assumes no locks are held on entry.
+ */
+struct fc_vport *
+fc_vport_create(struct Scsi_Host *shost, struct fc_vport_identifiers *ids)
+
+/**
+ * fc_vport_terminate - Admin App or LLDD requests termination of a vport
+ * @vport: fc_vport to be terminated
+ *
+ * Calls the LLDD vport_delete() function, then deallocates and removes
+ * the vport from the shost and object tree.
+ *
+ * Notes:
+ * This routine assumes no locks are held on entry.
+ */
+int
+fc_vport_terminate(struct fc_vport *vport)
+
+
Credits
=======
The following people have contributed to this document:
diff --git a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
index b117e42a6166..e0e54a27fc10 100644
--- a/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
+++ b/trunk/Documentation/sound/alsa/ALSA-Configuration.txt
@@ -746,8 +746,10 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
Module snd-hda-intel
--------------------
- Module for Intel HD Audio (ICH6, ICH6M, ESB2, ICH7, ICH8),
- ATI SB450, SB600, RS600,
+ Module for Intel HD Audio (ICH6, ICH6M, ESB2, ICH7, ICH8, ICH9, ICH10,
+ PCH, SCH),
+ ATI SB450, SB600, R600, RS600, RS690, RS780, RV610, RV620,
+ RV630, RV635, RV670, RV770,
VIA VT8251/VT8237A,
SIS966, ULI M5461
@@ -807,6 +809,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
ALC260
hp HP machines
hp-3013 HP machines (3013-variant)
+ hp-dc7600 HP DC7600
fujitsu Fujitsu S7020
acer Acer TravelMate
will Will laptops (PB V7900)
@@ -828,8 +831,11 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
hippo Hippo (ATI) with jack detection, Sony UX-90s
hippo_1 Hippo (Benq) with jack detection
sony-assamd Sony ASSAMD
+ toshiba-s06 Toshiba S06
+ toshiba-rx1 Toshiba RX1
ultra Samsung Q1 Ultra Vista model
lenovo-3000 Lenovo 3000 y410
+ nec NEC Versa S9100
basic fixed pin assignment w/o SPDIF
auto auto-config reading BIOS (default)
@@ -838,6 +844,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
3stack 3-stack model
toshiba Toshiba A205
acer Acer laptops
+ acer-aspire Acer Aspire One
dell Dell OEM laptops (Vostro 1200)
zepto Zepto laptops
test for testing/debugging purpose, almost all controls can
@@ -847,6 +854,9 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
ALC269
basic Basic preset
+ quanta Quanta FL1
+ eeepc-p703 ASUS Eeepc P703 P900A
+ eeepc-p901 ASUS Eeepc P901 S101
ALC662/663
3stack-dig 3-stack (2-channel) with SPDIF
@@ -856,10 +866,17 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
lenovo-101e Lenovo laptop
eeepc-p701 ASUS Eeepc P701
eeepc-ep20 ASUS Eeepc EP20
+ ecs ECS/Foxconn mobo
m51va ASUS M51VA
g71v ASUS G71V
h13 ASUS H13
g50v ASUS G50V
+ asus-mode1 ASUS
+ asus-mode2 ASUS
+ asus-mode3 ASUS
+ asus-mode4 ASUS
+ asus-mode5 ASUS
+ asus-mode6 ASUS
auto auto-config reading BIOS (default)
ALC882/885
@@ -891,12 +908,14 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
lenovo-101e Lenovo 101E
lenovo-nb0763 Lenovo NB0763
lenovo-ms7195-dig Lenovo MS7195
+ lenovo-sky Lenovo Sky
haier-w66 Haier W66
3stack-hp HP machines with 3stack (Lucknow, Samba boards)
6stack-dell Dell machines with 6stack (Inspiron 530)
mitac Mitac 8252D
clevo-m720 Clevo M720 laptop series
fujitsu-pi2515 Fujitsu AMILO Pi2515
+ 3stack-6ch-intel Intel DG33* boards
auto auto-config reading BIOS (default)
ALC861/660
@@ -929,7 +948,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
allout 5-jack in back, 2-jack in front, SPDIF out
auto auto-config reading BIOS (default)
- AD1882
+ AD1882 / AD1882A
3stack 3-stack mode (default)
6stack 6-stack mode
@@ -1079,7 +1098,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
register value without FIFO size correction as the current
DMA pointer. position_fix=2 will make the driver to use
the position buffer instead of reading SD_LPIB register.
- (Usually SD_LPLIB register is more accurate than the
+ (Usually SD_LPIB register is more accurate than the
position buffer.)
NB: If you get many "azx_get_response timeout" messages at
@@ -1166,6 +1185,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
* Event Electronics, EZ8
* Digigram VX442
* Lionstracs, Mediastaton
+ * Terrasoniq TS 88
model - Use the given board model, one of the following:
delta1010, dio2496, delta66, delta44, audiophile, delta410,
@@ -1200,7 +1220,10 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
* TerraTec Phase 22
* TerraTec Phase 28
* AudioTrak Prodigy 7.1
- * AudioTrak Prodigy 7.1LT
+ * AudioTrak Prodigy 7.1 LT
+ * AudioTrak Prodigy 7.1 XT
+ * AudioTrak Prodigy 7.1 HIFI
+ * AudioTrak Prodigy 7.1 HD2
* AudioTrak Prodigy 192
* Pontis MS300
* Albatron K8X800 Pro II
@@ -1211,12 +1234,16 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
* Shuttle SN25P
* Onkyo SE-90PCI
* Onkyo SE-200PCI
+ * ESI Juli@
+ * Hercules Fortissimo IV
+ * EGO-SYS WaveTerminal 192M
model - Use the given board model, one of the following:
revo51, revo71, amp2000, prodigy71, prodigy71lt,
- prodigy192, aureon51, aureon71, universe, ap192,
- k8x800, phase22, phase28, ms300, av710, se200pci,
- se90pci
+ prodigy71xt, prodigy71hifi, prodigyhd2, prodigy192,
+ juli, aureon51, aureon71, universe, ap192, k8x800,
+ phase22, phase28, ms300, av710, se200pci, se90pci,
+ fortissimo4, sn25p, WT192M
This module supports multiple cards and autoprobe.
@@ -1255,7 +1282,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
Module for AC'97 motherboards from Intel and compatibles.
* Intel i810/810E, i815, i820, i830, i84x, MX440
- ICH5, ICH6, ICH7, ESB2
+ ICH5, ICH6, ICH7, 6300ESB, ESB2
* SiS 7012 (SiS 735)
* NVidia NForce, NForce2, NForce3, MCP04, CK804
CK8, CK8S, MCP501
@@ -1951,6 +1978,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
* CHIC True Sound 4Dwave
* Shark Predator4D-PCI
* Jaton SonicWave 4D
+ * SiS SI7018 PCI Audio
+ * Hoontech SoundTrack Digital 4DWave NX
pcm_channels - max channels (voices) reserved for PCM
wavetable_size - max wavetable size in kB (4-?kb)
@@ -1966,12 +1995,25 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
vid - Vendor ID for the device (optional)
pid - Product ID for the device (optional)
+ nrpacks - Max. number of packets per URB (default: 8)
+ async_unlink - Use async unlink mode (default: yes)
device_setup - Device specific magic number (optional)
- Influence depends on the device
- Default: 0x0000
+ ignore_ctl_error - Ignore any USB-controller regarding mixer
+ interface (default: no)
This module supports multiple devices, autoprobe and hotplugging.
+ NB: nrpacks parameter can be modified dynamically via sysfs.
+ Don't put the value over 20. Changing via sysfs has no sanity
+ check.
+ NB: async_unlink=0 would cause Oops. It remains just for
+ debugging purpose (if any).
+ NB: ignore_ctl_error=1 may help when you get an error at accessing
+ the mixer element such as URB error -22. This happens on some
+ buggy USB device or the controller.
+
Module snd-usb-caiaq
--------------------
@@ -2078,7 +2120,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
-------------------
Module for sound cards based on the Asus AV100/AV200 chips,
- i.e., Xonar D1, DX, D2 and D2X.
+ i.e., Xonar D1, DX, D2, D2X and HDAV1.3 (Deluxe).
This module supports autoprobe and multiple cards.
diff --git a/trunk/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl b/trunk/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
index e13c4e67029f..b54cb5048dfa 100644
--- a/trunk/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
+++ b/trunk/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl
@@ -6135,44 +6135,58 @@ struct _snd_pcm_runtime {
-
- <function>snd_assert()</function>
+
+ <function>snd_BUG()</function>
- snd_assert() macro is similar with the
- normal assert() macro. For example,
+ It shows the BUG? message and
+ stack trace as well as snd_BUG_ON at the point.
+ It's useful to show that a fatal error happens there.
+
+
+ When no debug flag is set, this macro is ignored.
+
+
+
+
+ <function>snd_BUG_ON()</function>
+
+ snd_BUG_ON() macro is similar with
+ WARN_ON() macro. For example,
-
-
- The first argument is the expression to evaluate, and the
- second argument is the action if it fails. When
- CONFIG_SND_DEBUG, is set, it will show an
- error message such as BUG? (xxx)
- together with stack trace.
-
-
- When no debug flag is set, this macro is ignored.
-
-
+ or it can be used as the condition,
+
+
+
+
+
-
- <function>snd_BUG()</function>
-
- It shows the BUG? message and
- stack trace as well as snd_assert at the point.
- It's useful to show that a fatal error happens there.
+
- When no debug flag is set, this macro is ignored.
+ The macro takes an conditional expression to evaluate.
+ When CONFIG_SND_DEBUG, is set, the
+ expression is actually evaluated. If it's non-zero, it shows
+ the warning message such as
+ BUG? (xxx)
+ normally followed by stack trace. It returns the evaluated
+ value.
+ When no CONFIG_SND_DEBUG is set, this
+ macro always returns zero.
+
+
diff --git a/trunk/Documentation/x86/00-INDEX b/trunk/Documentation/x86/00-INDEX
new file mode 100644
index 000000000000..dbe3377754af
--- /dev/null
+++ b/trunk/Documentation/x86/00-INDEX
@@ -0,0 +1,4 @@
+00-INDEX
+ - this file
+mtrr.txt
+ - how to use x86 Memory Type Range Registers to increase performance
diff --git a/trunk/Documentation/x86/i386/boot.txt b/trunk/Documentation/x86/boot.txt
similarity index 99%
rename from trunk/Documentation/x86/i386/boot.txt
rename to trunk/Documentation/x86/boot.txt
index 147bfe511cdd..83c0033ee9e0 100644
--- a/trunk/Documentation/x86/i386/boot.txt
+++ b/trunk/Documentation/x86/boot.txt
@@ -308,7 +308,7 @@ Protocol: 2.00+
Field name: start_sys
Type: read
-Offset/size: 0x20c/4
+Offset/size: 0x20c/2
Protocol: 2.00+
The load low segment (0x1000). Obsolete.
diff --git a/trunk/Documentation/mtrr.txt b/trunk/Documentation/x86/mtrr.txt
similarity index 99%
rename from trunk/Documentation/mtrr.txt
rename to trunk/Documentation/x86/mtrr.txt
index c39ac395970e..cc071dc333c2 100644
--- a/trunk/Documentation/mtrr.txt
+++ b/trunk/Documentation/x86/mtrr.txt
@@ -18,7 +18,7 @@ Richard Gooch
The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
MTRRs. These are supported. The AMD Athlon family provide 8 Intel
style MTRRs.
-
+
The Centaur C6 (WinChip) has 8 MCRs, allowing write-combining. These
are supported.
@@ -87,7 +87,7 @@ reg00: base=0x00000000 ( 0MB), size= 64MB: write-back, count=1
reg01: base=0xfb000000 (4016MB), size= 16MB: write-combining, count=1
reg02: base=0xfb000000 (4016MB), size= 4kB: uncachable, count=1
-Some cards (especially Voodoo Graphics boards) need this 4 kB area
+Some cards (especially Voodoo Graphics boards) need this 4 kB area
excluded from the beginning of the region because it is used for
registers.
diff --git a/trunk/Documentation/x86/pat.txt b/trunk/Documentation/x86/pat.txt
index 17965f927c15..c93ff5f4c0dd 100644
--- a/trunk/Documentation/x86/pat.txt
+++ b/trunk/Documentation/x86/pat.txt
@@ -14,6 +14,10 @@ PAT allows for different types of memory attributes. The most commonly used
ones that will be supported at this time are Write-back, Uncached,
Write-combined and Uncached Minus.
+
+PAT APIs
+--------
+
There are many different APIs in the kernel that allows setting of memory
attributes at the page level. In order to avoid aliasing, these interfaces
should be used thoughtfully. Below is a table of interfaces available,
@@ -26,38 +30,38 @@ address range to avoid any aliasing.
API | RAM | ACPI,... | Reserved/Holes |
-----------------------|----------|------------|------------------|
| | | |
-ioremap | -- | UC | UC |
+ioremap | -- | UC- | UC- |
| | | |
ioremap_cache | -- | WB | WB |
| | | |
-ioremap_nocache | -- | UC | UC |
+ioremap_nocache | -- | UC- | UC- |
| | | |
ioremap_wc | -- | -- | WC |
| | | |
-set_memory_uc | UC | -- | -- |
+set_memory_uc | UC- | -- | -- |
set_memory_wb | | | |
| | | |
set_memory_wc | WC | -- | -- |
set_memory_wb | | | |
| | | |
-pci sysfs resource | -- | -- | UC |
+pci sysfs resource | -- | -- | UC- |
| | | |
pci sysfs resource_wc | -- | -- | WC |
is IORESOURCE_PREFETCH| | | |
| | | |
-pci proc | -- | -- | UC |
+pci proc | -- | -- | UC- |
!PCIIOC_WRITE_COMBINE | | | |
| | | |
pci proc | -- | -- | WC |
PCIIOC_WRITE_COMBINE | | | |
| | | |
-/dev/mem | -- | UC | UC |
+/dev/mem | -- | WB/WC/UC- | WB/WC/UC- |
read-write | | | |
| | | |
-/dev/mem | -- | UC | UC |
+/dev/mem | -- | UC- | UC- |
mmap SYNC flag | | | |
| | | |
-/dev/mem | -- | WB/WC/UC | WB/WC/UC |
+/dev/mem | -- | WB/WC/UC- | WB/WC/UC- |
mmap !SYNC flag | |(from exist-| (from exist- |
and | | ing alias)| ing alias) |
any alias to this area| | | |
@@ -68,7 +72,7 @@ pci proc | -- | -- | WC |
and | | | |
MTRR says WB | | | |
| | | |
-/dev/mem | -- | -- | UC_MINUS |
+/dev/mem | -- | -- | UC- |
mmap !SYNC flag | | | |
no alias to this area | | | |
and | | | |
@@ -98,3 +102,35 @@ types.
Drivers should use set_memory_[uc|wc] to set access type for RAM ranges.
+
+PAT debugging
+-------------
+
+With CONFIG_DEBUG_FS enabled, PAT memtype list can be examined by
+
+# mount -t debugfs debugfs /sys/kernel/debug
+# cat /sys/kernel/debug/x86/pat_memtype_list
+PAT memtype list:
+uncached-minus @ 0x7fadf000-0x7fae0000
+uncached-minus @ 0x7fb19000-0x7fb1a000
+uncached-minus @ 0x7fb1a000-0x7fb1b000
+uncached-minus @ 0x7fb1b000-0x7fb1c000
+uncached-minus @ 0x7fb1c000-0x7fb1d000
+uncached-minus @ 0x7fb1d000-0x7fb1e000
+uncached-minus @ 0x7fb1e000-0x7fb25000
+uncached-minus @ 0x7fb25000-0x7fb26000
+uncached-minus @ 0x7fb26000-0x7fb27000
+uncached-minus @ 0x7fb27000-0x7fb28000
+uncached-minus @ 0x7fb28000-0x7fb2e000
+uncached-minus @ 0x7fb2e000-0x7fb2f000
+uncached-minus @ 0x7fb2f000-0x7fb30000
+uncached-minus @ 0x7fb31000-0x7fb32000
+uncached-minus @ 0x80000000-0x90000000
+
+This list shows physical address ranges and various PAT settings used to
+access those physical address ranges.
+
+Another, more verbose way of getting PAT related debug messages is with
+"debugpat" boot parameter. With this parameter, various debug messages are
+printed to dmesg log.
+
diff --git a/trunk/Documentation/x86/i386/usb-legacy-support.txt b/trunk/Documentation/x86/usb-legacy-support.txt
similarity index 100%
rename from trunk/Documentation/x86/i386/usb-legacy-support.txt
rename to trunk/Documentation/x86/usb-legacy-support.txt
diff --git a/trunk/Documentation/x86/x86_64/boot-options.txt b/trunk/Documentation/x86/x86_64/boot-options.txt
index b0c7b6c4abda..72ffb5373ec7 100644
--- a/trunk/Documentation/x86/x86_64/boot-options.txt
+++ b/trunk/Documentation/x86/x86_64/boot-options.txt
@@ -54,10 +54,6 @@ APICs
apicmaintimer. Useful when your PIT timer is totally
broken.
- disable_8254_timer / enable_8254_timer
- Enable interrupt 0 timer routing over the 8254 in addition to over
- the IO-APIC. The kernel tries to set a sensible default.
-
Early Console
syntax: earlyprintk=vga
diff --git a/trunk/Documentation/x86/i386/zero-page.txt b/trunk/Documentation/x86/zero-page.txt
similarity index 100%
rename from trunk/Documentation/x86/i386/zero-page.txt
rename to trunk/Documentation/x86/zero-page.txt
diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS
index 0e2f1e18be87..46d94ff340c6 100644
--- a/trunk/MAINTAINERS
+++ b/trunk/MAINTAINERS
@@ -3669,8 +3669,9 @@ M: jmorris@namei.org
P: Eric Paris
M: eparis@parisplace.org
L: linux-kernel@vger.kernel.org (kernel issues)
-L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
-W: http://www.nsa.gov/selinux
+L: selinux@tycho.nsa.gov (subscribers-only, general discussion)
+W: http://selinuxproject.org
+T: git kernel.org:pub/scm/linux/kernel/git/jmorris/security-testing-2.6.git
S: Supported
SENSABLE PHANTOM
@@ -3847,6 +3848,8 @@ S: Maintained
SOUND
P: Jaroslav Kysela
M: perex@perex.cz
+P: Takashi Iwai
+M: tiwai@suse.de
L: alsa-devel@alsa-project.org (subscribers-only)
S: Maintained
diff --git a/trunk/Makefile b/trunk/Makefile
index ce9eceb2538e..16e3fbb968a8 100644
--- a/trunk/Makefile
+++ b/trunk/Makefile
@@ -1,7 +1,7 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 27
-EXTRAVERSION = -rc9
+EXTRAVERSION =
NAME = Rotary Wombat
# *DOCUMENTATION*
diff --git a/trunk/arch/alpha/kernel/smp.c b/trunk/arch/alpha/kernel/smp.c
index 83df541650fc..06b6fdab639f 100644
--- a/trunk/arch/alpha/kernel/smp.c
+++ b/trunk/arch/alpha/kernel/smp.c
@@ -149,6 +149,9 @@ smp_callin(void)
atomic_inc(&init_mm.mm_count);
current->active_mm = &init_mm;
+ /* inform the notifiers about the new cpu */
+ notify_cpu_starting(cpuid);
+
/* Must have completely accurate bogos. */
local_irq_enable();
diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c
index e9842f6767f9..e42a749a56dd 100644
--- a/trunk/arch/arm/kernel/smp.c
+++ b/trunk/arch/arm/kernel/smp.c
@@ -277,6 +277,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
/*
* Enable local interrupts.
*/
+ notify_cpu_starting(cpu);
local_irq_enable();
local_fiq_enable();
diff --git a/trunk/arch/arm/plat-omap/include/mach/mtd-xip.h b/trunk/arch/arm/plat-omap/include/mach/mtd-xip.h
index 5cee7e16a1b4..39b591ff54bb 100644
--- a/trunk/arch/arm/plat-omap/include/mach/mtd-xip.h
+++ b/trunk/arch/arm/plat-omap/include/mach/mtd-xip.h
@@ -3,7 +3,7 @@
*
* Do not include this file directly. It's included from linux/mtd/xip.h
*
- * Author: Vladimir Barinov
+ * Author: Vladimir Barinov
*
* (c) 2005 MontaVista Software, Inc. This file is licensed under the
* terms of the GNU General Public License version 2. This program is
diff --git a/trunk/arch/cris/arch-v32/kernel/smp.c b/trunk/arch/cris/arch-v32/kernel/smp.c
index 952a24b2f5a9..52e16c6436f9 100644
--- a/trunk/arch/cris/arch-v32/kernel/smp.c
+++ b/trunk/arch/cris/arch-v32/kernel/smp.c
@@ -178,6 +178,7 @@ void __init smp_callin(void)
unmask_irq(IPI_INTR_VECT);
unmask_irq(TIMER0_INTR_VECT);
preempt_disable();
+ notify_cpu_starting(cpu);
local_irq_enable();
cpu_set(cpu, cpu_online_map);
diff --git a/trunk/arch/ia64/kernel/smpboot.c b/trunk/arch/ia64/kernel/smpboot.c
index d8f05e504fbf..1dcbb85fc4ee 100644
--- a/trunk/arch/ia64/kernel/smpboot.c
+++ b/trunk/arch/ia64/kernel/smpboot.c
@@ -401,6 +401,7 @@ smp_callin (void)
spin_lock(&vector_lock);
/* Setup the per cpu irq handling data structures */
__setup_vector_irq(cpuid);
+ notify_cpu_starting(cpuid);
cpu_set(cpuid, cpu_online_map);
per_cpu(cpu_state, cpuid) = CPU_ONLINE;
spin_unlock(&vector_lock);
diff --git a/trunk/arch/m32r/kernel/smpboot.c b/trunk/arch/m32r/kernel/smpboot.c
index 2c03ac1d005f..fc2994811f15 100644
--- a/trunk/arch/m32r/kernel/smpboot.c
+++ b/trunk/arch/m32r/kernel/smpboot.c
@@ -498,6 +498,8 @@ static void __init smp_online(void)
{
int cpu_id = smp_processor_id();
+ notify_cpu_starting(cpu_id);
+
local_irq_enable();
/* Get our bogomips. */
diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig
index 1e06d233fa83..cd5fbf6f0784 100644
--- a/trunk/arch/mips/Kconfig
+++ b/trunk/arch/mips/Kconfig
@@ -568,7 +568,7 @@ config MIKROTIK_RB532
select SYS_SUPPORTS_LITTLE_ENDIAN
select SWAP_IO_SPACE
select BOOT_RAW
- select GENERIC_GPIO
+ select ARCH_REQUIRE_GPIOLIB
help
Support the Mikrotik(tm) RouterBoard 532 series,
based on the IDT RC32434 SoC.
@@ -598,7 +598,7 @@ config WR_PPMC
endchoice
-source "arch/mips/au1000/Kconfig"
+source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
@@ -610,11 +610,6 @@ source "arch/mips/vr41xx/Kconfig"
endmenu
-config GENERIC_LOCKBREAK
- bool
- default y
- depends on SMP && PREEMPT
-
config RWSEM_GENERIC_SPINLOCK
bool
default y
@@ -1273,6 +1268,13 @@ config CPU_SUPPORTS_32BIT_KERNEL
config CPU_SUPPORTS_64BIT_KERNEL
bool
+#
+# Set to y for ptrace access to watch registers.
+#
+config HARDWARE_WATCHPOINTS
+ bool
+ default y if CPU_MIPS32 || CPU_MIPS64
+
menu "Kernel type"
choice
diff --git a/trunk/arch/mips/Makefile b/trunk/arch/mips/Makefile
index 9aab51caf16a..7f39fd8a91fe 100644
--- a/trunk/arch/mips/Makefile
+++ b/trunk/arch/mips/Makefile
@@ -170,123 +170,123 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
-cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
+cflags-$(CONFIG_MACH_JAZZ) += -I$(srctree)/arch/mips/include/asm/mach-jazz
load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
#
# Common Alchemy Au1x00 stuff
#
-core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
-cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
+core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/
+cflags-$(CONFIG_SOC_AU1X00) += -I$(srctree)/arch/mips/include/asm/mach-au1x00
#
# AMD Alchemy Pb1000 eval board
#
-libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
-cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
+libs-$(CONFIG_MIPS_PB1000) += arch/mips/alchemy/pb1000/
+cflags-$(CONFIG_MIPS_PB1000) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
#
# AMD Alchemy Pb1100 eval board
#
-libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
-cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
+libs-$(CONFIG_MIPS_PB1100) += arch/mips/alchemy/pb1100/
+cflags-$(CONFIG_MIPS_PB1100) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
#
# AMD Alchemy Pb1500 eval board
#
-libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
-cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
+libs-$(CONFIG_MIPS_PB1500) += arch/mips/alchemy/pb1500/
+cflags-$(CONFIG_MIPS_PB1500) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
#
# AMD Alchemy Pb1550 eval board
#
-libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
-cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
+libs-$(CONFIG_MIPS_PB1550) += arch/mips/alchemy/pb1550/
+cflags-$(CONFIG_MIPS_PB1550) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
#
# AMD Alchemy Pb1200 eval board
#
-libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
-cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
+libs-$(CONFIG_MIPS_PB1200) += arch/mips/alchemy/pb1200/
+cflags-$(CONFIG_MIPS_PB1200) += -I$(srctree)/arch/mips/include/asm/mach-pb1x00
load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
#
# AMD Alchemy Db1000 eval board
#
-libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_DB1000) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_DB1000) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
#
# AMD Alchemy Db1100 eval board
#
-libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_DB1100) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_DB1100) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
#
# AMD Alchemy Db1500 eval board
#
-libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_DB1500) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_DB1500) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
#
# AMD Alchemy Db1550 eval board
#
-libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_DB1550) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_DB1550) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
#
# AMD Alchemy Db1200 eval board
#
-libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
-cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_DB1200) += arch/mips/alchemy/pb1200/
+cflags-$(CONFIG_MIPS_DB1200) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
#
# AMD Alchemy Bosporus eval board
#
-libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_BOSPORUS) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
#
# AMD Alchemy Mirage eval board
#
-libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
-cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
+libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/alchemy/db1x00/
+cflags-$(CONFIG_MIPS_MIRAGE) += -I$(srctree)/arch/mips/include/asm/mach-db1x00
load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
#
# 4G-Systems eval board
#
-libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
+libs-$(CONFIG_MIPS_MTX1) += arch/mips/alchemy/mtx-1/
load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
#
# MyCable eval board
#
-libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
+libs-$(CONFIG_MIPS_XXS1500) += arch/mips/alchemy/xxs1500/
load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
#
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
-cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
+cflags-$(CONFIG_MIPS_COBALT) += -I$(srctree)/arch/mips/include/asm/mach-cobalt
load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
#
# DECstation family
#
core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
-cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
+cflags-$(CONFIG_MACH_DECSTATION)+= -I$(srctree)/arch/mips/include/asm/mach-dec
libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
@@ -294,7 +294,7 @@ load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
# Wind River PPMC Board (4KC + GT64120)
#
core-$(CONFIG_WR_PPMC) += arch/mips/gt64120/wrppmc/
-cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
+cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc
load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
#
@@ -302,13 +302,13 @@ load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
#
core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/
load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000
-cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
+cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote
#
# MIPS Malta board
#
core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
-cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta
+cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
@@ -316,14 +316,14 @@ all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
# MIPS SIM
#
core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
-cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-mipssim
+cflags-$(CONFIG_MIPS_SIM) += -I$(srctree)/arch/mips/include/asm/mach-mipssim
load-$(CONFIG_MIPS_SIM) += 0x80100000
#
# PMC-Sierra MSP SOCs
#
core-$(CONFIG_PMC_MSP) += arch/mips/pmc-sierra/msp71xx/
-cflags-$(CONFIG_PMC_MSP) += -Iinclude/asm-mips/pmc-sierra/msp71xx \
+cflags-$(CONFIG_PMC_MSP) += -I$(srctree)/arch/mips/include/asm/pmc-sierra/msp71xx \
-mno-branch-likely
load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
@@ -331,28 +331,28 @@ load-$(CONFIG_PMC_MSP) += 0xffffffff80100000
# PMC-Sierra Yosemite
#
core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
-cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
+cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
#
# Basler eXcite
#
core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
-cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
+cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000
#
# LASAT platforms
#
core-$(CONFIG_LASAT) += arch/mips/lasat/
-cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
+cflags-$(CONFIG_LASAT) += -I$(srctree)/arch/mips/include/asm/mach-lasat
load-$(CONFIG_LASAT) += 0xffffffff80000000
#
# Common VR41xx
#
core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
-cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
+cflags-$(CONFIG_MACH_VR41XX) += -I$(srctree)/arch/mips/include/asm/mach-vr41xx
#
# ZAO Networks Capcella (VR4131)
@@ -385,13 +385,13 @@ load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
# Common NXP PNX8550
#
core-$(CONFIG_SOC_PNX8550) += arch/mips/nxp/pnx8550/common/
-cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
+cflags-$(CONFIG_SOC_PNX8550) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
#
# NXP PNX8550 JBS board
#
libs-$(CONFIG_PNX8550_JBS) += arch/mips/nxp/pnx8550/jbs/
-#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
+#cflags-$(CONFIG_PNX8550_JBS) += -I$(srctree)/arch/mips/include/asm/mach-pnx8550
load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
# NXP PNX8550 STB810 board
@@ -402,7 +402,7 @@ load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
# NEC EMMA2RH boards
#
core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
-cflags-$(CONFIG_EMMA2RH) += -Iinclude/asm-mips/mach-emma2rh
+cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
# NEC EMMA2RH Mark-eins
core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
@@ -418,7 +418,7 @@ load-$(CONFIG_MARKEINS) += 0xffffffff88100000
# address by 8kb.
#
core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
-cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
+cflags-$(CONFIG_SGI_IP22) += -I$(srctree)/arch/mips/include/asm/mach-ip22
ifdef CONFIG_32BIT
load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
endif
@@ -435,7 +435,7 @@ endif
#
ifdef CONFIG_SGI_IP27
core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
-cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
+cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
ifdef CONFIG_MAPPED_KERNEL
load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
@@ -460,7 +460,7 @@ ifdef CONFIG_SGI_IP28
endif
endif
core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/
-cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -Iinclude/asm-mips/mach-ip28
+cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28
load-$(CONFIG_SGI_IP28) += 0xa800000020004000
#
@@ -472,7 +472,7 @@ load-$(CONFIG_SGI_IP28) += 0xa800000020004000
# will break.
#
core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
-cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
+cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
#
@@ -484,22 +484,22 @@ load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
#
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
-cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
+cflags-$(CONFIG_SIBYTE_BCM112X) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
-cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
+cflags-$(CONFIG_SIBYTE_SB1250) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
-cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
+cflags-$(CONFIG_SIBYTE_BCM1x55) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
-cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
+cflags-$(CONFIG_SIBYTE_BCM1x80) += -I$(srctree)/arch/mips/include/asm/mach-sibyte \
-DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
#
@@ -529,14 +529,14 @@ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
# Broadcom BCM47XX boards
#
core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
-cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
+cflags-$(CONFIG_BCM47XX) += -I$(srctree)/arch/mips/include/asm/mach-bcm47xx
load-$(CONFIG_BCM47XX) := 0xffffffff80001000
#
# SNI RM
#
core-$(CONFIG_SNI_RM) += arch/mips/sni/
-cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm
+cflags-$(CONFIG_SNI_RM) += -I$(srctree)/arch/mips/include/asm/mach-rm
ifdef CONFIG_CPU_LITTLE_ENDIAN
load-$(CONFIG_SNI_RM) += 0xffffffff80600000
else
@@ -548,10 +548,10 @@ all-$(CONFIG_SNI_RM) := vmlinux.ecoff
# Common TXx9
#
core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
-cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx
+cflags-$(CONFIG_MACH_TX39XX) += -I$(srctree)/arch/mips/include/asm/mach-tx39xx
load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
-cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx
+cflags-$(CONFIG_MACH_TX49XX) += -I$(srctree)/arch/mips/include/asm/mach-tx49xx
load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
#
@@ -563,21 +563,17 @@ core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
# Routerboard 532 board
#
core-$(CONFIG_MIKROTIK_RB532) += arch/mips/rb532/
-cflags-$(CONFIG_MIKROTIK_RB532) += -Iinclude/asm-mips/mach-rc32434
+cflags-$(CONFIG_MIKROTIK_RB532) += -I$(srctree)/arch/mips/include/asm/mach-rc32434
load-$(CONFIG_MIKROTIK_RB532) += 0xffffffff80101000
#
-# Toshiba RBTX4927 board or
-# Toshiba RBTX4937 board
+# Toshiba RBTX49XX boards
#
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
-
-#
-# Toshiba RBTX4938 board
-#
core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
+core-$(CONFIG_TOSHIBA_RBTX4939) += arch/mips/txx9/rbtx4939/
-cflags-y += -Iinclude/asm-mips/mach-generic
+cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
ifdef CONFIG_32BIT
diff --git a/trunk/arch/mips/au1000/Kconfig b/trunk/arch/mips/alchemy/Kconfig
similarity index 100%
rename from trunk/arch/mips/au1000/Kconfig
rename to trunk/arch/mips/alchemy/Kconfig
diff --git a/trunk/arch/mips/au1000/common/Makefile b/trunk/arch/mips/alchemy/common/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/common/Makefile
rename to trunk/arch/mips/alchemy/common/Makefile
diff --git a/trunk/arch/mips/au1000/common/au1xxx_irqmap.c b/trunk/arch/mips/alchemy/common/au1xxx_irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/au1xxx_irqmap.c
rename to trunk/arch/mips/alchemy/common/au1xxx_irqmap.c
diff --git a/trunk/arch/mips/au1000/common/clocks.c b/trunk/arch/mips/alchemy/common/clocks.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/clocks.c
rename to trunk/arch/mips/alchemy/common/clocks.c
diff --git a/trunk/arch/mips/au1000/common/cputable.c b/trunk/arch/mips/alchemy/common/cputable.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/cputable.c
rename to trunk/arch/mips/alchemy/common/cputable.c
diff --git a/trunk/arch/mips/au1000/common/dbdma.c b/trunk/arch/mips/alchemy/common/dbdma.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/dbdma.c
rename to trunk/arch/mips/alchemy/common/dbdma.c
diff --git a/trunk/arch/mips/au1000/common/dma.c b/trunk/arch/mips/alchemy/common/dma.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/dma.c
rename to trunk/arch/mips/alchemy/common/dma.c
diff --git a/trunk/arch/mips/au1000/common/gpio.c b/trunk/arch/mips/alchemy/common/gpio.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/gpio.c
rename to trunk/arch/mips/alchemy/common/gpio.c
diff --git a/trunk/arch/mips/au1000/common/irq.c b/trunk/arch/mips/alchemy/common/irq.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/irq.c
rename to trunk/arch/mips/alchemy/common/irq.c
diff --git a/trunk/arch/mips/au1000/common/pci.c b/trunk/arch/mips/alchemy/common/pci.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/pci.c
rename to trunk/arch/mips/alchemy/common/pci.c
diff --git a/trunk/arch/mips/au1000/common/platform.c b/trunk/arch/mips/alchemy/common/platform.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/platform.c
rename to trunk/arch/mips/alchemy/common/platform.c
diff --git a/trunk/arch/mips/au1000/common/power.c b/trunk/arch/mips/alchemy/common/power.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/power.c
rename to trunk/arch/mips/alchemy/common/power.c
diff --git a/trunk/arch/mips/au1000/common/prom.c b/trunk/arch/mips/alchemy/common/prom.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/prom.c
rename to trunk/arch/mips/alchemy/common/prom.c
diff --git a/trunk/arch/mips/au1000/common/puts.c b/trunk/arch/mips/alchemy/common/puts.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/puts.c
rename to trunk/arch/mips/alchemy/common/puts.c
diff --git a/trunk/arch/mips/au1000/common/reset.c b/trunk/arch/mips/alchemy/common/reset.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/reset.c
rename to trunk/arch/mips/alchemy/common/reset.c
diff --git a/trunk/arch/mips/au1000/common/setup.c b/trunk/arch/mips/alchemy/common/setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/setup.c
rename to trunk/arch/mips/alchemy/common/setup.c
diff --git a/trunk/arch/mips/au1000/common/sleeper.S b/trunk/arch/mips/alchemy/common/sleeper.S
similarity index 96%
rename from trunk/arch/mips/au1000/common/sleeper.S
rename to trunk/arch/mips/alchemy/common/sleeper.S
index 4b3cf021a454..3006e270c8bc 100644
--- a/trunk/arch/mips/au1000/common/sleeper.S
+++ b/trunk/arch/mips/alchemy/common/sleeper.S
@@ -79,12 +79,12 @@ LEAF(save_and_sleep)
/* Put SDRAM into self refresh. Preload instructions into cache,
* issue a precharge, then auto refresh, then sleep commands to it.
*/
- la t0, sdsleep
+ la t0, sdsleep
.set mips3
- cache 0x14, 0(t0)
- cache 0x14, 32(t0)
- cache 0x14, 64(t0)
- cache 0x14, 96(t0)
+ cache 0x14, 0(t0)
+ cache 0x14, 32(t0)
+ cache 0x14, 64(t0)
+ cache 0x14, 96(t0)
.set mips0
sdsleep:
diff --git a/trunk/arch/mips/au1000/common/time.c b/trunk/arch/mips/alchemy/common/time.c
similarity index 100%
rename from trunk/arch/mips/au1000/common/time.c
rename to trunk/arch/mips/alchemy/common/time.c
diff --git a/trunk/arch/mips/au1000/db1x00/Makefile b/trunk/arch/mips/alchemy/db1x00/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/db1x00/Makefile
rename to trunk/arch/mips/alchemy/db1x00/Makefile
diff --git a/trunk/arch/mips/au1000/db1x00/board_setup.c b/trunk/arch/mips/alchemy/db1x00/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/db1x00/board_setup.c
rename to trunk/arch/mips/alchemy/db1x00/board_setup.c
diff --git a/trunk/arch/mips/au1000/db1x00/init.c b/trunk/arch/mips/alchemy/db1x00/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/db1x00/init.c
rename to trunk/arch/mips/alchemy/db1x00/init.c
diff --git a/trunk/arch/mips/au1000/db1x00/irqmap.c b/trunk/arch/mips/alchemy/db1x00/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/db1x00/irqmap.c
rename to trunk/arch/mips/alchemy/db1x00/irqmap.c
diff --git a/trunk/arch/mips/au1000/mtx-1/Makefile b/trunk/arch/mips/alchemy/mtx-1/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/mtx-1/Makefile
rename to trunk/arch/mips/alchemy/mtx-1/Makefile
diff --git a/trunk/arch/mips/au1000/mtx-1/board_setup.c b/trunk/arch/mips/alchemy/mtx-1/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/mtx-1/board_setup.c
rename to trunk/arch/mips/alchemy/mtx-1/board_setup.c
diff --git a/trunk/arch/mips/au1000/mtx-1/init.c b/trunk/arch/mips/alchemy/mtx-1/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/mtx-1/init.c
rename to trunk/arch/mips/alchemy/mtx-1/init.c
diff --git a/trunk/arch/mips/au1000/mtx-1/irqmap.c b/trunk/arch/mips/alchemy/mtx-1/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/mtx-1/irqmap.c
rename to trunk/arch/mips/alchemy/mtx-1/irqmap.c
diff --git a/trunk/arch/mips/au1000/mtx-1/platform.c b/trunk/arch/mips/alchemy/mtx-1/platform.c
similarity index 100%
rename from trunk/arch/mips/au1000/mtx-1/platform.c
rename to trunk/arch/mips/alchemy/mtx-1/platform.c
diff --git a/trunk/arch/mips/au1000/pb1000/Makefile b/trunk/arch/mips/alchemy/pb1000/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/pb1000/Makefile
rename to trunk/arch/mips/alchemy/pb1000/Makefile
diff --git a/trunk/arch/mips/au1000/pb1000/board_setup.c b/trunk/arch/mips/alchemy/pb1000/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1000/board_setup.c
rename to trunk/arch/mips/alchemy/pb1000/board_setup.c
diff --git a/trunk/arch/mips/au1000/pb1000/init.c b/trunk/arch/mips/alchemy/pb1000/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1000/init.c
rename to trunk/arch/mips/alchemy/pb1000/init.c
diff --git a/trunk/arch/mips/au1000/pb1000/irqmap.c b/trunk/arch/mips/alchemy/pb1000/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1000/irqmap.c
rename to trunk/arch/mips/alchemy/pb1000/irqmap.c
diff --git a/trunk/arch/mips/au1000/pb1100/Makefile b/trunk/arch/mips/alchemy/pb1100/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/pb1100/Makefile
rename to trunk/arch/mips/alchemy/pb1100/Makefile
diff --git a/trunk/arch/mips/au1000/pb1100/board_setup.c b/trunk/arch/mips/alchemy/pb1100/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1100/board_setup.c
rename to trunk/arch/mips/alchemy/pb1100/board_setup.c
diff --git a/trunk/arch/mips/au1000/pb1100/init.c b/trunk/arch/mips/alchemy/pb1100/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1100/init.c
rename to trunk/arch/mips/alchemy/pb1100/init.c
diff --git a/trunk/arch/mips/au1000/pb1100/irqmap.c b/trunk/arch/mips/alchemy/pb1100/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1100/irqmap.c
rename to trunk/arch/mips/alchemy/pb1100/irqmap.c
diff --git a/trunk/arch/mips/au1000/pb1200/Makefile b/trunk/arch/mips/alchemy/pb1200/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/pb1200/Makefile
rename to trunk/arch/mips/alchemy/pb1200/Makefile
diff --git a/trunk/arch/mips/au1000/pb1200/board_setup.c b/trunk/arch/mips/alchemy/pb1200/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1200/board_setup.c
rename to trunk/arch/mips/alchemy/pb1200/board_setup.c
diff --git a/trunk/arch/mips/au1000/pb1200/init.c b/trunk/arch/mips/alchemy/pb1200/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1200/init.c
rename to trunk/arch/mips/alchemy/pb1200/init.c
diff --git a/trunk/arch/mips/au1000/pb1200/irqmap.c b/trunk/arch/mips/alchemy/pb1200/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1200/irqmap.c
rename to trunk/arch/mips/alchemy/pb1200/irqmap.c
diff --git a/trunk/arch/mips/au1000/pb1200/platform.c b/trunk/arch/mips/alchemy/pb1200/platform.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1200/platform.c
rename to trunk/arch/mips/alchemy/pb1200/platform.c
diff --git a/trunk/arch/mips/au1000/pb1500/Makefile b/trunk/arch/mips/alchemy/pb1500/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/pb1500/Makefile
rename to trunk/arch/mips/alchemy/pb1500/Makefile
diff --git a/trunk/arch/mips/au1000/pb1500/board_setup.c b/trunk/arch/mips/alchemy/pb1500/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1500/board_setup.c
rename to trunk/arch/mips/alchemy/pb1500/board_setup.c
diff --git a/trunk/arch/mips/au1000/pb1500/init.c b/trunk/arch/mips/alchemy/pb1500/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1500/init.c
rename to trunk/arch/mips/alchemy/pb1500/init.c
diff --git a/trunk/arch/mips/au1000/pb1500/irqmap.c b/trunk/arch/mips/alchemy/pb1500/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1500/irqmap.c
rename to trunk/arch/mips/alchemy/pb1500/irqmap.c
diff --git a/trunk/arch/mips/au1000/pb1550/Makefile b/trunk/arch/mips/alchemy/pb1550/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/pb1550/Makefile
rename to trunk/arch/mips/alchemy/pb1550/Makefile
diff --git a/trunk/arch/mips/au1000/pb1550/board_setup.c b/trunk/arch/mips/alchemy/pb1550/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1550/board_setup.c
rename to trunk/arch/mips/alchemy/pb1550/board_setup.c
diff --git a/trunk/arch/mips/au1000/pb1550/init.c b/trunk/arch/mips/alchemy/pb1550/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1550/init.c
rename to trunk/arch/mips/alchemy/pb1550/init.c
diff --git a/trunk/arch/mips/au1000/pb1550/irqmap.c b/trunk/arch/mips/alchemy/pb1550/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/pb1550/irqmap.c
rename to trunk/arch/mips/alchemy/pb1550/irqmap.c
diff --git a/trunk/arch/mips/au1000/xxs1500/Makefile b/trunk/arch/mips/alchemy/xxs1500/Makefile
similarity index 100%
rename from trunk/arch/mips/au1000/xxs1500/Makefile
rename to trunk/arch/mips/alchemy/xxs1500/Makefile
diff --git a/trunk/arch/mips/au1000/xxs1500/board_setup.c b/trunk/arch/mips/alchemy/xxs1500/board_setup.c
similarity index 100%
rename from trunk/arch/mips/au1000/xxs1500/board_setup.c
rename to trunk/arch/mips/alchemy/xxs1500/board_setup.c
diff --git a/trunk/arch/mips/au1000/xxs1500/init.c b/trunk/arch/mips/alchemy/xxs1500/init.c
similarity index 100%
rename from trunk/arch/mips/au1000/xxs1500/init.c
rename to trunk/arch/mips/alchemy/xxs1500/init.c
diff --git a/trunk/arch/mips/au1000/xxs1500/irqmap.c b/trunk/arch/mips/alchemy/xxs1500/irqmap.c
similarity index 100%
rename from trunk/arch/mips/au1000/xxs1500/irqmap.c
rename to trunk/arch/mips/alchemy/xxs1500/irqmap.c
diff --git a/trunk/include/asm-mips/Kbuild b/trunk/arch/mips/include/asm/Kbuild
similarity index 100%
rename from trunk/include/asm-mips/Kbuild
rename to trunk/arch/mips/include/asm/Kbuild
diff --git a/trunk/include/asm-mips/a.out.h b/trunk/arch/mips/include/asm/a.out.h
similarity index 100%
rename from trunk/include/asm-mips/a.out.h
rename to trunk/arch/mips/include/asm/a.out.h
diff --git a/trunk/include/asm-mips/abi.h b/trunk/arch/mips/include/asm/abi.h
similarity index 100%
rename from trunk/include/asm-mips/abi.h
rename to trunk/arch/mips/include/asm/abi.h
diff --git a/trunk/include/asm-mips/addrspace.h b/trunk/arch/mips/include/asm/addrspace.h
similarity index 100%
rename from trunk/include/asm-mips/addrspace.h
rename to trunk/arch/mips/include/asm/addrspace.h
diff --git a/trunk/include/asm-mips/asm.h b/trunk/arch/mips/include/asm/asm.h
similarity index 100%
rename from trunk/include/asm-mips/asm.h
rename to trunk/arch/mips/include/asm/asm.h
diff --git a/trunk/include/asm-mips/asmmacro-32.h b/trunk/arch/mips/include/asm/asmmacro-32.h
similarity index 100%
rename from trunk/include/asm-mips/asmmacro-32.h
rename to trunk/arch/mips/include/asm/asmmacro-32.h
diff --git a/trunk/include/asm-mips/asmmacro-64.h b/trunk/arch/mips/include/asm/asmmacro-64.h
similarity index 100%
rename from trunk/include/asm-mips/asmmacro-64.h
rename to trunk/arch/mips/include/asm/asmmacro-64.h
diff --git a/trunk/include/asm-mips/asmmacro.h b/trunk/arch/mips/include/asm/asmmacro.h
similarity index 100%
rename from trunk/include/asm-mips/asmmacro.h
rename to trunk/arch/mips/include/asm/asmmacro.h
diff --git a/trunk/include/asm-mips/atomic.h b/trunk/arch/mips/include/asm/atomic.h
similarity index 100%
rename from trunk/include/asm-mips/atomic.h
rename to trunk/arch/mips/include/asm/atomic.h
diff --git a/trunk/include/asm-mips/auxvec.h b/trunk/arch/mips/include/asm/auxvec.h
similarity index 100%
rename from trunk/include/asm-mips/auxvec.h
rename to trunk/arch/mips/include/asm/auxvec.h
diff --git a/trunk/include/asm-mips/barrier.h b/trunk/arch/mips/include/asm/barrier.h
similarity index 100%
rename from trunk/include/asm-mips/barrier.h
rename to trunk/arch/mips/include/asm/barrier.h
diff --git a/trunk/include/asm-mips/bcache.h b/trunk/arch/mips/include/asm/bcache.h
similarity index 100%
rename from trunk/include/asm-mips/bcache.h
rename to trunk/arch/mips/include/asm/bcache.h
diff --git a/trunk/include/asm-mips/bitops.h b/trunk/arch/mips/include/asm/bitops.h
similarity index 100%
rename from trunk/include/asm-mips/bitops.h
rename to trunk/arch/mips/include/asm/bitops.h
diff --git a/trunk/include/asm-mips/bootinfo.h b/trunk/arch/mips/include/asm/bootinfo.h
similarity index 100%
rename from trunk/include/asm-mips/bootinfo.h
rename to trunk/arch/mips/include/asm/bootinfo.h
diff --git a/trunk/include/asm-mips/branch.h b/trunk/arch/mips/include/asm/branch.h
similarity index 100%
rename from trunk/include/asm-mips/branch.h
rename to trunk/arch/mips/include/asm/branch.h
diff --git a/trunk/include/asm-mips/break.h b/trunk/arch/mips/include/asm/break.h
similarity index 100%
rename from trunk/include/asm-mips/break.h
rename to trunk/arch/mips/include/asm/break.h
diff --git a/trunk/include/asm-mips/bug.h b/trunk/arch/mips/include/asm/bug.h
similarity index 100%
rename from trunk/include/asm-mips/bug.h
rename to trunk/arch/mips/include/asm/bug.h
diff --git a/trunk/include/asm-mips/bugs.h b/trunk/arch/mips/include/asm/bugs.h
similarity index 100%
rename from trunk/include/asm-mips/bugs.h
rename to trunk/arch/mips/include/asm/bugs.h
diff --git a/trunk/include/asm-mips/byteorder.h b/trunk/arch/mips/include/asm/byteorder.h
similarity index 100%
rename from trunk/include/asm-mips/byteorder.h
rename to trunk/arch/mips/include/asm/byteorder.h
diff --git a/trunk/include/asm-mips/cache.h b/trunk/arch/mips/include/asm/cache.h
similarity index 100%
rename from trunk/include/asm-mips/cache.h
rename to trunk/arch/mips/include/asm/cache.h
diff --git a/trunk/include/asm-mips/cachectl.h b/trunk/arch/mips/include/asm/cachectl.h
similarity index 100%
rename from trunk/include/asm-mips/cachectl.h
rename to trunk/arch/mips/include/asm/cachectl.h
diff --git a/trunk/include/asm-mips/cacheflush.h b/trunk/arch/mips/include/asm/cacheflush.h
similarity index 100%
rename from trunk/include/asm-mips/cacheflush.h
rename to trunk/arch/mips/include/asm/cacheflush.h
diff --git a/trunk/include/asm-mips/cacheops.h b/trunk/arch/mips/include/asm/cacheops.h
similarity index 100%
rename from trunk/include/asm-mips/cacheops.h
rename to trunk/arch/mips/include/asm/cacheops.h
diff --git a/trunk/include/asm-mips/checksum.h b/trunk/arch/mips/include/asm/checksum.h
similarity index 100%
rename from trunk/include/asm-mips/checksum.h
rename to trunk/arch/mips/include/asm/checksum.h
diff --git a/trunk/include/asm-mips/cmp.h b/trunk/arch/mips/include/asm/cmp.h
similarity index 100%
rename from trunk/include/asm-mips/cmp.h
rename to trunk/arch/mips/include/asm/cmp.h
diff --git a/trunk/include/asm-mips/cmpxchg.h b/trunk/arch/mips/include/asm/cmpxchg.h
similarity index 100%
rename from trunk/include/asm-mips/cmpxchg.h
rename to trunk/arch/mips/include/asm/cmpxchg.h
diff --git a/trunk/include/asm-mips/compat-signal.h b/trunk/arch/mips/include/asm/compat-signal.h
similarity index 100%
rename from trunk/include/asm-mips/compat-signal.h
rename to trunk/arch/mips/include/asm/compat-signal.h
diff --git a/trunk/include/asm-mips/compat.h b/trunk/arch/mips/include/asm/compat.h
similarity index 100%
rename from trunk/include/asm-mips/compat.h
rename to trunk/arch/mips/include/asm/compat.h
diff --git a/trunk/include/asm-mips/compiler.h b/trunk/arch/mips/include/asm/compiler.h
similarity index 100%
rename from trunk/include/asm-mips/compiler.h
rename to trunk/arch/mips/include/asm/compiler.h
diff --git a/trunk/include/asm-mips/cpu-features.h b/trunk/arch/mips/include/asm/cpu-features.h
similarity index 100%
rename from trunk/include/asm-mips/cpu-features.h
rename to trunk/arch/mips/include/asm/cpu-features.h
diff --git a/trunk/include/asm-mips/cpu-info.h b/trunk/arch/mips/include/asm/cpu-info.h
similarity index 92%
rename from trunk/include/asm-mips/cpu-info.h
rename to trunk/arch/mips/include/asm/cpu-info.h
index 2de73dbb2e9e..744cd8fb107f 100644
--- a/trunk/include/asm-mips/cpu-info.h
+++ b/trunk/arch/mips/include/asm/cpu-info.h
@@ -12,6 +12,8 @@
#ifndef __ASM_CPU_INFO_H
#define __ASM_CPU_INFO_H
+#include
+
#include
/*
@@ -69,6 +71,10 @@ struct cpuinfo_mips {
int tc_id; /* Thread Context number */
#endif
void *data; /* Additional data */
+ unsigned int watch_reg_count; /* Number that exist */
+ unsigned int watch_reg_use_cnt; /* Usable by ptrace */
+#define NUM_WATCH_REGS 4
+ u16 watch_reg_masks[NUM_WATCH_REGS];
} __attribute__((aligned(SMP_CACHE_BYTES)));
extern struct cpuinfo_mips cpu_data[];
diff --git a/trunk/include/asm-mips/cpu.h b/trunk/arch/mips/include/asm/cpu.h
similarity index 100%
rename from trunk/include/asm-mips/cpu.h
rename to trunk/arch/mips/include/asm/cpu.h
diff --git a/trunk/include/asm-mips/cputime.h b/trunk/arch/mips/include/asm/cputime.h
similarity index 100%
rename from trunk/include/asm-mips/cputime.h
rename to trunk/arch/mips/include/asm/cputime.h
diff --git a/trunk/include/asm-mips/current.h b/trunk/arch/mips/include/asm/current.h
similarity index 100%
rename from trunk/include/asm-mips/current.h
rename to trunk/arch/mips/include/asm/current.h
diff --git a/trunk/include/asm-mips/debug.h b/trunk/arch/mips/include/asm/debug.h
similarity index 100%
rename from trunk/include/asm-mips/debug.h
rename to trunk/arch/mips/include/asm/debug.h
diff --git a/trunk/include/asm-mips/dec/ecc.h b/trunk/arch/mips/include/asm/dec/ecc.h
similarity index 100%
rename from trunk/include/asm-mips/dec/ecc.h
rename to trunk/arch/mips/include/asm/dec/ecc.h
diff --git a/trunk/include/asm-mips/dec/interrupts.h b/trunk/arch/mips/include/asm/dec/interrupts.h
similarity index 100%
rename from trunk/include/asm-mips/dec/interrupts.h
rename to trunk/arch/mips/include/asm/dec/interrupts.h
diff --git a/trunk/include/asm-mips/dec/ioasic.h b/trunk/arch/mips/include/asm/dec/ioasic.h
similarity index 100%
rename from trunk/include/asm-mips/dec/ioasic.h
rename to trunk/arch/mips/include/asm/dec/ioasic.h
diff --git a/trunk/include/asm-mips/dec/ioasic_addrs.h b/trunk/arch/mips/include/asm/dec/ioasic_addrs.h
similarity index 100%
rename from trunk/include/asm-mips/dec/ioasic_addrs.h
rename to trunk/arch/mips/include/asm/dec/ioasic_addrs.h
diff --git a/trunk/include/asm-mips/dec/ioasic_ints.h b/trunk/arch/mips/include/asm/dec/ioasic_ints.h
similarity index 100%
rename from trunk/include/asm-mips/dec/ioasic_ints.h
rename to trunk/arch/mips/include/asm/dec/ioasic_ints.h
diff --git a/trunk/include/asm-mips/dec/kn01.h b/trunk/arch/mips/include/asm/dec/kn01.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn01.h
rename to trunk/arch/mips/include/asm/dec/kn01.h
diff --git a/trunk/include/asm-mips/dec/kn02.h b/trunk/arch/mips/include/asm/dec/kn02.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn02.h
rename to trunk/arch/mips/include/asm/dec/kn02.h
diff --git a/trunk/include/asm-mips/dec/kn02ba.h b/trunk/arch/mips/include/asm/dec/kn02ba.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn02ba.h
rename to trunk/arch/mips/include/asm/dec/kn02ba.h
diff --git a/trunk/include/asm-mips/dec/kn02ca.h b/trunk/arch/mips/include/asm/dec/kn02ca.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn02ca.h
rename to trunk/arch/mips/include/asm/dec/kn02ca.h
diff --git a/trunk/include/asm-mips/dec/kn02xa.h b/trunk/arch/mips/include/asm/dec/kn02xa.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn02xa.h
rename to trunk/arch/mips/include/asm/dec/kn02xa.h
diff --git a/trunk/include/asm-mips/dec/kn03.h b/trunk/arch/mips/include/asm/dec/kn03.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn03.h
rename to trunk/arch/mips/include/asm/dec/kn03.h
diff --git a/trunk/include/asm-mips/dec/kn05.h b/trunk/arch/mips/include/asm/dec/kn05.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn05.h
rename to trunk/arch/mips/include/asm/dec/kn05.h
diff --git a/trunk/include/asm-mips/dec/kn230.h b/trunk/arch/mips/include/asm/dec/kn230.h
similarity index 100%
rename from trunk/include/asm-mips/dec/kn230.h
rename to trunk/arch/mips/include/asm/dec/kn230.h
diff --git a/trunk/include/asm-mips/dec/machtype.h b/trunk/arch/mips/include/asm/dec/machtype.h
similarity index 100%
rename from trunk/include/asm-mips/dec/machtype.h
rename to trunk/arch/mips/include/asm/dec/machtype.h
diff --git a/trunk/include/asm-mips/dec/prom.h b/trunk/arch/mips/include/asm/dec/prom.h
similarity index 100%
rename from trunk/include/asm-mips/dec/prom.h
rename to trunk/arch/mips/include/asm/dec/prom.h
diff --git a/trunk/include/asm-mips/dec/system.h b/trunk/arch/mips/include/asm/dec/system.h
similarity index 100%
rename from trunk/include/asm-mips/dec/system.h
rename to trunk/arch/mips/include/asm/dec/system.h
diff --git a/trunk/include/asm-mips/delay.h b/trunk/arch/mips/include/asm/delay.h
similarity index 100%
rename from trunk/include/asm-mips/delay.h
rename to trunk/arch/mips/include/asm/delay.h
diff --git a/trunk/include/asm-mips/device.h b/trunk/arch/mips/include/asm/device.h
similarity index 100%
rename from trunk/include/asm-mips/device.h
rename to trunk/arch/mips/include/asm/device.h
diff --git a/trunk/include/asm-mips/div64.h b/trunk/arch/mips/include/asm/div64.h
similarity index 100%
rename from trunk/include/asm-mips/div64.h
rename to trunk/arch/mips/include/asm/div64.h
diff --git a/trunk/include/asm-mips/dma-mapping.h b/trunk/arch/mips/include/asm/dma-mapping.h
similarity index 100%
rename from trunk/include/asm-mips/dma-mapping.h
rename to trunk/arch/mips/include/asm/dma-mapping.h
diff --git a/trunk/include/asm-mips/dma.h b/trunk/arch/mips/include/asm/dma.h
similarity index 100%
rename from trunk/include/asm-mips/dma.h
rename to trunk/arch/mips/include/asm/dma.h
diff --git a/trunk/include/asm-mips/ds1286.h b/trunk/arch/mips/include/asm/ds1286.h
similarity index 100%
rename from trunk/include/asm-mips/ds1286.h
rename to trunk/arch/mips/include/asm/ds1286.h
diff --git a/trunk/include/asm-mips/ds1287.h b/trunk/arch/mips/include/asm/ds1287.h
similarity index 100%
rename from trunk/include/asm-mips/ds1287.h
rename to trunk/arch/mips/include/asm/ds1287.h
diff --git a/trunk/include/asm-mips/dsp.h b/trunk/arch/mips/include/asm/dsp.h
similarity index 100%
rename from trunk/include/asm-mips/dsp.h
rename to trunk/arch/mips/include/asm/dsp.h
diff --git a/trunk/include/asm-mips/edac.h b/trunk/arch/mips/include/asm/edac.h
similarity index 100%
rename from trunk/include/asm-mips/edac.h
rename to trunk/arch/mips/include/asm/edac.h
diff --git a/trunk/include/asm-mips/elf.h b/trunk/arch/mips/include/asm/elf.h
similarity index 100%
rename from trunk/include/asm-mips/elf.h
rename to trunk/arch/mips/include/asm/elf.h
diff --git a/trunk/include/asm-mips/emergency-restart.h b/trunk/arch/mips/include/asm/emergency-restart.h
similarity index 100%
rename from trunk/include/asm-mips/emergency-restart.h
rename to trunk/arch/mips/include/asm/emergency-restart.h
diff --git a/trunk/include/asm-mips/emma2rh/emma2rh.h b/trunk/arch/mips/include/asm/emma2rh/emma2rh.h
similarity index 100%
rename from trunk/include/asm-mips/emma2rh/emma2rh.h
rename to trunk/arch/mips/include/asm/emma2rh/emma2rh.h
diff --git a/trunk/include/asm-mips/emma2rh/markeins.h b/trunk/arch/mips/include/asm/emma2rh/markeins.h
similarity index 100%
rename from trunk/include/asm-mips/emma2rh/markeins.h
rename to trunk/arch/mips/include/asm/emma2rh/markeins.h
diff --git a/trunk/include/asm-mips/errno.h b/trunk/arch/mips/include/asm/errno.h
similarity index 100%
rename from trunk/include/asm-mips/errno.h
rename to trunk/arch/mips/include/asm/errno.h
diff --git a/trunk/include/asm-mips/fb.h b/trunk/arch/mips/include/asm/fb.h
similarity index 100%
rename from trunk/include/asm-mips/fb.h
rename to trunk/arch/mips/include/asm/fb.h
diff --git a/trunk/include/asm-mips/fcntl.h b/trunk/arch/mips/include/asm/fcntl.h
similarity index 100%
rename from trunk/include/asm-mips/fcntl.h
rename to trunk/arch/mips/include/asm/fcntl.h
diff --git a/trunk/include/asm-mips/fixmap.h b/trunk/arch/mips/include/asm/fixmap.h
similarity index 100%
rename from trunk/include/asm-mips/fixmap.h
rename to trunk/arch/mips/include/asm/fixmap.h
diff --git a/trunk/include/asm-mips/floppy.h b/trunk/arch/mips/include/asm/floppy.h
similarity index 100%
rename from trunk/include/asm-mips/floppy.h
rename to trunk/arch/mips/include/asm/floppy.h
diff --git a/trunk/include/asm-mips/fpregdef.h b/trunk/arch/mips/include/asm/fpregdef.h
similarity index 100%
rename from trunk/include/asm-mips/fpregdef.h
rename to trunk/arch/mips/include/asm/fpregdef.h
diff --git a/trunk/include/asm-mips/fpu.h b/trunk/arch/mips/include/asm/fpu.h
similarity index 100%
rename from trunk/include/asm-mips/fpu.h
rename to trunk/arch/mips/include/asm/fpu.h
diff --git a/trunk/include/asm-mips/fpu_emulator.h b/trunk/arch/mips/include/asm/fpu_emulator.h
similarity index 100%
rename from trunk/include/asm-mips/fpu_emulator.h
rename to trunk/arch/mips/include/asm/fpu_emulator.h
diff --git a/trunk/include/asm-mips/futex.h b/trunk/arch/mips/include/asm/futex.h
similarity index 100%
rename from trunk/include/asm-mips/futex.h
rename to trunk/arch/mips/include/asm/futex.h
diff --git a/trunk/include/asm-mips/fw/arc/hinv.h b/trunk/arch/mips/include/asm/fw/arc/hinv.h
similarity index 100%
rename from trunk/include/asm-mips/fw/arc/hinv.h
rename to trunk/arch/mips/include/asm/fw/arc/hinv.h
diff --git a/trunk/include/asm-mips/fw/arc/types.h b/trunk/arch/mips/include/asm/fw/arc/types.h
similarity index 100%
rename from trunk/include/asm-mips/fw/arc/types.h
rename to trunk/arch/mips/include/asm/fw/arc/types.h
diff --git a/trunk/include/asm-mips/fw/cfe/cfe_api.h b/trunk/arch/mips/include/asm/fw/cfe/cfe_api.h
similarity index 100%
rename from trunk/include/asm-mips/fw/cfe/cfe_api.h
rename to trunk/arch/mips/include/asm/fw/cfe/cfe_api.h
diff --git a/trunk/include/asm-mips/fw/cfe/cfe_error.h b/trunk/arch/mips/include/asm/fw/cfe/cfe_error.h
similarity index 100%
rename from trunk/include/asm-mips/fw/cfe/cfe_error.h
rename to trunk/arch/mips/include/asm/fw/cfe/cfe_error.h
diff --git a/trunk/include/asm-mips/gcmpregs.h b/trunk/arch/mips/include/asm/gcmpregs.h
similarity index 100%
rename from trunk/include/asm-mips/gcmpregs.h
rename to trunk/arch/mips/include/asm/gcmpregs.h
diff --git a/trunk/include/asm-mips/gic.h b/trunk/arch/mips/include/asm/gic.h
similarity index 100%
rename from trunk/include/asm-mips/gic.h
rename to trunk/arch/mips/include/asm/gic.h
diff --git a/trunk/include/asm-mips/gpio.h b/trunk/arch/mips/include/asm/gpio.h
similarity index 100%
rename from trunk/include/asm-mips/gpio.h
rename to trunk/arch/mips/include/asm/gpio.h
diff --git a/trunk/include/asm-mips/gt64120.h b/trunk/arch/mips/include/asm/gt64120.h
similarity index 100%
rename from trunk/include/asm-mips/gt64120.h
rename to trunk/arch/mips/include/asm/gt64120.h
diff --git a/trunk/include/asm-mips/hardirq.h b/trunk/arch/mips/include/asm/hardirq.h
similarity index 100%
rename from trunk/include/asm-mips/hardirq.h
rename to trunk/arch/mips/include/asm/hardirq.h
diff --git a/trunk/include/asm-mips/hazards.h b/trunk/arch/mips/include/asm/hazards.h
similarity index 100%
rename from trunk/include/asm-mips/hazards.h
rename to trunk/arch/mips/include/asm/hazards.h
diff --git a/trunk/include/asm-mips/highmem.h b/trunk/arch/mips/include/asm/highmem.h
similarity index 100%
rename from trunk/include/asm-mips/highmem.h
rename to trunk/arch/mips/include/asm/highmem.h
diff --git a/trunk/include/asm-mips/hw_irq.h b/trunk/arch/mips/include/asm/hw_irq.h
similarity index 100%
rename from trunk/include/asm-mips/hw_irq.h
rename to trunk/arch/mips/include/asm/hw_irq.h
diff --git a/trunk/include/asm-mips/i8253.h b/trunk/arch/mips/include/asm/i8253.h
similarity index 100%
rename from trunk/include/asm-mips/i8253.h
rename to trunk/arch/mips/include/asm/i8253.h
diff --git a/trunk/include/asm-mips/i8259.h b/trunk/arch/mips/include/asm/i8259.h
similarity index 100%
rename from trunk/include/asm-mips/i8259.h
rename to trunk/arch/mips/include/asm/i8259.h
diff --git a/trunk/include/asm-mips/ide.h b/trunk/arch/mips/include/asm/ide.h
similarity index 100%
rename from trunk/include/asm-mips/ide.h
rename to trunk/arch/mips/include/asm/ide.h
diff --git a/trunk/include/asm-mips/inst.h b/trunk/arch/mips/include/asm/inst.h
similarity index 100%
rename from trunk/include/asm-mips/inst.h
rename to trunk/arch/mips/include/asm/inst.h
diff --git a/trunk/include/asm-mips/io.h b/trunk/arch/mips/include/asm/io.h
similarity index 100%
rename from trunk/include/asm-mips/io.h
rename to trunk/arch/mips/include/asm/io.h
diff --git a/trunk/include/asm-mips/ioctl.h b/trunk/arch/mips/include/asm/ioctl.h
similarity index 100%
rename from trunk/include/asm-mips/ioctl.h
rename to trunk/arch/mips/include/asm/ioctl.h
diff --git a/trunk/include/asm-mips/ioctls.h b/trunk/arch/mips/include/asm/ioctls.h
similarity index 100%
rename from trunk/include/asm-mips/ioctls.h
rename to trunk/arch/mips/include/asm/ioctls.h
diff --git a/trunk/include/asm-mips/ip32/crime.h b/trunk/arch/mips/include/asm/ip32/crime.h
similarity index 100%
rename from trunk/include/asm-mips/ip32/crime.h
rename to trunk/arch/mips/include/asm/ip32/crime.h
diff --git a/trunk/include/asm-mips/ip32/ip32_ints.h b/trunk/arch/mips/include/asm/ip32/ip32_ints.h
similarity index 100%
rename from trunk/include/asm-mips/ip32/ip32_ints.h
rename to trunk/arch/mips/include/asm/ip32/ip32_ints.h
diff --git a/trunk/include/asm-mips/ip32/mace.h b/trunk/arch/mips/include/asm/ip32/mace.h
similarity index 100%
rename from trunk/include/asm-mips/ip32/mace.h
rename to trunk/arch/mips/include/asm/ip32/mace.h
diff --git a/trunk/include/asm-mips/ipcbuf.h b/trunk/arch/mips/include/asm/ipcbuf.h
similarity index 100%
rename from trunk/include/asm-mips/ipcbuf.h
rename to trunk/arch/mips/include/asm/ipcbuf.h
diff --git a/trunk/include/asm-mips/irq.h b/trunk/arch/mips/include/asm/irq.h
similarity index 100%
rename from trunk/include/asm-mips/irq.h
rename to trunk/arch/mips/include/asm/irq.h
diff --git a/trunk/include/asm-mips/irq_cpu.h b/trunk/arch/mips/include/asm/irq_cpu.h
similarity index 100%
rename from trunk/include/asm-mips/irq_cpu.h
rename to trunk/arch/mips/include/asm/irq_cpu.h
diff --git a/trunk/include/asm-mips/irq_gt641xx.h b/trunk/arch/mips/include/asm/irq_gt641xx.h
similarity index 100%
rename from trunk/include/asm-mips/irq_gt641xx.h
rename to trunk/arch/mips/include/asm/irq_gt641xx.h
diff --git a/trunk/include/asm-mips/irq_regs.h b/trunk/arch/mips/include/asm/irq_regs.h
similarity index 100%
rename from trunk/include/asm-mips/irq_regs.h
rename to trunk/arch/mips/include/asm/irq_regs.h
diff --git a/trunk/include/asm-mips/irqflags.h b/trunk/arch/mips/include/asm/irqflags.h
similarity index 100%
rename from trunk/include/asm-mips/irqflags.h
rename to trunk/arch/mips/include/asm/irqflags.h
diff --git a/trunk/include/asm-mips/isadep.h b/trunk/arch/mips/include/asm/isadep.h
similarity index 100%
rename from trunk/include/asm-mips/isadep.h
rename to trunk/arch/mips/include/asm/isadep.h
diff --git a/trunk/include/asm-mips/jazz.h b/trunk/arch/mips/include/asm/jazz.h
similarity index 100%
rename from trunk/include/asm-mips/jazz.h
rename to trunk/arch/mips/include/asm/jazz.h
diff --git a/trunk/include/asm-mips/jazzdma.h b/trunk/arch/mips/include/asm/jazzdma.h
similarity index 100%
rename from trunk/include/asm-mips/jazzdma.h
rename to trunk/arch/mips/include/asm/jazzdma.h
diff --git a/trunk/include/asm-mips/kdebug.h b/trunk/arch/mips/include/asm/kdebug.h
similarity index 100%
rename from trunk/include/asm-mips/kdebug.h
rename to trunk/arch/mips/include/asm/kdebug.h
diff --git a/trunk/include/asm-mips/kexec.h b/trunk/arch/mips/include/asm/kexec.h
similarity index 100%
rename from trunk/include/asm-mips/kexec.h
rename to trunk/arch/mips/include/asm/kexec.h
diff --git a/trunk/include/asm-mips/kgdb.h b/trunk/arch/mips/include/asm/kgdb.h
similarity index 100%
rename from trunk/include/asm-mips/kgdb.h
rename to trunk/arch/mips/include/asm/kgdb.h
diff --git a/trunk/include/asm-mips/kmap_types.h b/trunk/arch/mips/include/asm/kmap_types.h
similarity index 100%
rename from trunk/include/asm-mips/kmap_types.h
rename to trunk/arch/mips/include/asm/kmap_types.h
diff --git a/trunk/include/asm-mips/kspd.h b/trunk/arch/mips/include/asm/kspd.h
similarity index 100%
rename from trunk/include/asm-mips/kspd.h
rename to trunk/arch/mips/include/asm/kspd.h
diff --git a/trunk/include/asm-mips/lasat/ds1603.h b/trunk/arch/mips/include/asm/lasat/ds1603.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/ds1603.h
rename to trunk/arch/mips/include/asm/lasat/ds1603.h
diff --git a/trunk/include/asm-mips/lasat/eeprom.h b/trunk/arch/mips/include/asm/lasat/eeprom.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/eeprom.h
rename to trunk/arch/mips/include/asm/lasat/eeprom.h
diff --git a/trunk/include/asm-mips/lasat/head.h b/trunk/arch/mips/include/asm/lasat/head.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/head.h
rename to trunk/arch/mips/include/asm/lasat/head.h
diff --git a/trunk/include/asm-mips/lasat/lasat.h b/trunk/arch/mips/include/asm/lasat/lasat.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/lasat.h
rename to trunk/arch/mips/include/asm/lasat/lasat.h
diff --git a/trunk/include/asm-mips/lasat/lasatint.h b/trunk/arch/mips/include/asm/lasat/lasatint.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/lasatint.h
rename to trunk/arch/mips/include/asm/lasat/lasatint.h
diff --git a/trunk/include/asm-mips/lasat/picvue.h b/trunk/arch/mips/include/asm/lasat/picvue.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/picvue.h
rename to trunk/arch/mips/include/asm/lasat/picvue.h
diff --git a/trunk/include/asm-mips/lasat/serial.h b/trunk/arch/mips/include/asm/lasat/serial.h
similarity index 100%
rename from trunk/include/asm-mips/lasat/serial.h
rename to trunk/arch/mips/include/asm/lasat/serial.h
diff --git a/trunk/include/asm-mips/linkage.h b/trunk/arch/mips/include/asm/linkage.h
similarity index 100%
rename from trunk/include/asm-mips/linkage.h
rename to trunk/arch/mips/include/asm/linkage.h
diff --git a/trunk/include/asm-mips/local.h b/trunk/arch/mips/include/asm/local.h
similarity index 100%
rename from trunk/include/asm-mips/local.h
rename to trunk/arch/mips/include/asm/local.h
diff --git a/trunk/include/asm-mips/m48t35.h b/trunk/arch/mips/include/asm/m48t35.h
similarity index 100%
rename from trunk/include/asm-mips/m48t35.h
rename to trunk/arch/mips/include/asm/m48t35.h
diff --git a/trunk/include/asm-mips/m48t37.h b/trunk/arch/mips/include/asm/m48t37.h
similarity index 100%
rename from trunk/include/asm-mips/m48t37.h
rename to trunk/arch/mips/include/asm/m48t37.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1000.h b/trunk/arch/mips/include/asm/mach-au1x00/au1000.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1000.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1000.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1000_dma.h b/trunk/arch/mips/include/asm/mach-au1x00/au1000_dma.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1000_dma.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1000_dma.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1000_gpio.h b/trunk/arch/mips/include/asm/mach-au1x00/au1000_gpio.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1000_gpio.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1000_gpio.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1100_mmc.h b/trunk/arch/mips/include/asm/mach-au1x00/au1100_mmc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1100_mmc.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1100_mmc.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1550_spi.h b/trunk/arch/mips/include/asm/mach-au1x00/au1550_spi.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1550_spi.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1550_spi.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx.h b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1xxx.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1xxx.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1xxx_dbdma.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1xxx_ide.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h
diff --git a/trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h b/trunk/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/au1xxx_psc.h
rename to trunk/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
diff --git a/trunk/include/asm-mips/mach-au1x00/gpio.h b/trunk/arch/mips/include/asm/mach-au1x00/gpio.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/gpio.h
rename to trunk/arch/mips/include/asm/mach-au1x00/gpio.h
diff --git a/trunk/include/asm-mips/mach-au1x00/ioremap.h b/trunk/arch/mips/include/asm/mach-au1x00/ioremap.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/ioremap.h
rename to trunk/arch/mips/include/asm/mach-au1x00/ioremap.h
diff --git a/trunk/include/asm-mips/mach-au1x00/prom.h b/trunk/arch/mips/include/asm/mach-au1x00/prom.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/prom.h
rename to trunk/arch/mips/include/asm/mach-au1x00/prom.h
diff --git a/trunk/include/asm-mips/mach-au1x00/war.h b/trunk/arch/mips/include/asm/mach-au1x00/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-au1x00/war.h
rename to trunk/arch/mips/include/asm/mach-au1x00/war.h
diff --git a/trunk/include/asm-mips/mach-bcm47xx/bcm47xx.h b/trunk/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
similarity index 100%
rename from trunk/include/asm-mips/mach-bcm47xx/bcm47xx.h
rename to trunk/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
diff --git a/trunk/include/asm-mips/mach-bcm47xx/gpio.h b/trunk/arch/mips/include/asm/mach-bcm47xx/gpio.h
similarity index 100%
rename from trunk/include/asm-mips/mach-bcm47xx/gpio.h
rename to trunk/arch/mips/include/asm/mach-bcm47xx/gpio.h
diff --git a/trunk/include/asm-mips/mach-bcm47xx/war.h b/trunk/arch/mips/include/asm/mach-bcm47xx/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-bcm47xx/war.h
rename to trunk/arch/mips/include/asm/mach-bcm47xx/war.h
diff --git a/trunk/include/asm-mips/mach-cobalt/cobalt.h b/trunk/arch/mips/include/asm/mach-cobalt/cobalt.h
similarity index 100%
rename from trunk/include/asm-mips/mach-cobalt/cobalt.h
rename to trunk/arch/mips/include/asm/mach-cobalt/cobalt.h
diff --git a/trunk/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-cobalt/irq.h b/trunk/arch/mips/include/asm/mach-cobalt/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-cobalt/irq.h
rename to trunk/arch/mips/include/asm/mach-cobalt/irq.h
diff --git a/trunk/include/asm-mips/mach-cobalt/mach-gt64120.h b/trunk/arch/mips/include/asm/mach-cobalt/mach-gt64120.h
similarity index 100%
rename from trunk/include/asm-mips/mach-cobalt/mach-gt64120.h
rename to trunk/arch/mips/include/asm/mach-cobalt/mach-gt64120.h
diff --git a/trunk/include/asm-mips/mach-cobalt/war.h b/trunk/arch/mips/include/asm/mach-cobalt/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-cobalt/war.h
rename to trunk/arch/mips/include/asm/mach-cobalt/war.h
diff --git a/trunk/include/asm-mips/mach-db1x00/db1200.h b/trunk/arch/mips/include/asm/mach-db1x00/db1200.h
similarity index 100%
rename from trunk/include/asm-mips/mach-db1x00/db1200.h
rename to trunk/arch/mips/include/asm/mach-db1x00/db1200.h
diff --git a/trunk/include/asm-mips/mach-db1x00/db1x00.h b/trunk/arch/mips/include/asm/mach-db1x00/db1x00.h
similarity index 100%
rename from trunk/include/asm-mips/mach-db1x00/db1x00.h
rename to trunk/arch/mips/include/asm/mach-db1x00/db1x00.h
diff --git a/trunk/include/asm-mips/mach-dec/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-dec/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-dec/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-dec/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-dec/war.h b/trunk/arch/mips/include/asm/mach-dec/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-dec/war.h
rename to trunk/arch/mips/include/asm/mach-dec/war.h
diff --git a/trunk/include/asm-mips/mach-emma2rh/irq.h b/trunk/arch/mips/include/asm/mach-emma2rh/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-emma2rh/irq.h
rename to trunk/arch/mips/include/asm/mach-emma2rh/irq.h
diff --git a/trunk/include/asm-mips/mach-emma2rh/war.h b/trunk/arch/mips/include/asm/mach-emma2rh/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-emma2rh/war.h
rename to trunk/arch/mips/include/asm/mach-emma2rh/war.h
diff --git a/trunk/include/asm-mips/mach-excite/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-excite/excite.h b/trunk/arch/mips/include/asm/mach-excite/excite.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/excite.h
rename to trunk/arch/mips/include/asm/mach-excite/excite.h
diff --git a/trunk/include/asm-mips/mach-excite/excite_fpga.h b/trunk/arch/mips/include/asm/mach-excite/excite_fpga.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/excite_fpga.h
rename to trunk/arch/mips/include/asm/mach-excite/excite_fpga.h
diff --git a/trunk/include/asm-mips/mach-excite/excite_nandflash.h b/trunk/arch/mips/include/asm/mach-excite/excite_nandflash.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/excite_nandflash.h
rename to trunk/arch/mips/include/asm/mach-excite/excite_nandflash.h
diff --git a/trunk/include/asm-mips/mach-excite/rm9k_eth.h b/trunk/arch/mips/include/asm/mach-excite/rm9k_eth.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/rm9k_eth.h
rename to trunk/arch/mips/include/asm/mach-excite/rm9k_eth.h
diff --git a/trunk/include/asm-mips/mach-excite/rm9k_wdt.h b/trunk/arch/mips/include/asm/mach-excite/rm9k_wdt.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/rm9k_wdt.h
rename to trunk/arch/mips/include/asm/mach-excite/rm9k_wdt.h
diff --git a/trunk/include/asm-mips/mach-excite/rm9k_xicap.h b/trunk/arch/mips/include/asm/mach-excite/rm9k_xicap.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/rm9k_xicap.h
rename to trunk/arch/mips/include/asm/mach-excite/rm9k_xicap.h
diff --git a/trunk/include/asm-mips/mach-excite/war.h b/trunk/arch/mips/include/asm/mach-excite/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-excite/war.h
rename to trunk/arch/mips/include/asm/mach-excite/war.h
diff --git a/trunk/include/asm-mips/mach-generic/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-generic/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-generic/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-generic/dma-coherence.h b/trunk/arch/mips/include/asm/mach-generic/dma-coherence.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/dma-coherence.h
rename to trunk/arch/mips/include/asm/mach-generic/dma-coherence.h
diff --git a/trunk/include/asm-mips/mach-generic/floppy.h b/trunk/arch/mips/include/asm/mach-generic/floppy.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/floppy.h
rename to trunk/arch/mips/include/asm/mach-generic/floppy.h
diff --git a/trunk/include/asm-mips/mach-generic/gpio.h b/trunk/arch/mips/include/asm/mach-generic/gpio.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/gpio.h
rename to trunk/arch/mips/include/asm/mach-generic/gpio.h
diff --git a/trunk/include/asm-mips/mach-generic/ide.h b/trunk/arch/mips/include/asm/mach-generic/ide.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/ide.h
rename to trunk/arch/mips/include/asm/mach-generic/ide.h
diff --git a/trunk/include/asm-mips/mach-generic/ioremap.h b/trunk/arch/mips/include/asm/mach-generic/ioremap.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/ioremap.h
rename to trunk/arch/mips/include/asm/mach-generic/ioremap.h
diff --git a/trunk/include/asm-mips/mach-generic/irq.h b/trunk/arch/mips/include/asm/mach-generic/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/irq.h
rename to trunk/arch/mips/include/asm/mach-generic/irq.h
diff --git a/trunk/include/asm-mips/mach-generic/kernel-entry-init.h b/trunk/arch/mips/include/asm/mach-generic/kernel-entry-init.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/kernel-entry-init.h
rename to trunk/arch/mips/include/asm/mach-generic/kernel-entry-init.h
diff --git a/trunk/include/asm-mips/mach-generic/kmalloc.h b/trunk/arch/mips/include/asm/mach-generic/kmalloc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/kmalloc.h
rename to trunk/arch/mips/include/asm/mach-generic/kmalloc.h
diff --git a/trunk/include/asm-mips/mach-generic/mangle-port.h b/trunk/arch/mips/include/asm/mach-generic/mangle-port.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/mangle-port.h
rename to trunk/arch/mips/include/asm/mach-generic/mangle-port.h
diff --git a/trunk/include/asm-mips/mach-generic/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-generic/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-generic/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-generic/spaces.h b/trunk/arch/mips/include/asm/mach-generic/spaces.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/spaces.h
rename to trunk/arch/mips/include/asm/mach-generic/spaces.h
diff --git a/trunk/include/asm-mips/mach-generic/topology.h b/trunk/arch/mips/include/asm/mach-generic/topology.h
similarity index 100%
rename from trunk/include/asm-mips/mach-generic/topology.h
rename to trunk/arch/mips/include/asm/mach-generic/topology.h
diff --git a/trunk/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip22/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-ip22/ds1286.h b/trunk/arch/mips/include/asm/mach-ip22/ds1286.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip22/ds1286.h
rename to trunk/arch/mips/include/asm/mach-ip22/ds1286.h
diff --git a/trunk/include/asm-mips/mach-ip22/spaces.h b/trunk/arch/mips/include/asm/mach-ip22/spaces.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip22/spaces.h
rename to trunk/arch/mips/include/asm/mach-ip22/spaces.h
diff --git a/trunk/include/asm-mips/mach-ip22/war.h b/trunk/arch/mips/include/asm/mach-ip22/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip22/war.h
rename to trunk/arch/mips/include/asm/mach-ip22/war.h
diff --git a/trunk/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-ip27/dma-coherence.h b/trunk/arch/mips/include/asm/mach-ip27/dma-coherence.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/dma-coherence.h
rename to trunk/arch/mips/include/asm/mach-ip27/dma-coherence.h
diff --git a/trunk/include/asm-mips/mach-ip27/irq.h b/trunk/arch/mips/include/asm/mach-ip27/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/irq.h
rename to trunk/arch/mips/include/asm/mach-ip27/irq.h
diff --git a/trunk/include/asm-mips/mach-ip27/kernel-entry-init.h b/trunk/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/kernel-entry-init.h
rename to trunk/arch/mips/include/asm/mach-ip27/kernel-entry-init.h
diff --git a/trunk/include/asm-mips/mach-ip27/kmalloc.h b/trunk/arch/mips/include/asm/mach-ip27/kmalloc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/kmalloc.h
rename to trunk/arch/mips/include/asm/mach-ip27/kmalloc.h
diff --git a/trunk/include/asm-mips/mach-ip27/mangle-port.h b/trunk/arch/mips/include/asm/mach-ip27/mangle-port.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/mangle-port.h
rename to trunk/arch/mips/include/asm/mach-ip27/mangle-port.h
diff --git a/trunk/include/asm-mips/mach-ip27/mmzone.h b/trunk/arch/mips/include/asm/mach-ip27/mmzone.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/mmzone.h
rename to trunk/arch/mips/include/asm/mach-ip27/mmzone.h
diff --git a/trunk/include/asm-mips/mach-ip27/spaces.h b/trunk/arch/mips/include/asm/mach-ip27/spaces.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/spaces.h
rename to trunk/arch/mips/include/asm/mach-ip27/spaces.h
diff --git a/trunk/include/asm-mips/mach-ip27/topology.h b/trunk/arch/mips/include/asm/mach-ip27/topology.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/topology.h
rename to trunk/arch/mips/include/asm/mach-ip27/topology.h
diff --git a/trunk/include/asm-mips/mach-ip27/war.h b/trunk/arch/mips/include/asm/mach-ip27/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip27/war.h
rename to trunk/arch/mips/include/asm/mach-ip27/war.h
diff --git a/trunk/include/asm-mips/mach-ip28/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip28/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-ip28/ds1286.h b/trunk/arch/mips/include/asm/mach-ip28/ds1286.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip28/ds1286.h
rename to trunk/arch/mips/include/asm/mach-ip28/ds1286.h
diff --git a/trunk/include/asm-mips/mach-ip28/spaces.h b/trunk/arch/mips/include/asm/mach-ip28/spaces.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip28/spaces.h
rename to trunk/arch/mips/include/asm/mach-ip28/spaces.h
diff --git a/trunk/include/asm-mips/mach-ip28/war.h b/trunk/arch/mips/include/asm/mach-ip28/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip28/war.h
rename to trunk/arch/mips/include/asm/mach-ip28/war.h
diff --git a/trunk/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-ip32/dma-coherence.h b/trunk/arch/mips/include/asm/mach-ip32/dma-coherence.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/dma-coherence.h
rename to trunk/arch/mips/include/asm/mach-ip32/dma-coherence.h
diff --git a/trunk/include/asm-mips/mach-ip32/kmalloc.h b/trunk/arch/mips/include/asm/mach-ip32/kmalloc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/kmalloc.h
rename to trunk/arch/mips/include/asm/mach-ip32/kmalloc.h
diff --git a/trunk/include/asm-mips/mach-ip32/mangle-port.h b/trunk/arch/mips/include/asm/mach-ip32/mangle-port.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/mangle-port.h
rename to trunk/arch/mips/include/asm/mach-ip32/mangle-port.h
diff --git a/trunk/include/asm-mips/mach-ip32/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-ip32/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-ip32/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-ip32/war.h b/trunk/arch/mips/include/asm/mach-ip32/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-ip32/war.h
rename to trunk/arch/mips/include/asm/mach-ip32/war.h
diff --git a/trunk/include/asm-mips/mach-jazz/dma-coherence.h b/trunk/arch/mips/include/asm/mach-jazz/dma-coherence.h
similarity index 100%
rename from trunk/include/asm-mips/mach-jazz/dma-coherence.h
rename to trunk/arch/mips/include/asm/mach-jazz/dma-coherence.h
diff --git a/trunk/include/asm-mips/mach-jazz/floppy.h b/trunk/arch/mips/include/asm/mach-jazz/floppy.h
similarity index 100%
rename from trunk/include/asm-mips/mach-jazz/floppy.h
rename to trunk/arch/mips/include/asm/mach-jazz/floppy.h
diff --git a/trunk/include/asm-mips/mach-jazz/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-jazz/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-jazz/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-jazz/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-jazz/war.h b/trunk/arch/mips/include/asm/mach-jazz/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-jazz/war.h
rename to trunk/arch/mips/include/asm/mach-jazz/war.h
diff --git a/trunk/include/asm-mips/mach-lasat/irq.h b/trunk/arch/mips/include/asm/mach-lasat/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lasat/irq.h
rename to trunk/arch/mips/include/asm/mach-lasat/irq.h
diff --git a/trunk/include/asm-mips/mach-lasat/mach-gt64120.h b/trunk/arch/mips/include/asm/mach-lasat/mach-gt64120.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lasat/mach-gt64120.h
rename to trunk/arch/mips/include/asm/mach-lasat/mach-gt64120.h
diff --git a/trunk/include/asm-mips/mach-lasat/war.h b/trunk/arch/mips/include/asm/mach-lasat/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lasat/war.h
rename to trunk/arch/mips/include/asm/mach-lasat/war.h
diff --git a/trunk/include/asm-mips/mach-lemote/dma-coherence.h b/trunk/arch/mips/include/asm/mach-lemote/dma-coherence.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lemote/dma-coherence.h
rename to trunk/arch/mips/include/asm/mach-lemote/dma-coherence.h
diff --git a/trunk/include/asm-mips/mach-lemote/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-lemote/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lemote/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-lemote/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-lemote/war.h b/trunk/arch/mips/include/asm/mach-lemote/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-lemote/war.h
rename to trunk/arch/mips/include/asm/mach-lemote/war.h
diff --git a/trunk/include/asm-mips/mach-malta/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-malta/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-malta/irq.h b/trunk/arch/mips/include/asm/mach-malta/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/irq.h
rename to trunk/arch/mips/include/asm/mach-malta/irq.h
diff --git a/trunk/include/asm-mips/mach-malta/kernel-entry-init.h b/trunk/arch/mips/include/asm/mach-malta/kernel-entry-init.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/kernel-entry-init.h
rename to trunk/arch/mips/include/asm/mach-malta/kernel-entry-init.h
diff --git a/trunk/include/asm-mips/mach-malta/mach-gt64120.h b/trunk/arch/mips/include/asm/mach-malta/mach-gt64120.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/mach-gt64120.h
rename to trunk/arch/mips/include/asm/mach-malta/mach-gt64120.h
diff --git a/trunk/include/asm-mips/mach-malta/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-malta/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-malta/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-malta/war.h b/trunk/arch/mips/include/asm/mach-malta/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-malta/war.h
rename to trunk/arch/mips/include/asm/mach-malta/war.h
diff --git a/trunk/include/asm-mips/mach-mipssim/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-mipssim/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-mipssim/war.h b/trunk/arch/mips/include/asm/mach-mipssim/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-mipssim/war.h
rename to trunk/arch/mips/include/asm/mach-mipssim/war.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-pb1x00/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1000.h b/trunk/arch/mips/include/asm/mach-pb1x00/pb1000.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/pb1000.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/pb1000.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1100.h b/trunk/arch/mips/include/asm/mach-pb1x00/pb1100.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/pb1100.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/pb1100.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1200.h b/trunk/arch/mips/include/asm/mach-pb1x00/pb1200.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/pb1200.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/pb1200.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1500.h b/trunk/arch/mips/include/asm/mach-pb1x00/pb1500.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/pb1500.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/pb1500.h
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1550.h b/trunk/arch/mips/include/asm/mach-pb1x00/pb1550.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pb1x00/pb1550.h
rename to trunk/arch/mips/include/asm/mach-pb1x00/pb1550.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/cm.h b/trunk/arch/mips/include/asm/mach-pnx8550/cm.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/cm.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/cm.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/glb.h b/trunk/arch/mips/include/asm/mach-pnx8550/glb.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/glb.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/glb.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/int.h b/trunk/arch/mips/include/asm/mach-pnx8550/int.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/int.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/int.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/kernel-entry-init.h b/trunk/arch/mips/include/asm/mach-pnx8550/kernel-entry-init.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/kernel-entry-init.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/kernel-entry-init.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/nand.h b/trunk/arch/mips/include/asm/mach-pnx8550/nand.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/nand.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/nand.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/pci.h b/trunk/arch/mips/include/asm/mach-pnx8550/pci.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/pci.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/pci.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/uart.h b/trunk/arch/mips/include/asm/mach-pnx8550/uart.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/uart.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/uart.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/usb.h b/trunk/arch/mips/include/asm/mach-pnx8550/usb.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/usb.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/usb.h
diff --git a/trunk/include/asm-mips/mach-pnx8550/war.h b/trunk/arch/mips/include/asm/mach-pnx8550/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-pnx8550/war.h
rename to trunk/arch/mips/include/asm/mach-pnx8550/war.h
diff --git a/trunk/include/asm-mips/mach-rc32434/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-rc32434/ddr.h b/trunk/arch/mips/include/asm/mach-rc32434/ddr.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/ddr.h
rename to trunk/arch/mips/include/asm/mach-rc32434/ddr.h
diff --git a/trunk/include/asm-mips/mach-rc32434/dma.h b/trunk/arch/mips/include/asm/mach-rc32434/dma.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/dma.h
rename to trunk/arch/mips/include/asm/mach-rc32434/dma.h
diff --git a/trunk/include/asm-mips/mach-rc32434/dma_v.h b/trunk/arch/mips/include/asm/mach-rc32434/dma_v.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/dma_v.h
rename to trunk/arch/mips/include/asm/mach-rc32434/dma_v.h
diff --git a/trunk/include/asm-mips/mach-rc32434/eth.h b/trunk/arch/mips/include/asm/mach-rc32434/eth.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/eth.h
rename to trunk/arch/mips/include/asm/mach-rc32434/eth.h
diff --git a/trunk/include/asm-mips/mach-rc32434/gpio.h b/trunk/arch/mips/include/asm/mach-rc32434/gpio.h
similarity index 61%
rename from trunk/include/asm-mips/mach-rc32434/gpio.h
rename to trunk/arch/mips/include/asm/mach-rc32434/gpio.h
index f946f5f45bbb..c8e554eafce3 100644
--- a/trunk/include/asm-mips/mach-rc32434/gpio.h
+++ b/trunk/arch/mips/include/asm/mach-rc32434/gpio.h
@@ -14,6 +14,16 @@
#define _RC32434_GPIO_H_
#include
+#include
+
+#define NR_BUILTIN_GPIO 32
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep __gpio_cansleep
+
+#define gpio_to_irq(gpio) (8 + 4 * 32 + gpio)
+#define irq_to_gpio(irq) (irq - (8 + 4 * 32))
struct rb532_gpio_reg {
u32 gpiofunc; /* GPIO Function Register
@@ -61,66 +71,18 @@ struct rb532_gpio_reg {
/* PCI messaging unit */
#define RC32434_PCI_MSU_GPIO (1 << 13)
+/* NAND GPIO signals */
+#define GPIO_RDY 8
+#define GPIO_WPX 9
+#define GPIO_ALE 10
+#define GPIO_CLE 11
+
+/* Compact Flash GPIO pin */
+#define CF_GPIO_NUM 13
extern void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val);
extern unsigned get_434_reg(unsigned reg_offs);
extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask);
extern unsigned char get_latch_u5(void);
-extern int rb532_gpio_get_value(unsigned gpio);
-extern void rb532_gpio_set_value(unsigned gpio, int value);
-extern int rb532_gpio_direction_input(unsigned gpio);
-extern int rb532_gpio_direction_output(unsigned gpio, int value);
-extern void rb532_gpio_set_int_level(unsigned gpio, int value);
-extern int rb532_gpio_get_int_level(unsigned gpio);
-extern void rb532_gpio_set_int_status(unsigned gpio, int value);
-extern int rb532_gpio_get_int_status(unsigned gpio);
-
-
-/* Wrappers for the arch-neutral GPIO API */
-
-static inline int gpio_request(unsigned gpio, const char *label)
-{
- /* Not yet implemented */
- return 0;
-}
-
-static inline void gpio_free(unsigned gpio)
-{
- /* Not yet implemented */
-}
-
-static inline int gpio_direction_input(unsigned gpio)
-{
- return rb532_gpio_direction_input(gpio);
-}
-
-static inline int gpio_direction_output(unsigned gpio, int value)
-{
- return rb532_gpio_direction_output(gpio, value);
-}
-
-static inline int gpio_get_value(unsigned gpio)
-{
- return rb532_gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned gpio, int value)
-{
- rb532_gpio_set_value(gpio, value);
-}
-
-static inline int gpio_to_irq(unsigned gpio)
-{
- return gpio;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
- return irq;
-}
-
-/* For cansleep */
-#include
-
#endif /* _RC32434_GPIO_H_ */
diff --git a/trunk/include/asm-mips/mach-rc32434/integ.h b/trunk/arch/mips/include/asm/mach-rc32434/integ.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/integ.h
rename to trunk/arch/mips/include/asm/mach-rc32434/integ.h
diff --git a/trunk/arch/mips/include/asm/mach-rc32434/irq.h b/trunk/arch/mips/include/asm/mach-rc32434/irq.h
new file mode 100644
index 000000000000..56738d8ec4e2
--- /dev/null
+++ b/trunk/arch/mips/include/asm/mach-rc32434/irq.h
@@ -0,0 +1,33 @@
+#ifndef __ASM_RC32434_IRQ_H
+#define __ASM_RC32434_IRQ_H
+
+#define NR_IRQS 256
+
+#include
+#include
+
+/* Interrupt Controller */
+#define IC_GROUP0_PEND (REGBASE + 0x38000)
+#define IC_GROUP0_MASK (REGBASE + 0x38008)
+#define IC_GROUP_OFFSET 0x0C
+
+#define NUM_INTR_GROUPS 5
+
+/* 16550 UARTs */
+#define GROUP0_IRQ_BASE 8 /* GRP2 IRQ numbers start here */
+ /* GRP3 IRQ numbers start here */
+#define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32)
+ /* GRP4 IRQ numbers start here */
+#define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32)
+ /* GRP5 IRQ numbers start here */
+#define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32)
+#define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32)
+
+#define UART0_IRQ (GROUP3_IRQ_BASE + 0)
+
+#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
+#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
+#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
+#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
+
+#endif /* __ASM_RC32434_IRQ_H */
diff --git a/trunk/include/asm-mips/mach-rc32434/pci.h b/trunk/arch/mips/include/asm/mach-rc32434/pci.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/pci.h
rename to trunk/arch/mips/include/asm/mach-rc32434/pci.h
diff --git a/trunk/include/asm-mips/mach-rc32434/prom.h b/trunk/arch/mips/include/asm/mach-rc32434/prom.h
similarity index 95%
rename from trunk/include/asm-mips/mach-rc32434/prom.h
rename to trunk/arch/mips/include/asm/mach-rc32434/prom.h
index 1d66ddcda89a..660707f1bcce 100644
--- a/trunk/include/asm-mips/mach-rc32434/prom.h
+++ b/trunk/arch/mips/include/asm/mach-rc32434/prom.h
@@ -28,14 +28,10 @@
#define PROM_ENTRY(x) (0xbfc00000 + ((x) * 8))
-#define GPIO_INIT_NOBUTTON ""
-#define GPIO_INIT_BUTTON " 2"
-
#define SR_NMI 0x00180000
#define SERIAL_SPEED_ENTRY 0x00000001
#define FREQ_TAG "HZ="
-#define GPIO_TAG "gpio="
#define KMAC_TAG "kmac="
#define MEM_TAG "mem="
#define BOARD_TAG "board="
diff --git a/trunk/include/asm-mips/mach-rc32434/rb.h b/trunk/arch/mips/include/asm/mach-rc32434/rb.h
similarity index 93%
rename from trunk/include/asm-mips/mach-rc32434/rb.h
rename to trunk/arch/mips/include/asm/mach-rc32434/rb.h
index e0a76e3ffea8..79e8ef67d0d3 100644
--- a/trunk/include/asm-mips/mach-rc32434/rb.h
+++ b/trunk/arch/mips/include/asm/mach-rc32434/rb.h
@@ -17,7 +17,10 @@
#include
-#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(0x18000000))
+#define REGBASE 0x18000000
+#define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
+#define UART0BASE 0x58000
+#define RST (1 << 15)
#define DEV0BASE 0x010000
#define DEV0MASK 0x010004
#define DEV0C 0x010008
diff --git a/trunk/arch/mips/include/asm/mach-rc32434/rc32434.h b/trunk/arch/mips/include/asm/mach-rc32434/rc32434.h
new file mode 100644
index 000000000000..fce25d4231fc
--- /dev/null
+++ b/trunk/arch/mips/include/asm/mach-rc32434/rc32434.h
@@ -0,0 +1,19 @@
+/*
+ * Definitions for IDT RC323434 CPU.
+ */
+
+#ifndef _ASM_RC32434_RC32434_H_
+#define _ASM_RC32434_RC32434_H_
+
+#include
+#include
+
+#define IDT_CLOCK_MULT 2
+
+/* cpu pipeline flush */
+static inline void rc32434_sync(void)
+{
+ __asm__ volatile ("sync");
+}
+
+#endif /* _ASM_RC32434_RC32434_H_ */
diff --git a/trunk/include/asm-mips/mach-rc32434/timer.h b/trunk/arch/mips/include/asm/mach-rc32434/timer.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/timer.h
rename to trunk/arch/mips/include/asm/mach-rc32434/timer.h
diff --git a/trunk/include/asm-mips/mach-rc32434/war.h b/trunk/arch/mips/include/asm/mach-rc32434/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rc32434/war.h
rename to trunk/arch/mips/include/asm/mach-rc32434/war.h
diff --git a/trunk/include/asm-mips/mach-rm/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rm/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-rm/mc146818rtc.h b/trunk/arch/mips/include/asm/mach-rm/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rm/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mach-rm/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mach-rm/war.h b/trunk/arch/mips/include/asm/mach-rm/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-rm/war.h
rename to trunk/arch/mips/include/asm/mach-rm/war.h
diff --git a/trunk/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-sibyte/war.h b/trunk/arch/mips/include/asm/mach-sibyte/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-sibyte/war.h
rename to trunk/arch/mips/include/asm/mach-sibyte/war.h
diff --git a/trunk/include/asm-mips/mach-tx39xx/ioremap.h b/trunk/arch/mips/include/asm/mach-tx39xx/ioremap.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx39xx/ioremap.h
rename to trunk/arch/mips/include/asm/mach-tx39xx/ioremap.h
diff --git a/trunk/include/asm-mips/mach-tx39xx/mangle-port.h b/trunk/arch/mips/include/asm/mach-tx39xx/mangle-port.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx39xx/mangle-port.h
rename to trunk/arch/mips/include/asm/mach-tx39xx/mangle-port.h
diff --git a/trunk/include/asm-mips/mach-tx39xx/war.h b/trunk/arch/mips/include/asm/mach-tx39xx/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx39xx/war.h
rename to trunk/arch/mips/include/asm/mach-tx39xx/war.h
diff --git a/trunk/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-tx49xx/ioremap.h b/trunk/arch/mips/include/asm/mach-tx49xx/ioremap.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx49xx/ioremap.h
rename to trunk/arch/mips/include/asm/mach-tx49xx/ioremap.h
diff --git a/trunk/include/asm-mips/mach-tx49xx/kmalloc.h b/trunk/arch/mips/include/asm/mach-tx49xx/kmalloc.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx49xx/kmalloc.h
rename to trunk/arch/mips/include/asm/mach-tx49xx/kmalloc.h
diff --git a/trunk/include/asm-mips/mach-tx49xx/war.h b/trunk/arch/mips/include/asm/mach-tx49xx/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-tx49xx/war.h
rename to trunk/arch/mips/include/asm/mach-tx49xx/war.h
diff --git a/trunk/include/asm-mips/mach-vr41xx/irq.h b/trunk/arch/mips/include/asm/mach-vr41xx/irq.h
similarity index 100%
rename from trunk/include/asm-mips/mach-vr41xx/irq.h
rename to trunk/arch/mips/include/asm/mach-vr41xx/irq.h
diff --git a/trunk/include/asm-mips/mach-vr41xx/war.h b/trunk/arch/mips/include/asm/mach-vr41xx/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-vr41xx/war.h
rename to trunk/arch/mips/include/asm/mach-vr41xx/war.h
diff --git a/trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h b/trunk/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h
similarity index 100%
rename from trunk/include/asm-mips/mach-wrppmc/mach-gt64120.h
rename to trunk/arch/mips/include/asm/mach-wrppmc/mach-gt64120.h
diff --git a/trunk/include/asm-mips/mach-wrppmc/war.h b/trunk/arch/mips/include/asm/mach-wrppmc/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-wrppmc/war.h
rename to trunk/arch/mips/include/asm/mach-wrppmc/war.h
diff --git a/trunk/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/trunk/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
similarity index 100%
rename from trunk/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
rename to trunk/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
diff --git a/trunk/include/asm-mips/mach-yosemite/war.h b/trunk/arch/mips/include/asm/mach-yosemite/war.h
similarity index 100%
rename from trunk/include/asm-mips/mach-yosemite/war.h
rename to trunk/arch/mips/include/asm/mach-yosemite/war.h
diff --git a/trunk/include/asm-mips/mc146818-time.h b/trunk/arch/mips/include/asm/mc146818-time.h
similarity index 100%
rename from trunk/include/asm-mips/mc146818-time.h
rename to trunk/arch/mips/include/asm/mc146818-time.h
diff --git a/trunk/include/asm-mips/mc146818rtc.h b/trunk/arch/mips/include/asm/mc146818rtc.h
similarity index 100%
rename from trunk/include/asm-mips/mc146818rtc.h
rename to trunk/arch/mips/include/asm/mc146818rtc.h
diff --git a/trunk/include/asm-mips/mips-boards/bonito64.h b/trunk/arch/mips/include/asm/mips-boards/bonito64.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/bonito64.h
rename to trunk/arch/mips/include/asm/mips-boards/bonito64.h
diff --git a/trunk/include/asm-mips/mips-boards/generic.h b/trunk/arch/mips/include/asm/mips-boards/generic.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/generic.h
rename to trunk/arch/mips/include/asm/mips-boards/generic.h
diff --git a/trunk/include/asm-mips/mips-boards/launch.h b/trunk/arch/mips/include/asm/mips-boards/launch.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/launch.h
rename to trunk/arch/mips/include/asm/mips-boards/launch.h
diff --git a/trunk/include/asm-mips/mips-boards/malta.h b/trunk/arch/mips/include/asm/mips-boards/malta.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/malta.h
rename to trunk/arch/mips/include/asm/mips-boards/malta.h
diff --git a/trunk/include/asm-mips/mips-boards/maltaint.h b/trunk/arch/mips/include/asm/mips-boards/maltaint.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/maltaint.h
rename to trunk/arch/mips/include/asm/mips-boards/maltaint.h
diff --git a/trunk/include/asm-mips/mips-boards/msc01_pci.h b/trunk/arch/mips/include/asm/mips-boards/msc01_pci.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/msc01_pci.h
rename to trunk/arch/mips/include/asm/mips-boards/msc01_pci.h
diff --git a/trunk/include/asm-mips/mips-boards/piix4.h b/trunk/arch/mips/include/asm/mips-boards/piix4.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/piix4.h
rename to trunk/arch/mips/include/asm/mips-boards/piix4.h
diff --git a/trunk/include/asm-mips/mips-boards/prom.h b/trunk/arch/mips/include/asm/mips-boards/prom.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/prom.h
rename to trunk/arch/mips/include/asm/mips-boards/prom.h
diff --git a/trunk/include/asm-mips/mips-boards/sim.h b/trunk/arch/mips/include/asm/mips-boards/sim.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/sim.h
rename to trunk/arch/mips/include/asm/mips-boards/sim.h
diff --git a/trunk/include/asm-mips/mips-boards/simint.h b/trunk/arch/mips/include/asm/mips-boards/simint.h
similarity index 100%
rename from trunk/include/asm-mips/mips-boards/simint.h
rename to trunk/arch/mips/include/asm/mips-boards/simint.h
diff --git a/trunk/include/asm-mips/mips_mt.h b/trunk/arch/mips/include/asm/mips_mt.h
similarity index 100%
rename from trunk/include/asm-mips/mips_mt.h
rename to trunk/arch/mips/include/asm/mips_mt.h
diff --git a/trunk/include/asm-mips/mipsmtregs.h b/trunk/arch/mips/include/asm/mipsmtregs.h
similarity index 100%
rename from trunk/include/asm-mips/mipsmtregs.h
rename to trunk/arch/mips/include/asm/mipsmtregs.h
diff --git a/trunk/include/asm-mips/mipsprom.h b/trunk/arch/mips/include/asm/mipsprom.h
similarity index 100%
rename from trunk/include/asm-mips/mipsprom.h
rename to trunk/arch/mips/include/asm/mipsprom.h
diff --git a/trunk/include/asm-mips/mipsregs.h b/trunk/arch/mips/include/asm/mipsregs.h
similarity index 100%
rename from trunk/include/asm-mips/mipsregs.h
rename to trunk/arch/mips/include/asm/mipsregs.h
diff --git a/trunk/include/asm-mips/mman.h b/trunk/arch/mips/include/asm/mman.h
similarity index 100%
rename from trunk/include/asm-mips/mman.h
rename to trunk/arch/mips/include/asm/mman.h
diff --git a/trunk/include/asm-mips/mmu.h b/trunk/arch/mips/include/asm/mmu.h
similarity index 100%
rename from trunk/include/asm-mips/mmu.h
rename to trunk/arch/mips/include/asm/mmu.h
diff --git a/trunk/include/asm-mips/mmu_context.h b/trunk/arch/mips/include/asm/mmu_context.h
similarity index 97%
rename from trunk/include/asm-mips/mmu_context.h
rename to trunk/arch/mips/include/asm/mmu_context.h
index 0c4f245eaeb2..d7f3eb03ad12 100644
--- a/trunk/include/asm-mips/mmu_context.h
+++ b/trunk/arch/mips/include/asm/mmu_context.h
@@ -220,8 +220,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
oldasid = read_c0_entryhi() & ASID_MASK;
if(smtc_live_asid[mytlb][oldasid]) {
smtc_live_asid[mytlb][oldasid] &= ~(0x1 << cpu);
- if(smtc_live_asid[mytlb][oldasid] == 0)
- smtc_flush_tlb_asid(oldasid);
+ if(smtc_live_asid[mytlb][oldasid] == 0)
+ smtc_flush_tlb_asid(oldasid);
}
/* See comments for similar code above */
write_c0_entryhi((read_c0_entryhi() & ~HW_ASID_MASK) |
@@ -285,8 +285,8 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
/* SMTC shares the TLB (and ASIDs) across VPEs */
for_each_online_cpu(i) {
- if((smtc_status & SMTC_TLB_SHARED)
- || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id))
+ if((smtc_status & SMTC_TLB_SHARED)
+ || (cpu_data[i].vpe_id == cpu_data[cpu].vpe_id))
cpu_context(i, mm) = 0;
}
#endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/trunk/include/asm-mips/mmzone.h b/trunk/arch/mips/include/asm/mmzone.h
similarity index 100%
rename from trunk/include/asm-mips/mmzone.h
rename to trunk/arch/mips/include/asm/mmzone.h
diff --git a/trunk/include/asm-mips/module.h b/trunk/arch/mips/include/asm/module.h
similarity index 100%
rename from trunk/include/asm-mips/module.h
rename to trunk/arch/mips/include/asm/module.h
diff --git a/trunk/include/asm-mips/msc01_ic.h b/trunk/arch/mips/include/asm/msc01_ic.h
similarity index 100%
rename from trunk/include/asm-mips/msc01_ic.h
rename to trunk/arch/mips/include/asm/msc01_ic.h
diff --git a/trunk/include/asm-mips/msgbuf.h b/trunk/arch/mips/include/asm/msgbuf.h
similarity index 100%
rename from trunk/include/asm-mips/msgbuf.h
rename to trunk/arch/mips/include/asm/msgbuf.h
diff --git a/trunk/include/asm-mips/mutex.h b/trunk/arch/mips/include/asm/mutex.h
similarity index 100%
rename from trunk/include/asm-mips/mutex.h
rename to trunk/arch/mips/include/asm/mutex.h
diff --git a/trunk/include/asm-mips/nile4.h b/trunk/arch/mips/include/asm/nile4.h
similarity index 100%
rename from trunk/include/asm-mips/nile4.h
rename to trunk/arch/mips/include/asm/nile4.h
diff --git a/trunk/include/asm-mips/paccess.h b/trunk/arch/mips/include/asm/paccess.h
similarity index 100%
rename from trunk/include/asm-mips/paccess.h
rename to trunk/arch/mips/include/asm/paccess.h
diff --git a/trunk/include/asm-mips/page.h b/trunk/arch/mips/include/asm/page.h
similarity index 100%
rename from trunk/include/asm-mips/page.h
rename to trunk/arch/mips/include/asm/page.h
diff --git a/trunk/include/asm-mips/param.h b/trunk/arch/mips/include/asm/param.h
similarity index 100%
rename from trunk/include/asm-mips/param.h
rename to trunk/arch/mips/include/asm/param.h
diff --git a/trunk/include/asm-mips/parport.h b/trunk/arch/mips/include/asm/parport.h
similarity index 100%
rename from trunk/include/asm-mips/parport.h
rename to trunk/arch/mips/include/asm/parport.h
diff --git a/trunk/include/asm-mips/pci.h b/trunk/arch/mips/include/asm/pci.h
similarity index 100%
rename from trunk/include/asm-mips/pci.h
rename to trunk/arch/mips/include/asm/pci.h
diff --git a/trunk/include/asm-mips/pci/bridge.h b/trunk/arch/mips/include/asm/pci/bridge.h
similarity index 100%
rename from trunk/include/asm-mips/pci/bridge.h
rename to trunk/arch/mips/include/asm/pci/bridge.h
diff --git a/trunk/include/asm-mips/percpu.h b/trunk/arch/mips/include/asm/percpu.h
similarity index 100%
rename from trunk/include/asm-mips/percpu.h
rename to trunk/arch/mips/include/asm/percpu.h
diff --git a/trunk/include/asm-mips/pgalloc.h b/trunk/arch/mips/include/asm/pgalloc.h
similarity index 100%
rename from trunk/include/asm-mips/pgalloc.h
rename to trunk/arch/mips/include/asm/pgalloc.h
diff --git a/trunk/include/asm-mips/pgtable-32.h b/trunk/arch/mips/include/asm/pgtable-32.h
similarity index 100%
rename from trunk/include/asm-mips/pgtable-32.h
rename to trunk/arch/mips/include/asm/pgtable-32.h
diff --git a/trunk/include/asm-mips/pgtable-64.h b/trunk/arch/mips/include/asm/pgtable-64.h
similarity index 100%
rename from trunk/include/asm-mips/pgtable-64.h
rename to trunk/arch/mips/include/asm/pgtable-64.h
diff --git a/trunk/include/asm-mips/pgtable-bits.h b/trunk/arch/mips/include/asm/pgtable-bits.h
similarity index 100%
rename from trunk/include/asm-mips/pgtable-bits.h
rename to trunk/arch/mips/include/asm/pgtable-bits.h
diff --git a/trunk/include/asm-mips/pgtable.h b/trunk/arch/mips/include/asm/pgtable.h
similarity index 100%
rename from trunk/include/asm-mips/pgtable.h
rename to trunk/arch/mips/include/asm/pgtable.h
diff --git a/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/gpio.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/gpio.h
new file mode 100644
index 000000000000..ebdbab973e41
--- /dev/null
+++ b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/gpio.h
@@ -0,0 +1,46 @@
+/*
+ * include/asm-mips/pmc-sierra/msp71xx/gpio.h
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * @author Patrick Glass
+ */
+
+#ifndef __PMC_MSP71XX_GPIO_H
+#define __PMC_MSP71XX_GPIO_H
+
+/* Max number of gpio's is 28 on chip plus 3 banks of I2C IO Expanders */
+#define ARCH_NR_GPIOS (28 + (3 * 8))
+
+/* new generic GPIO API - see Documentation/gpio.txt */
+#include
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep __gpio_cansleep
+
+/* Setup calls for the gpio and gpio extended */
+extern void msp71xx_init_gpio(void);
+extern void msp71xx_init_gpio_extended(void);
+extern int msp71xx_set_output_drive(unsigned gpio, int value);
+
+/* Custom output drive functionss */
+static inline int gpio_set_output_drive(unsigned gpio, int value)
+{
+ return msp71xx_set_output_drive(gpio, value);
+}
+
+/* IRQ's are not supported for gpio lines */
+static inline int gpio_to_irq(unsigned gpio)
+{
+ return -EINVAL;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+ return -EINVAL;
+}
+
+#endif /* __PMC_MSP71XX_GPIO_H */
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_cic_int.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_cic_int.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_cic_int.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_cic_int.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_int.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_int.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_int.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_int.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_pci.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_pci.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_pci.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_pci.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_prom.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_prom.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_prom.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_prom.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_regops.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_regops.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regops.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_regs.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/msp_slp_int.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_slp_int.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/msp_slp_int.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/msp_slp_int.h
diff --git a/trunk/include/asm-mips/pmc-sierra/msp71xx/war.h b/trunk/arch/mips/include/asm/pmc-sierra/msp71xx/war.h
similarity index 100%
rename from trunk/include/asm-mips/pmc-sierra/msp71xx/war.h
rename to trunk/arch/mips/include/asm/pmc-sierra/msp71xx/war.h
diff --git a/trunk/include/asm-mips/pmon.h b/trunk/arch/mips/include/asm/pmon.h
similarity index 100%
rename from trunk/include/asm-mips/pmon.h
rename to trunk/arch/mips/include/asm/pmon.h
diff --git a/trunk/include/asm-mips/poll.h b/trunk/arch/mips/include/asm/poll.h
similarity index 100%
rename from trunk/include/asm-mips/poll.h
rename to trunk/arch/mips/include/asm/poll.h
diff --git a/trunk/include/asm-mips/posix_types.h b/trunk/arch/mips/include/asm/posix_types.h
similarity index 100%
rename from trunk/include/asm-mips/posix_types.h
rename to trunk/arch/mips/include/asm/posix_types.h
diff --git a/trunk/include/asm-mips/prefetch.h b/trunk/arch/mips/include/asm/prefetch.h
similarity index 100%
rename from trunk/include/asm-mips/prefetch.h
rename to trunk/arch/mips/include/asm/prefetch.h
diff --git a/trunk/include/asm-mips/processor.h b/trunk/arch/mips/include/asm/processor.h
similarity index 92%
rename from trunk/include/asm-mips/processor.h
rename to trunk/arch/mips/include/asm/processor.h
index a1e4453469f9..18ee58e39445 100644
--- a/trunk/include/asm-mips/processor.h
+++ b/trunk/arch/mips/include/asm/processor.h
@@ -105,6 +105,19 @@ struct mips_dsp_state {
{0,} \
}
+struct mips3264_watch_reg_state {
+ /* The width of watchlo is 32 in a 32 bit kernel and 64 in a
+ 64 bit kernel. We use unsigned long as it has the same
+ property. */
+ unsigned long watchlo[NUM_WATCH_REGS];
+ /* Only the mask and IRW bits from watchhi. */
+ u16 watchhi[NUM_WATCH_REGS];
+};
+
+union mips_watch_reg_state {
+ struct mips3264_watch_reg_state mips3264;
+};
+
typedef struct {
unsigned long seg;
} mm_segment_t;
@@ -137,6 +150,9 @@ struct thread_struct {
/* Saved state of the DSP ASE, if available. */
struct mips_dsp_state dsp;
+ /* Saved watch register state, if available. */
+ union mips_watch_reg_state watch;
+
/* Other stuff associated with the thread. */
unsigned long cp0_badvaddr; /* Last user fault */
unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
@@ -192,6 +208,10 @@ struct thread_struct {
.dspr = {0, }, \
.dspcontrol = 0, \
}, \
+ /* \
+ * saved watch register stuff \
+ */ \
+ .watch = {{{0,},},}, \
/* \
* Other stuff associated with the process \
*/ \
diff --git a/trunk/include/asm-mips/ptrace.h b/trunk/arch/mips/include/asm/ptrace.h
similarity index 63%
rename from trunk/include/asm-mips/ptrace.h
rename to trunk/arch/mips/include/asm/ptrace.h
index 786f7e3c99bc..9c22571b160d 100644
--- a/trunk/include/asm-mips/ptrace.h
+++ b/trunk/arch/mips/include/asm/ptrace.h
@@ -9,6 +9,9 @@
#ifndef _ASM_PTRACE_H
#define _ASM_PTRACE_H
+#ifdef CONFIG_64BIT
+#define __ARCH_WANT_COMPAT_SYS_PTRACE
+#endif
/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
#define FPR_BASE 32
@@ -71,11 +74,63 @@ struct pt_regs {
#define PTRACE_POKEDATA_3264 0xc3
#define PTRACE_GET_THREAD_AREA_3264 0xc4
+/* Read and write watchpoint registers. */
+enum pt_watch_style {
+ pt_watch_style_mips32,
+ pt_watch_style_mips64
+};
+struct mips32_watch_regs {
+ uint32_t watchlo[8];
+ /* Lower 16 bits of watchhi. */
+ uint16_t watchhi[8];
+ /* Valid mask and I R W bits.
+ * bit 0 -- 1 if W bit is usable.
+ * bit 1 -- 1 if R bit is usable.
+ * bit 2 -- 1 if I bit is usable.
+ * bits 3 - 11 -- Valid watchhi mask bits.
+ */
+ uint16_t watch_masks[8];
+ /* The number of valid watch register pairs. */
+ uint32_t num_valid;
+} __attribute__((aligned(8)));
+
+struct mips64_watch_regs {
+ uint64_t watchlo[8];
+ uint16_t watchhi[8];
+ uint16_t watch_masks[8];
+ uint32_t num_valid;
+} __attribute__((aligned(8)));
+
+struct pt_watch_regs {
+ enum pt_watch_style style;
+ union {
+ struct mips32_watch_regs mips32;
+ struct mips32_watch_regs mips64;
+ };
+};
+
+#define PTRACE_GET_WATCH_REGS 0xd0
+#define PTRACE_SET_WATCH_REGS 0xd1
+
#ifdef __KERNEL__
+#include
#include
#include
+struct task_struct;
+
+extern int ptrace_getregs(struct task_struct *child, __s64 __user *data);
+extern int ptrace_setregs(struct task_struct *child, __s64 __user *data);
+
+extern int ptrace_getfpregs(struct task_struct *child, __u32 __user *data);
+extern int ptrace_setfpregs(struct task_struct *child, __u32 __user *data);
+
+extern int ptrace_get_watch_regs(struct task_struct *child,
+ struct pt_watch_regs __user *addr);
+extern int ptrace_set_watch_regs(struct task_struct *child,
+ struct pt_watch_regs __user *addr);
+
/*
* Does the process account for user or for system time?
*/
diff --git a/trunk/include/asm-mips/r4k-timer.h b/trunk/arch/mips/include/asm/r4k-timer.h
similarity index 100%
rename from trunk/include/asm-mips/r4k-timer.h
rename to trunk/arch/mips/include/asm/r4k-timer.h
diff --git a/trunk/include/asm-mips/r4kcache.h b/trunk/arch/mips/include/asm/r4kcache.h
similarity index 100%
rename from trunk/include/asm-mips/r4kcache.h
rename to trunk/arch/mips/include/asm/r4kcache.h
diff --git a/trunk/include/asm-mips/reboot.h b/trunk/arch/mips/include/asm/reboot.h
similarity index 100%
rename from trunk/include/asm-mips/reboot.h
rename to trunk/arch/mips/include/asm/reboot.h
diff --git a/trunk/include/asm-mips/reg.h b/trunk/arch/mips/include/asm/reg.h
similarity index 100%
rename from trunk/include/asm-mips/reg.h
rename to trunk/arch/mips/include/asm/reg.h
diff --git a/trunk/include/asm-mips/regdef.h b/trunk/arch/mips/include/asm/regdef.h
similarity index 100%
rename from trunk/include/asm-mips/regdef.h
rename to trunk/arch/mips/include/asm/regdef.h
diff --git a/trunk/include/asm-mips/resource.h b/trunk/arch/mips/include/asm/resource.h
similarity index 100%
rename from trunk/include/asm-mips/resource.h
rename to trunk/arch/mips/include/asm/resource.h
diff --git a/trunk/include/asm-mips/rm9k-ocd.h b/trunk/arch/mips/include/asm/rm9k-ocd.h
similarity index 100%
rename from trunk/include/asm-mips/rm9k-ocd.h
rename to trunk/arch/mips/include/asm/rm9k-ocd.h
diff --git a/trunk/include/asm-mips/rtlx.h b/trunk/arch/mips/include/asm/rtlx.h
similarity index 100%
rename from trunk/include/asm-mips/rtlx.h
rename to trunk/arch/mips/include/asm/rtlx.h
diff --git a/trunk/include/asm-mips/scatterlist.h b/trunk/arch/mips/include/asm/scatterlist.h
similarity index 100%
rename from trunk/include/asm-mips/scatterlist.h
rename to trunk/arch/mips/include/asm/scatterlist.h
diff --git a/trunk/include/asm-mips/seccomp.h b/trunk/arch/mips/include/asm/seccomp.h
similarity index 100%
rename from trunk/include/asm-mips/seccomp.h
rename to trunk/arch/mips/include/asm/seccomp.h
diff --git a/trunk/include/asm-mips/sections.h b/trunk/arch/mips/include/asm/sections.h
similarity index 100%
rename from trunk/include/asm-mips/sections.h
rename to trunk/arch/mips/include/asm/sections.h
diff --git a/trunk/include/asm-mips/segment.h b/trunk/arch/mips/include/asm/segment.h
similarity index 100%
rename from trunk/include/asm-mips/segment.h
rename to trunk/arch/mips/include/asm/segment.h
diff --git a/trunk/include/asm-mips/sembuf.h b/trunk/arch/mips/include/asm/sembuf.h
similarity index 100%
rename from trunk/include/asm-mips/sembuf.h
rename to trunk/arch/mips/include/asm/sembuf.h
diff --git a/trunk/include/asm-mips/serial.h b/trunk/arch/mips/include/asm/serial.h
similarity index 100%
rename from trunk/include/asm-mips/serial.h
rename to trunk/arch/mips/include/asm/serial.h
diff --git a/trunk/include/asm-mips/setup.h b/trunk/arch/mips/include/asm/setup.h
similarity index 100%
rename from trunk/include/asm-mips/setup.h
rename to trunk/arch/mips/include/asm/setup.h
diff --git a/trunk/include/asm-mips/sgi/gio.h b/trunk/arch/mips/include/asm/sgi/gio.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/gio.h
rename to trunk/arch/mips/include/asm/sgi/gio.h
diff --git a/trunk/include/asm-mips/sgi/hpc3.h b/trunk/arch/mips/include/asm/sgi/hpc3.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/hpc3.h
rename to trunk/arch/mips/include/asm/sgi/hpc3.h
diff --git a/trunk/include/asm-mips/sgi/ioc.h b/trunk/arch/mips/include/asm/sgi/ioc.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/ioc.h
rename to trunk/arch/mips/include/asm/sgi/ioc.h
diff --git a/trunk/include/asm-mips/sgi/ip22.h b/trunk/arch/mips/include/asm/sgi/ip22.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/ip22.h
rename to trunk/arch/mips/include/asm/sgi/ip22.h
diff --git a/trunk/include/asm-mips/sgi/mc.h b/trunk/arch/mips/include/asm/sgi/mc.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/mc.h
rename to trunk/arch/mips/include/asm/sgi/mc.h
diff --git a/trunk/include/asm-mips/sgi/pi1.h b/trunk/arch/mips/include/asm/sgi/pi1.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/pi1.h
rename to trunk/arch/mips/include/asm/sgi/pi1.h
diff --git a/trunk/include/asm-mips/sgi/seeq.h b/trunk/arch/mips/include/asm/sgi/seeq.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/seeq.h
rename to trunk/arch/mips/include/asm/sgi/seeq.h
diff --git a/trunk/include/asm-mips/sgi/sgi.h b/trunk/arch/mips/include/asm/sgi/sgi.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/sgi.h
rename to trunk/arch/mips/include/asm/sgi/sgi.h
diff --git a/trunk/include/asm-mips/sgi/wd.h b/trunk/arch/mips/include/asm/sgi/wd.h
similarity index 100%
rename from trunk/include/asm-mips/sgi/wd.h
rename to trunk/arch/mips/include/asm/sgi/wd.h
diff --git a/trunk/include/asm-mips/sgialib.h b/trunk/arch/mips/include/asm/sgialib.h
similarity index 100%
rename from trunk/include/asm-mips/sgialib.h
rename to trunk/arch/mips/include/asm/sgialib.h
diff --git a/trunk/include/asm-mips/sgiarcs.h b/trunk/arch/mips/include/asm/sgiarcs.h
similarity index 100%
rename from trunk/include/asm-mips/sgiarcs.h
rename to trunk/arch/mips/include/asm/sgiarcs.h
diff --git a/trunk/include/asm-mips/sgidefs.h b/trunk/arch/mips/include/asm/sgidefs.h
similarity index 100%
rename from trunk/include/asm-mips/sgidefs.h
rename to trunk/arch/mips/include/asm/sgidefs.h
diff --git a/trunk/include/asm-mips/shmbuf.h b/trunk/arch/mips/include/asm/shmbuf.h
similarity index 100%
rename from trunk/include/asm-mips/shmbuf.h
rename to trunk/arch/mips/include/asm/shmbuf.h
diff --git a/trunk/include/asm-mips/shmparam.h b/trunk/arch/mips/include/asm/shmparam.h
similarity index 100%
rename from trunk/include/asm-mips/shmparam.h
rename to trunk/arch/mips/include/asm/shmparam.h
diff --git a/trunk/include/asm-mips/sibyte/bcm1480_int.h b/trunk/arch/mips/include/asm/sibyte/bcm1480_int.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bcm1480_int.h
rename to trunk/arch/mips/include/asm/sibyte/bcm1480_int.h
diff --git a/trunk/include/asm-mips/sibyte/bcm1480_l2c.h b/trunk/arch/mips/include/asm/sibyte/bcm1480_l2c.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bcm1480_l2c.h
rename to trunk/arch/mips/include/asm/sibyte/bcm1480_l2c.h
diff --git a/trunk/include/asm-mips/sibyte/bcm1480_mc.h b/trunk/arch/mips/include/asm/sibyte/bcm1480_mc.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bcm1480_mc.h
rename to trunk/arch/mips/include/asm/sibyte/bcm1480_mc.h
diff --git a/trunk/include/asm-mips/sibyte/bcm1480_regs.h b/trunk/arch/mips/include/asm/sibyte/bcm1480_regs.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bcm1480_regs.h
rename to trunk/arch/mips/include/asm/sibyte/bcm1480_regs.h
diff --git a/trunk/include/asm-mips/sibyte/bcm1480_scd.h b/trunk/arch/mips/include/asm/sibyte/bcm1480_scd.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bcm1480_scd.h
rename to trunk/arch/mips/include/asm/sibyte/bcm1480_scd.h
diff --git a/trunk/include/asm-mips/sibyte/bigsur.h b/trunk/arch/mips/include/asm/sibyte/bigsur.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/bigsur.h
rename to trunk/arch/mips/include/asm/sibyte/bigsur.h
diff --git a/trunk/include/asm-mips/sibyte/board.h b/trunk/arch/mips/include/asm/sibyte/board.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/board.h
rename to trunk/arch/mips/include/asm/sibyte/board.h
diff --git a/trunk/include/asm-mips/sibyte/carmel.h b/trunk/arch/mips/include/asm/sibyte/carmel.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/carmel.h
rename to trunk/arch/mips/include/asm/sibyte/carmel.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250.h b/trunk/arch/mips/include/asm/sibyte/sb1250.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_defs.h b/trunk/arch/mips/include/asm/sibyte/sb1250_defs.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_defs.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_defs.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_dma.h b/trunk/arch/mips/include/asm/sibyte/sb1250_dma.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_dma.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_dma.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_genbus.h b/trunk/arch/mips/include/asm/sibyte/sb1250_genbus.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_genbus.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_genbus.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_int.h b/trunk/arch/mips/include/asm/sibyte/sb1250_int.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_int.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_int.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_l2c.h b/trunk/arch/mips/include/asm/sibyte/sb1250_l2c.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_l2c.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_l2c.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_ldt.h b/trunk/arch/mips/include/asm/sibyte/sb1250_ldt.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_ldt.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_ldt.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_mac.h b/trunk/arch/mips/include/asm/sibyte/sb1250_mac.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_mac.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_mac.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_mc.h b/trunk/arch/mips/include/asm/sibyte/sb1250_mc.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_mc.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_mc.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_regs.h b/trunk/arch/mips/include/asm/sibyte/sb1250_regs.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_regs.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_regs.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_scd.h b/trunk/arch/mips/include/asm/sibyte/sb1250_scd.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_scd.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_scd.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_smbus.h b/trunk/arch/mips/include/asm/sibyte/sb1250_smbus.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_smbus.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_smbus.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_syncser.h b/trunk/arch/mips/include/asm/sibyte/sb1250_syncser.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_syncser.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_syncser.h
diff --git a/trunk/include/asm-mips/sibyte/sb1250_uart.h b/trunk/arch/mips/include/asm/sibyte/sb1250_uart.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sb1250_uart.h
rename to trunk/arch/mips/include/asm/sibyte/sb1250_uart.h
diff --git a/trunk/include/asm-mips/sibyte/sentosa.h b/trunk/arch/mips/include/asm/sibyte/sentosa.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/sentosa.h
rename to trunk/arch/mips/include/asm/sibyte/sentosa.h
diff --git a/trunk/include/asm-mips/sibyte/swarm.h b/trunk/arch/mips/include/asm/sibyte/swarm.h
similarity index 100%
rename from trunk/include/asm-mips/sibyte/swarm.h
rename to trunk/arch/mips/include/asm/sibyte/swarm.h
diff --git a/trunk/include/asm-mips/sigcontext.h b/trunk/arch/mips/include/asm/sigcontext.h
similarity index 100%
rename from trunk/include/asm-mips/sigcontext.h
rename to trunk/arch/mips/include/asm/sigcontext.h
diff --git a/trunk/include/asm-mips/siginfo.h b/trunk/arch/mips/include/asm/siginfo.h
similarity index 100%
rename from trunk/include/asm-mips/siginfo.h
rename to trunk/arch/mips/include/asm/siginfo.h
diff --git a/trunk/include/asm-mips/signal.h b/trunk/arch/mips/include/asm/signal.h
similarity index 100%
rename from trunk/include/asm-mips/signal.h
rename to trunk/arch/mips/include/asm/signal.h
diff --git a/trunk/include/asm-mips/sim.h b/trunk/arch/mips/include/asm/sim.h
similarity index 100%
rename from trunk/include/asm-mips/sim.h
rename to trunk/arch/mips/include/asm/sim.h
diff --git a/trunk/include/asm-mips/smp-ops.h b/trunk/arch/mips/include/asm/smp-ops.h
similarity index 100%
rename from trunk/include/asm-mips/smp-ops.h
rename to trunk/arch/mips/include/asm/smp-ops.h
diff --git a/trunk/include/asm-mips/smp.h b/trunk/arch/mips/include/asm/smp.h
similarity index 100%
rename from trunk/include/asm-mips/smp.h
rename to trunk/arch/mips/include/asm/smp.h
diff --git a/trunk/include/asm-mips/smtc.h b/trunk/arch/mips/include/asm/smtc.h
similarity index 100%
rename from trunk/include/asm-mips/smtc.h
rename to trunk/arch/mips/include/asm/smtc.h
diff --git a/trunk/include/asm-mips/smtc_ipi.h b/trunk/arch/mips/include/asm/smtc_ipi.h
similarity index 100%
rename from trunk/include/asm-mips/smtc_ipi.h
rename to trunk/arch/mips/include/asm/smtc_ipi.h
diff --git a/trunk/include/asm-mips/smtc_proc.h b/trunk/arch/mips/include/asm/smtc_proc.h
similarity index 100%
rename from trunk/include/asm-mips/smtc_proc.h
rename to trunk/arch/mips/include/asm/smtc_proc.h
diff --git a/trunk/include/asm-mips/smvp.h b/trunk/arch/mips/include/asm/smvp.h
similarity index 100%
rename from trunk/include/asm-mips/smvp.h
rename to trunk/arch/mips/include/asm/smvp.h
diff --git a/trunk/include/asm-mips/sn/addrs.h b/trunk/arch/mips/include/asm/sn/addrs.h
similarity index 100%
rename from trunk/include/asm-mips/sn/addrs.h
rename to trunk/arch/mips/include/asm/sn/addrs.h
diff --git a/trunk/include/asm-mips/sn/agent.h b/trunk/arch/mips/include/asm/sn/agent.h
similarity index 100%
rename from trunk/include/asm-mips/sn/agent.h
rename to trunk/arch/mips/include/asm/sn/agent.h
diff --git a/trunk/include/asm-mips/sn/arch.h b/trunk/arch/mips/include/asm/sn/arch.h
similarity index 100%
rename from trunk/include/asm-mips/sn/arch.h
rename to trunk/arch/mips/include/asm/sn/arch.h
diff --git a/trunk/include/asm-mips/sn/fru.h b/trunk/arch/mips/include/asm/sn/fru.h
similarity index 100%
rename from trunk/include/asm-mips/sn/fru.h
rename to trunk/arch/mips/include/asm/sn/fru.h
diff --git a/trunk/include/asm-mips/sn/gda.h b/trunk/arch/mips/include/asm/sn/gda.h
similarity index 100%
rename from trunk/include/asm-mips/sn/gda.h
rename to trunk/arch/mips/include/asm/sn/gda.h
diff --git a/trunk/include/asm-mips/sn/hub.h b/trunk/arch/mips/include/asm/sn/hub.h
similarity index 100%
rename from trunk/include/asm-mips/sn/hub.h
rename to trunk/arch/mips/include/asm/sn/hub.h
diff --git a/trunk/include/asm-mips/sn/intr.h b/trunk/arch/mips/include/asm/sn/intr.h
similarity index 100%
rename from trunk/include/asm-mips/sn/intr.h
rename to trunk/arch/mips/include/asm/sn/intr.h
diff --git a/trunk/include/asm-mips/sn/io.h b/trunk/arch/mips/include/asm/sn/io.h
similarity index 100%
rename from trunk/include/asm-mips/sn/io.h
rename to trunk/arch/mips/include/asm/sn/io.h
diff --git a/trunk/include/asm-mips/sn/ioc3.h b/trunk/arch/mips/include/asm/sn/ioc3.h
similarity index 100%
rename from trunk/include/asm-mips/sn/ioc3.h
rename to trunk/arch/mips/include/asm/sn/ioc3.h
diff --git a/trunk/include/asm-mips/sn/klconfig.h b/trunk/arch/mips/include/asm/sn/klconfig.h
similarity index 96%
rename from trunk/include/asm-mips/sn/klconfig.h
rename to trunk/arch/mips/include/asm/sn/klconfig.h
index 96cfd2ab1bcd..09e590daca17 100644
--- a/trunk/include/asm-mips/sn/klconfig.h
+++ b/trunk/arch/mips/include/asm/sn/klconfig.h
@@ -425,7 +425,7 @@ typedef struct lboard_s {
unsigned char brd_sversion; /* version of this structure */
unsigned char brd_brevision; /* board revision */
unsigned char brd_promver; /* board prom version, if any */
- unsigned char brd_flags; /* Enabled, Disabled etc */
+ unsigned char brd_flags; /* Enabled, Disabled etc */
unsigned char brd_slot; /* slot number */
unsigned short brd_debugsw; /* Debug switches */
moduleid_t brd_module; /* module to which it belongs */
@@ -595,9 +595,9 @@ typedef struct klcpu_s { /* CPU */
klinfo_t cpu_info;
unsigned short cpu_prid; /* Processor PRID value */
unsigned short cpu_fpirr; /* FPU IRR value */
- unsigned short cpu_speed; /* Speed in MHZ */
- unsigned short cpu_scachesz; /* secondary cache size in MB */
- unsigned short cpu_scachespeed;/* secondary cache speed in MHz */
+ unsigned short cpu_speed; /* Speed in MHZ */
+ unsigned short cpu_scachesz; /* secondary cache size in MB */
+ unsigned short cpu_scachespeed;/* secondary cache speed in MHz */
} klcpu_t ;
#define CPU_STRUCT_VERSION 2
@@ -621,7 +621,7 @@ typedef struct klhub_uart_s { /* HUB */
typedef struct klmembnk_s { /* MEMORY BANK */
klinfo_t membnk_info;
- short membnk_memsz; /* Total memory in megabytes */
+ short membnk_memsz; /* Total memory in megabytes */
short membnk_dimm_select; /* bank to physical addr mapping*/
short membnk_bnksz[MD_MEM_BANKS]; /* Memory bank sizes */
short membnk_attr;
@@ -657,7 +657,7 @@ typedef struct klmod_serial_num_s {
typedef struct klxbow_s { /* XBOW */
klinfo_t xbow_info ;
- klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */
+ klport_t xbow_port_info[MAX_XBOW_LINKS] ; /* Module number */
int xbow_master_hub_link;
/* type of brd connected+component struct ptr+flags */
} klxbow_t ;
@@ -673,9 +673,9 @@ typedef struct klpci_device_s {
typedef struct klbri_s { /* BRIDGE */
klinfo_t bri_info ;
- unsigned char bri_eprominfo ; /* IO6prom connected to bridge */
- unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */
- pci_t pci_specific ; /* PCI Board config info */
+ unsigned char bri_eprominfo ; /* IO6prom connected to bridge */
+ unsigned char bri_bustype ; /* PCI/VME BUS bridge/GIO */
+ pci_t pci_specific ; /* PCI Board config info */
klpci_device_t bri_devices[MAX_PCI_DEVS] ; /* PCI IDs */
klconf_off_t bri_mfg_nic ;
} klbri_t ;
@@ -684,9 +684,9 @@ typedef struct klbri_s { /* BRIDGE */
typedef struct klioc3_s { /* IOC3 */
klinfo_t ioc3_info ;
- unsigned char ioc3_ssram ; /* Info about ssram */
- unsigned char ioc3_nvram ; /* Info about nvram */
- klinfo_t ioc3_superio ; /* Info about superio */
+ unsigned char ioc3_ssram ; /* Info about ssram */
+ unsigned char ioc3_nvram ; /* Info about nvram */
+ klinfo_t ioc3_superio ; /* Info about superio */
klconf_off_t ioc3_tty_off ;
klinfo_t ioc3_enet ;
klconf_off_t ioc3_enet_off ;
@@ -698,13 +698,13 @@ typedef struct klioc3_s { /* IOC3 */
typedef struct klvmeb_s { /* VME BRIDGE - PCI CTLR */
klinfo_t vmeb_info ;
vmeb_t vmeb_specific ;
- klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
+ klconf_off_t vmeb_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
} klvmeb_t ;
typedef struct klvmed_s { /* VME DEVICE - VME BOARD */
klinfo_t vmed_info ;
vmed_t vmed_specific ;
- klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
+ klconf_off_t vmed_brdinfo[MAX_VME_SLOTS] ; /* VME Board config info */
} klvmed_t ;
#define ROUTER_VECTOR_VERS 2
@@ -714,7 +714,7 @@ typedef struct klrou_s { /* ROUTER */
klinfo_t rou_info ;
unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */
nic_t rou_box_nic ; /* nic of the containing module */
- klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
+ klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
klconf_off_t rou_mfg_nic ; /* MFG NIC string */
u64 rou_vector; /* vector from master node */
} klrou_t ;
@@ -769,7 +769,7 @@ typedef struct klgsn_s { /* GSN board */
typedef struct klscsi_s { /* SCSI Controller */
klinfo_t scsi_info ;
- scsi_t scsi_specific ;
+ scsi_t scsi_specific ;
unsigned char scsi_numdevs ;
klconf_off_t scsi_devinfo[MAX_SCSI_DEVS] ;
} klscsi_t ;
@@ -803,13 +803,13 @@ typedef struct klmsdev_s { /* mouse device */
typedef struct klfddi_s { /* FDDI */
klinfo_t fddi_info ;
- fddi_t fddi_specific ;
+ fddi_t fddi_specific ;
klconf_off_t fddi_devinfo[MAX_FDDI_DEVS] ;
} klfddi_t ;
typedef struct klmio_s { /* MIO */
klinfo_t mio_info ;
- mio_t mio_specific ;
+ mio_t mio_specific ;
} klmio_t ;
diff --git a/trunk/include/asm-mips/sn/kldir.h b/trunk/arch/mips/include/asm/sn/kldir.h
similarity index 100%
rename from trunk/include/asm-mips/sn/kldir.h
rename to trunk/arch/mips/include/asm/sn/kldir.h
diff --git a/trunk/include/asm-mips/sn/klkernvars.h b/trunk/arch/mips/include/asm/sn/klkernvars.h
similarity index 100%
rename from trunk/include/asm-mips/sn/klkernvars.h
rename to trunk/arch/mips/include/asm/sn/klkernvars.h
diff --git a/trunk/include/asm-mips/sn/launch.h b/trunk/arch/mips/include/asm/sn/launch.h
similarity index 100%
rename from trunk/include/asm-mips/sn/launch.h
rename to trunk/arch/mips/include/asm/sn/launch.h
diff --git a/trunk/include/asm-mips/sn/mapped_kernel.h b/trunk/arch/mips/include/asm/sn/mapped_kernel.h
similarity index 100%
rename from trunk/include/asm-mips/sn/mapped_kernel.h
rename to trunk/arch/mips/include/asm/sn/mapped_kernel.h
diff --git a/trunk/include/asm-mips/sn/nmi.h b/trunk/arch/mips/include/asm/sn/nmi.h
similarity index 100%
rename from trunk/include/asm-mips/sn/nmi.h
rename to trunk/arch/mips/include/asm/sn/nmi.h
diff --git a/trunk/include/asm-mips/sn/sn0/addrs.h b/trunk/arch/mips/include/asm/sn/sn0/addrs.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/addrs.h
rename to trunk/arch/mips/include/asm/sn/sn0/addrs.h
diff --git a/trunk/include/asm-mips/sn/sn0/arch.h b/trunk/arch/mips/include/asm/sn/sn0/arch.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/arch.h
rename to trunk/arch/mips/include/asm/sn/sn0/arch.h
diff --git a/trunk/include/asm-mips/sn/sn0/hub.h b/trunk/arch/mips/include/asm/sn/sn0/hub.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/hub.h
rename to trunk/arch/mips/include/asm/sn/sn0/hub.h
diff --git a/trunk/include/asm-mips/sn/sn0/hubio.h b/trunk/arch/mips/include/asm/sn/sn0/hubio.h
similarity index 96%
rename from trunk/include/asm-mips/sn/sn0/hubio.h
rename to trunk/arch/mips/include/asm/sn/sn0/hubio.h
index 0187895e556c..d0c29d4de084 100644
--- a/trunk/include/asm-mips/sn/sn0/hubio.h
+++ b/trunk/arch/mips/include/asm/sn/sn0/hubio.h
@@ -175,10 +175,10 @@ typedef union hubii_wid_u {
u64 wid_reg_value;
struct {
u64 wid_rsvd: 32, /* unused */
- wid_rev_num: 4, /* revision number */
- wid_part_num: 16, /* the widget type: hub=c101 */
- wid_mfg_num: 11, /* Manufacturer id (IBM) */
- wid_rsvd1: 1; /* Reserved */
+ wid_rev_num: 4, /* revision number */
+ wid_part_num: 16, /* the widget type: hub=c101 */
+ wid_mfg_num: 11, /* Manufacturer id (IBM) */
+ wid_rsvd1: 1; /* Reserved */
} wid_fields_s;
} hubii_wid_t;
@@ -187,13 +187,13 @@ typedef union hubii_wcr_u {
u64 wcr_reg_value;
struct {
u64 wcr_rsvd: 41, /* unused */
- wcr_e_thresh: 5, /* elasticity threshold */
+ wcr_e_thresh: 5, /* elasticity threshold */
wcr_dir_con: 1, /* widget direct connect */
- wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
- wcr_xbar_crd: 3, /* LLP crossbar credit */
- wcr_rsvd1: 8, /* Reserved */
+ wcr_f_bad_pkt: 1, /* Force bad llp pkt enable */
+ wcr_xbar_crd: 3, /* LLP crossbar credit */
+ wcr_rsvd1: 8, /* Reserved */
wcr_tag_mode: 1, /* Tag mode */
- wcr_widget_id: 4; /* LLP crossbar credit */
+ wcr_widget_id: 4; /* LLP crossbar credit */
} wcr_fields_s;
} hubii_wcr_t;
@@ -220,14 +220,14 @@ typedef union hubii_ilcsr_u {
u64 icsr_reg_value;
struct {
u64 icsr_rsvd: 22, /* unused */
- icsr_max_burst: 10, /* max burst */
+ icsr_max_burst: 10, /* max burst */
icsr_rsvd4: 6, /* reserved */
- icsr_max_retry: 10, /* max retry */
+ icsr_max_retry: 10, /* max retry */
icsr_rsvd3: 2, /* reserved */
icsr_lnk_stat: 2, /* link status */
icsr_bm8: 1, /* Bit mode 8 */
icsr_llp_en: 1, /* LLP enable bit */
- icsr_rsvd2: 1, /* reserver */
+ icsr_rsvd2: 1, /* reserver */
icsr_wrm_reset: 1, /* Warm reset bit */
icsr_rsvd1: 2, /* Data ready offset */
icsr_null_to: 6; /* Null timeout */
@@ -240,9 +240,9 @@ typedef union hubii_iowa_u {
u64 iowa_reg_value;
struct {
u64 iowa_rsvd: 48, /* unused */
- iowa_wxoac: 8, /* xtalk widget access bits */
- iowa_rsvd1: 7, /* xtalk widget access bits */
- iowa_w0oac: 1; /* xtalk widget access bits */
+ iowa_wxoac: 8, /* xtalk widget access bits */
+ iowa_rsvd1: 7, /* xtalk widget access bits */
+ iowa_w0oac: 1; /* xtalk widget access bits */
} iowa_fields_s;
} hubii_iowa_t;
@@ -261,7 +261,7 @@ typedef union hubii_illr_u {
struct {
u64 illr_rsvd: 32, /* unused */
illr_cb_cnt: 16, /* checkbit error count */
- illr_sn_cnt: 16; /* sequence number count */
+ illr_sn_cnt: 16; /* sequence number count */
} illr_fields_s;
} hubii_illr_t;
@@ -275,7 +275,7 @@ typedef union io_perf_sel {
struct {
u64 perf_rsvd : 48,
perf_icct : 8,
- perf_ippr1 : 4,
+ perf_ippr1 : 4,
perf_ippr0 : 4;
} perf_sel_bits;
} io_perf_sel_t;
@@ -733,7 +733,7 @@ typedef union hubii_ifdr_u {
u64 ifdr_rsvd: 49,
ifdr_maxrp: 7,
ifdr_rsvd1: 1,
- ifdr_maxrq: 7;
+ ifdr_maxrq: 7;
} hi_ifdr_fields;
} hubii_ifdr_t;
diff --git a/trunk/include/asm-mips/sn/sn0/hubmd.h b/trunk/arch/mips/include/asm/sn/sn0/hubmd.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/hubmd.h
rename to trunk/arch/mips/include/asm/sn/sn0/hubmd.h
diff --git a/trunk/include/asm-mips/sn/sn0/hubni.h b/trunk/arch/mips/include/asm/sn/sn0/hubni.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/hubni.h
rename to trunk/arch/mips/include/asm/sn/sn0/hubni.h
diff --git a/trunk/include/asm-mips/sn/sn0/hubpi.h b/trunk/arch/mips/include/asm/sn/sn0/hubpi.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/hubpi.h
rename to trunk/arch/mips/include/asm/sn/sn0/hubpi.h
diff --git a/trunk/include/asm-mips/sn/sn0/ip27.h b/trunk/arch/mips/include/asm/sn/sn0/ip27.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn0/ip27.h
rename to trunk/arch/mips/include/asm/sn/sn0/ip27.h
diff --git a/trunk/include/asm-mips/sn/sn_private.h b/trunk/arch/mips/include/asm/sn/sn_private.h
similarity index 100%
rename from trunk/include/asm-mips/sn/sn_private.h
rename to trunk/arch/mips/include/asm/sn/sn_private.h
diff --git a/trunk/include/asm-mips/sn/types.h b/trunk/arch/mips/include/asm/sn/types.h
similarity index 100%
rename from trunk/include/asm-mips/sn/types.h
rename to trunk/arch/mips/include/asm/sn/types.h
diff --git a/trunk/include/asm-mips/sni.h b/trunk/arch/mips/include/asm/sni.h
similarity index 100%
rename from trunk/include/asm-mips/sni.h
rename to trunk/arch/mips/include/asm/sni.h
diff --git a/trunk/include/asm-mips/socket.h b/trunk/arch/mips/include/asm/socket.h
similarity index 100%
rename from trunk/include/asm-mips/socket.h
rename to trunk/arch/mips/include/asm/socket.h
diff --git a/trunk/include/asm-mips/sockios.h b/trunk/arch/mips/include/asm/sockios.h
similarity index 100%
rename from trunk/include/asm-mips/sockios.h
rename to trunk/arch/mips/include/asm/sockios.h
diff --git a/trunk/include/asm-mips/sparsemem.h b/trunk/arch/mips/include/asm/sparsemem.h
similarity index 100%
rename from trunk/include/asm-mips/sparsemem.h
rename to trunk/arch/mips/include/asm/sparsemem.h
diff --git a/trunk/include/asm-mips/spinlock.h b/trunk/arch/mips/include/asm/spinlock.h
similarity index 54%
rename from trunk/include/asm-mips/spinlock.h
rename to trunk/arch/mips/include/asm/spinlock.h
index bb897016c491..5d98a3cb85b7 100644
--- a/trunk/include/asm-mips/spinlock.h
+++ b/trunk/arch/mips/include/asm/spinlock.h
@@ -9,62 +9,125 @@
#ifndef _ASM_SPINLOCK_H
#define _ASM_SPINLOCK_H
+#include
+
#include
#include
/*
* Your basic SMP spinlocks, allowing only a single CPU anywhere
+ *
+ * Simple spin lock operations. There are two variants, one clears IRQ's
+ * on the local processor, one does not.
+ *
+ * These are fair FIFO ticket locks
+ *
+ * (the type definitions are in asm/spinlock_types.h)
*/
-#define __raw_spin_is_locked(x) ((x)->lock != 0)
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-#define __raw_spin_unlock_wait(x) \
- do { cpu_relax(); } while ((x)->lock)
/*
- * Simple spin lock operations. There are two variants, one clears IRQ's
- * on the local processor, one does not.
- *
- * We make no fairness assumptions. They have a cost.
+ * Ticket locks are conceptually two parts, one indicating the current head of
+ * the queue, and the other indicating the current tail. The lock is acquired
+ * by atomically noting the tail and incrementing it by one (thus adding
+ * ourself to the queue and noting our position), then waiting until the head
+ * becomes equal to the the initial value of the tail.
*/
+static inline int __raw_spin_is_locked(raw_spinlock_t *lock)
+{
+ unsigned int counters = ACCESS_ONCE(lock->lock);
+
+ return ((counters >> 14) ^ counters) & 0x1fff;
+}
+
+#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+#define __raw_spin_unlock_wait(x) \
+ while (__raw_spin_is_locked(x)) { cpu_relax(); }
+
+static inline int __raw_spin_is_contended(raw_spinlock_t *lock)
+{
+ unsigned int counters = ACCESS_ONCE(lock->lock);
+
+ return (((counters >> 14) - counters) & 0x1fff) > 1;
+}
+
static inline void __raw_spin_lock(raw_spinlock_t *lock)
{
- unsigned int tmp;
+ int my_ticket;
+ int tmp;
if (R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set noreorder # __raw_spin_lock \n"
- "1: ll %1, %2 \n"
- " bnez %1, 1b \n"
- " li %1, 1 \n"
- " sc %1, %0 \n"
- " beqzl %1, 1b \n"
+ __asm__ __volatile__ (
+ " .set push # __raw_spin_lock \n"
+ " .set noreorder \n"
+ " \n"
+ "1: ll %[ticket], %[ticket_ptr] \n"
+ " addiu %[my_ticket], %[ticket], 0x4000 \n"
+ " sc %[my_ticket], %[ticket_ptr] \n"
+ " beqzl %[my_ticket], 1b \n"
" nop \n"
- " .set reorder \n"
- : "=m" (lock->lock), "=&r" (tmp)
- : "m" (lock->lock)
- : "memory");
+ " srl %[my_ticket], %[ticket], 14 \n"
+ " andi %[my_ticket], %[my_ticket], 0x1fff \n"
+ " andi %[ticket], %[ticket], 0x1fff \n"
+ " bne %[ticket], %[my_ticket], 4f \n"
+ " subu %[ticket], %[my_ticket], %[ticket] \n"
+ "2: \n"
+ " .subsection 2 \n"
+ "4: andi %[ticket], %[ticket], 0x1fff \n"
+ "5: sll %[ticket], 5 \n"
+ " \n"
+ "6: bnez %[ticket], 6b \n"
+ " subu %[ticket], 1 \n"
+ " \n"
+ " lw %[ticket], %[ticket_ptr] \n"
+ " andi %[ticket], %[ticket], 0x1fff \n"
+ " beq %[ticket], %[my_ticket], 2b \n"
+ " subu %[ticket], %[my_ticket], %[ticket] \n"
+ " b 5b \n"
+ " subu %[ticket], %[ticket], 1 \n"
+ " .previous \n"
+ " .set pop \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp),
+ [my_ticket] "=&r" (my_ticket));
} else {
- __asm__ __volatile__(
- " .set noreorder # __raw_spin_lock \n"
- "1: ll %1, %2 \n"
- " bnez %1, 2f \n"
- " li %1, 1 \n"
- " sc %1, %0 \n"
- " beqz %1, 2f \n"
+ __asm__ __volatile__ (
+ " .set push # __raw_spin_lock \n"
+ " .set noreorder \n"
+ " \n"
+ " ll %[ticket], %[ticket_ptr] \n"
+ "1: addiu %[my_ticket], %[ticket], 0x4000 \n"
+ " sc %[my_ticket], %[ticket_ptr] \n"
+ " beqz %[my_ticket], 3f \n"
" nop \n"
+ " srl %[my_ticket], %[ticket], 14 \n"
+ " andi %[my_ticket], %[my_ticket], 0x1fff \n"
+ " andi %[ticket], %[ticket], 0x1fff \n"
+ " bne %[ticket], %[my_ticket], 4f \n"
+ " subu %[ticket], %[my_ticket], %[ticket] \n"
+ "2: \n"
" .subsection 2 \n"
- "2: ll %1, %2 \n"
- " bnez %1, 2b \n"
- " li %1, 1 \n"
- " b 1b \n"
- " nop \n"
+ "3: b 1b \n"
+ " ll %[ticket], %[ticket_ptr] \n"
+ " \n"
+ "4: andi %[ticket], %[ticket], 0x1fff \n"
+ "5: sll %[ticket], 5 \n"
+ " \n"
+ "6: bnez %[ticket], 6b \n"
+ " subu %[ticket], 1 \n"
+ " \n"
+ " lw %[ticket], %[ticket_ptr] \n"
+ " andi %[ticket], %[ticket], 0x1fff \n"
+ " beq %[ticket], %[my_ticket], 2b \n"
+ " subu %[ticket], %[my_ticket], %[ticket] \n"
+ " b 5b \n"
+ " subu %[ticket], %[ticket], 1 \n"
" .previous \n"
- " .set reorder \n"
- : "=m" (lock->lock), "=&r" (tmp)
- : "m" (lock->lock)
- : "memory");
+ " .set pop \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp),
+ [my_ticket] "=&r" (my_ticket));
}
smp_llsc_mb();
@@ -72,55 +135,103 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
static inline void __raw_spin_unlock(raw_spinlock_t *lock)
{
- smp_mb();
+ int tmp;
- __asm__ __volatile__(
- " .set noreorder # __raw_spin_unlock \n"
- " sw $0, %0 \n"
- " .set\treorder \n"
- : "=m" (lock->lock)
- : "m" (lock->lock)
- : "memory");
+ smp_llsc_mb();
+
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__ (
+ " # __raw_spin_unlock \n"
+ "1: ll %[ticket], %[ticket_ptr] \n"
+ " addiu %[ticket], %[ticket], 1 \n"
+ " ori %[ticket], %[ticket], 0x2000 \n"
+ " xori %[ticket], %[ticket], 0x2000 \n"
+ " sc %[ticket], %[ticket_ptr] \n"
+ " beqzl %[ticket], 2f \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp));
+ } else {
+ __asm__ __volatile__ (
+ " .set push # __raw_spin_unlock \n"
+ " .set noreorder \n"
+ " \n"
+ " ll %[ticket], %[ticket_ptr] \n"
+ "1: addiu %[ticket], %[ticket], 1 \n"
+ " ori %[ticket], %[ticket], 0x2000 \n"
+ " xori %[ticket], %[ticket], 0x2000 \n"
+ " sc %[ticket], %[ticket_ptr] \n"
+ " beqz %[ticket], 2f \n"
+ " nop \n"
+ " \n"
+ " .subsection 2 \n"
+ "2: b 1b \n"
+ " ll %[ticket], %[ticket_ptr] \n"
+ " .previous \n"
+ " .set pop \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp));
+ }
}
static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock)
{
- unsigned int temp, res;
+ int tmp, tmp2, tmp3;
if (R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set noreorder # __raw_spin_trylock \n"
- "1: ll %0, %3 \n"
- " ori %2, %0, 1 \n"
- " sc %2, %1 \n"
- " beqzl %2, 1b \n"
- " nop \n"
- " andi %2, %0, 1 \n"
- " .set reorder"
- : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
- : "m" (lock->lock)
- : "memory");
+ __asm__ __volatile__ (
+ " .set push # __raw_spin_trylock \n"
+ " .set noreorder \n"
+ " \n"
+ "1: ll %[ticket], %[ticket_ptr] \n"
+ " srl %[my_ticket], %[ticket], 14 \n"
+ " andi %[my_ticket], %[my_ticket], 0x1fff \n"
+ " andi %[now_serving], %[ticket], 0x1fff \n"
+ " bne %[my_ticket], %[now_serving], 3f \n"
+ " addiu %[ticket], %[ticket], 0x4000 \n"
+ " sc %[ticket], %[ticket_ptr] \n"
+ " beqzl %[ticket], 1b \n"
+ " li %[ticket], 1 \n"
+ "2: \n"
+ " .subsection 2 \n"
+ "3: b 2b \n"
+ " li %[ticket], 0 \n"
+ " .previous \n"
+ " .set pop \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp),
+ [my_ticket] "=&r" (tmp2),
+ [now_serving] "=&r" (tmp3));
} else {
- __asm__ __volatile__(
- " .set noreorder # __raw_spin_trylock \n"
- "1: ll %0, %3 \n"
- " ori %2, %0, 1 \n"
- " sc %2, %1 \n"
- " beqz %2, 2f \n"
- " andi %2, %0, 1 \n"
+ __asm__ __volatile__ (
+ " .set push # __raw_spin_trylock \n"
+ " .set noreorder \n"
+ " \n"
+ " ll %[ticket], %[ticket_ptr] \n"
+ "1: srl %[my_ticket], %[ticket], 14 \n"
+ " andi %[my_ticket], %[my_ticket], 0x1fff \n"
+ " andi %[now_serving], %[ticket], 0x1fff \n"
+ " bne %[my_ticket], %[now_serving], 3f \n"
+ " addiu %[ticket], %[ticket], 0x4000 \n"
+ " sc %[ticket], %[ticket_ptr] \n"
+ " beqz %[ticket], 4f \n"
+ " li %[ticket], 1 \n"
+ "2: \n"
" .subsection 2 \n"
- "2: b 1b \n"
- " nop \n"
+ "3: b 2b \n"
+ " li %[ticket], 0 \n"
+ "4: b 1b \n"
+ " ll %[ticket], %[ticket_ptr] \n"
" .previous \n"
- " .set reorder"
- : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
- : "m" (lock->lock)
- : "memory");
+ " .set pop \n"
+ : [ticket_ptr] "+m" (lock->lock),
+ [ticket] "=&r" (tmp),
+ [my_ticket] "=&r" (tmp2),
+ [now_serving] "=&r" (tmp3));
}
smp_llsc_mb();
- return res == 0;
+ return tmp;
}
/*
diff --git a/trunk/include/asm-mips/spinlock_types.h b/trunk/arch/mips/include/asm/spinlock_types.h
similarity index 75%
rename from trunk/include/asm-mips/spinlock_types.h
rename to trunk/arch/mips/include/asm/spinlock_types.h
index ce26c5048b15..adeedaa116c1 100644
--- a/trunk/include/asm-mips/spinlock_types.h
+++ b/trunk/arch/mips/include/asm/spinlock_types.h
@@ -6,7 +6,12 @@
#endif
typedef struct {
- volatile unsigned int lock;
+ /*
+ * bits 0..13: serving_now
+ * bits 14 : junk data
+ * bits 15..28: ticket
+ */
+ unsigned int lock;
} raw_spinlock_t;
#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
diff --git a/trunk/include/asm-mips/stackframe.h b/trunk/arch/mips/include/asm/stackframe.h
similarity index 100%
rename from trunk/include/asm-mips/stackframe.h
rename to trunk/arch/mips/include/asm/stackframe.h
diff --git a/trunk/include/asm-mips/stacktrace.h b/trunk/arch/mips/include/asm/stacktrace.h
similarity index 100%
rename from trunk/include/asm-mips/stacktrace.h
rename to trunk/arch/mips/include/asm/stacktrace.h
diff --git a/trunk/include/asm-mips/stat.h b/trunk/arch/mips/include/asm/stat.h
similarity index 100%
rename from trunk/include/asm-mips/stat.h
rename to trunk/arch/mips/include/asm/stat.h
diff --git a/trunk/include/asm-mips/statfs.h b/trunk/arch/mips/include/asm/statfs.h
similarity index 100%
rename from trunk/include/asm-mips/statfs.h
rename to trunk/arch/mips/include/asm/statfs.h
diff --git a/trunk/include/asm-mips/string.h b/trunk/arch/mips/include/asm/string.h
similarity index 100%
rename from trunk/include/asm-mips/string.h
rename to trunk/arch/mips/include/asm/string.h
diff --git a/trunk/include/asm-mips/suspend.h b/trunk/arch/mips/include/asm/suspend.h
similarity index 100%
rename from trunk/include/asm-mips/suspend.h
rename to trunk/arch/mips/include/asm/suspend.h
diff --git a/trunk/include/asm-mips/sysmips.h b/trunk/arch/mips/include/asm/sysmips.h
similarity index 100%
rename from trunk/include/asm-mips/sysmips.h
rename to trunk/arch/mips/include/asm/sysmips.h
diff --git a/trunk/include/asm-mips/system.h b/trunk/arch/mips/include/asm/system.h
similarity index 99%
rename from trunk/include/asm-mips/system.h
rename to trunk/arch/mips/include/asm/system.h
index a944eda4faf5..cd30f83235bb 100644
--- a/trunk/include/asm-mips/system.h
+++ b/trunk/arch/mips/include/asm/system.h
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
@@ -76,6 +77,7 @@ do { \
__restore_dsp(current); \
if (cpu_has_userlocal) \
write_c0_userlocal(current_thread_info()->tp_value); \
+ __restore_watch(); \
} while (0)
static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
diff --git a/trunk/include/asm-mips/termbits.h b/trunk/arch/mips/include/asm/termbits.h
similarity index 100%
rename from trunk/include/asm-mips/termbits.h
rename to trunk/arch/mips/include/asm/termbits.h
diff --git a/trunk/include/asm-mips/termios.h b/trunk/arch/mips/include/asm/termios.h
similarity index 100%
rename from trunk/include/asm-mips/termios.h
rename to trunk/arch/mips/include/asm/termios.h
diff --git a/trunk/include/asm-mips/thread_info.h b/trunk/arch/mips/include/asm/thread_info.h
similarity index 97%
rename from trunk/include/asm-mips/thread_info.h
rename to trunk/arch/mips/include/asm/thread_info.h
index bb3060699df2..3f76de73c943 100644
--- a/trunk/include/asm-mips/thread_info.h
+++ b/trunk/arch/mips/include/asm/thread_info.h
@@ -124,6 +124,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
#define TIF_32BIT_REGS 22 /* also implies 16/32 fprs */
#define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
#define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
+#define TIF_LOAD_WATCH 25 /* If set, load watch registers */
#define TIF_SYSCALL_TRACE 31 /* syscall trace active */
#define _TIF_SYSCALL_TRACE (1<
+#include
+#include
+#include
+
+/* Address map */
+#define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
+#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
+#define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002)
+#define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004)
+#define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006)
+#define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008)
+#define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a)
+#define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000)
+#define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002)
+#define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004)
+#define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000)
+#define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002)
+#define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004)
+#define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006)
+#define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000)
+#define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000)
+#define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002)
+#define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004)
+#define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006)
+#define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008)
+#define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a)
+#define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000)
+#define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002)
+#define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004)
+#define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006)
+#define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008)
+#define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a)
+#define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c)
+#define RBTX4939_7SEG_ADDR(s, ch) \
+ (IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2)
+#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000)
+#define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002)
+#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004)
+#define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000)
+
+/* Ethernet port address */
+#define RBTX4939_ETHER_ADDR (RBTX4939_ETHER_BASE + 0x300)
+
+/* bits for IEN/IPOL/IFAC */
+#define RBTX4938_INTB_ISA0 0
+#define RBTX4938_INTB_ISA11 1
+#define RBTX4938_INTB_ISA12 2
+#define RBTX4938_INTB_ISA15 3
+#define RBTX4938_INTB_I2S 4
+#define RBTX4938_INTB_SW 5
+#define RBTX4938_INTF_ISA0 (1 << RBTX4938_INTB_ISA0)
+#define RBTX4938_INTF_ISA11 (1 << RBTX4938_INTB_ISA11)
+#define RBTX4938_INTF_ISA12 (1 << RBTX4938_INTB_ISA12)
+#define RBTX4938_INTF_ISA15 (1 << RBTX4938_INTB_ISA15)
+#define RBTX4938_INTF_I2S (1 << RBTX4938_INTB_I2S)
+#define RBTX4938_INTF_SW (1 << RBTX4938_INTB_SW)
+
+/* bits for PE1,PE2,PE3 */
+#define RBTX4939_PE1_ATA(ch) (0x01 << (ch))
+#define RBTX4939_PE1_RMII(ch) (0x04 << (ch))
+#define RBTX4939_PE2_SIO0 0x01
+#define RBTX4939_PE2_SIO2 0x02
+#define RBTX4939_PE2_SIO3 0x04
+#define RBTX4939_PE2_CIR 0x08
+#define RBTX4939_PE2_SPI 0x10
+#define RBTX4939_PE2_GPIO 0x20
+#define RBTX4939_PE3_VP 0x01
+#define RBTX4939_PE3_VP_P 0x02
+#define RBTX4939_PE3_VP_S 0x04
+
+#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR)
+#define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR)
+#define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR)
+#define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR)
+#define rbtx4939_config3_addr ((u8 __iomem *)RBTX4939_CONFIG3_ADDR)
+#define rbtx4939_config4_addr ((u8 __iomem *)RBTX4939_CONFIG4_ADDR)
+#define rbtx4939_ustat_addr ((u8 __iomem *)RBTX4939_USTAT_ADDR)
+#define rbtx4939_udipsw_addr ((u8 __iomem *)RBTX4939_UDIPSW_ADDR)
+#define rbtx4939_bdipsw_addr ((u8 __iomem *)RBTX4939_BDIPSW_ADDR)
+#define rbtx4939_ien_addr ((u8 __iomem *)RBTX4939_IEN_ADDR)
+#define rbtx4939_ipol_addr ((u8 __iomem *)RBTX4939_IPOL_ADDR)
+#define rbtx4939_ifac1_addr ((u8 __iomem *)RBTX4939_IFAC1_ADDR)
+#define rbtx4939_ifac2_addr ((u8 __iomem *)RBTX4939_IFAC2_ADDR)
+#define rbtx4939_softint_addr ((u8 __iomem *)RBTX4939_SOFTINT_ADDR)
+#define rbtx4939_isastat_addr ((u8 __iomem *)RBTX4939_ISASTAT_ADDR)
+#define rbtx4939_pcistat_addr ((u8 __iomem *)RBTX4939_PCISTAT_ADDR)
+#define rbtx4939_rome_addr ((u8 __iomem *)RBTX4939_ROME_ADDR)
+#define rbtx4939_spics_addr ((u8 __iomem *)RBTX4939_SPICS_ADDR)
+#define rbtx4939_audi_addr ((u8 __iomem *)RBTX4939_AUDI_ADDR)
+#define rbtx4939_isagpio_addr ((u8 __iomem *)RBTX4939_ISAGPIO_ADDR)
+#define rbtx4939_pe1_addr ((u8 __iomem *)RBTX4939_PE1_ADDR)
+#define rbtx4939_pe2_addr ((u8 __iomem *)RBTX4939_PE2_ADDR)
+#define rbtx4939_pe3_addr ((u8 __iomem *)RBTX4939_PE3_ADDR)
+#define rbtx4939_vp_addr ((u8 __iomem *)RBTX4939_VP_ADDR)
+#define rbtx4939_vpreset_addr ((u8 __iomem *)RBTX4939_VPRESET_ADDR)
+#define rbtx4939_vpsout_addr ((u8 __iomem *)RBTX4939_VPSOUT_ADDR)
+#define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR)
+#define rbtx4939_7seg_addr(s, ch) \
+ ((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch))
+#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR)
+#define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR)
+#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR)
+
+/*
+ * IRQ mappings
+ */
+#define RBTX4939_NR_IRQ_IOC 8
+
+#define RBTX4939_IRQ_IOC (TXX9_IRQ_BASE + TX4939_NUM_IR)
+#define RBTX4939_IRQ_END (RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC)
+
+/* IOC (ISA, etc) */
+#define RBTX4939_IRQ_IOCINT (TXX9_IRQ_BASE + TX4939_IR_INT(0))
+/* Onboard 10M Ether */
+#define RBTX4939_IRQ_ETHER (TXX9_IRQ_BASE + TX4939_IR_INT(1))
+
+void rbtx4939_prom_init(void);
+void rbtx4939_irq_setup(void);
+
+#endif /* __ASM_TXX9_RBTX4939_H */
diff --git a/trunk/include/asm-mips/txx9/smsc_fdc37m81x.h b/trunk/arch/mips/include/asm/txx9/smsc_fdc37m81x.h
similarity index 98%
rename from trunk/include/asm-mips/txx9/smsc_fdc37m81x.h
rename to trunk/arch/mips/include/asm/txx9/smsc_fdc37m81x.h
index 02e161d0755d..d1d6332b4ca6 100644
--- a/trunk/include/asm-mips/txx9/smsc_fdc37m81x.h
+++ b/trunk/arch/mips/include/asm/txx9/smsc_fdc37m81x.h
@@ -62,6 +62,7 @@ void smsc_fdc37m81x_config_beg(void);
void smsc_fdc37m81x_config_end(void);
+u8 smsc_fdc37m81x_config_get(u8 reg);
void smsc_fdc37m81x_config_set(u8 reg, u8 val);
#endif
diff --git a/trunk/include/asm-mips/txx9/spi.h b/trunk/arch/mips/include/asm/txx9/spi.h
similarity index 53%
rename from trunk/include/asm-mips/txx9/spi.h
rename to trunk/arch/mips/include/asm/txx9/spi.h
index ddfb2a0dc432..0d727f354557 100644
--- a/trunk/include/asm-mips/txx9/spi.h
+++ b/trunk/arch/mips/include/asm/txx9/spi.h
@@ -13,7 +13,22 @@
#ifndef __ASM_TXX9_SPI_H
#define __ASM_TXX9_SPI_H
-extern int spi_eeprom_register(int chipid);
-extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
+#include
+
+#ifdef CONFIG_SPI
+int spi_eeprom_register(int busid, int chipid, int size);
+int spi_eeprom_read(int busid, int chipid,
+ int address, unsigned char *buf, int len);
+#else
+static inline int spi_eeprom_register(int busid, int chipid, int size)
+{
+ return -ENODEV;
+}
+static inline int spi_eeprom_read(int busid, int chipid,
+ int address, unsigned char *buf, int len)
+{
+ return -ENODEV;
+}
+#endif
#endif /* __ASM_TXX9_SPI_H */
diff --git a/trunk/include/asm-mips/txx9/tx3927.h b/trunk/arch/mips/include/asm/txx9/tx3927.h
similarity index 99%
rename from trunk/include/asm-mips/txx9/tx3927.h
rename to trunk/arch/mips/include/asm/txx9/tx3927.h
index 587deb9592d2..dc30c8d42061 100644
--- a/trunk/include/asm-mips/txx9/tx3927.h
+++ b/trunk/arch/mips/include/asm/txx9/tx3927.h
@@ -325,6 +325,7 @@ struct tx3927_ccfg_reg {
#define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000)
#define TX3927_ROMC_SIZE(ch) \
(0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf))
+#define TX3927_ROMC_WIDTH(ch) (32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1))
void tx3927_wdt_init(void);
void tx3927_setup(void);
@@ -335,5 +336,6 @@ void tx3927_pcic_setup(struct pci_controller *channel,
unsigned long sdram_size, int extarb);
void tx3927_setup_pcierr_irq(void);
void tx3927_irq_init(void);
+void tx3927_mtd_init(int ch);
#endif /* __ASM_TXX9_TX3927_H */
diff --git a/trunk/include/asm-mips/txx9/tx4927.h b/trunk/arch/mips/include/asm/txx9/tx4927.h
similarity index 95%
rename from trunk/include/asm-mips/txx9/tx4927.h
rename to trunk/arch/mips/include/asm/txx9/tx4927.h
index 195f6515db9a..7d813f1cb98d 100644
--- a/trunk/include/asm-mips/txx9/tx4927.h
+++ b/trunk/arch/mips/include/asm/txx9/tx4927.h
@@ -50,12 +50,23 @@
#define TX4927_SIO_REG(ch) (TX4927_REG_BASE + 0xf300 + (ch) * 0x100)
#define TX4927_PIO_REG (TX4927_REG_BASE + 0xf500)
+#define TX4927_IR_ECCERR 0
+#define TX4927_IR_WTOERR 1
+#define TX4927_NUM_IR_INT 6
#define TX4927_IR_INT(n) (2 + (n))
+#define TX4927_NUM_IR_SIO 2
#define TX4927_IR_SIO(n) (8 + (n))
+#define TX4927_NUM_IR_DMA 4
+#define TX4927_IR_DMA(n) (10 + (n))
+#define TX4927_IR_PIO 14
+#define TX4927_IR_PDMAC 15
#define TX4927_IR_PCIC 16
#define TX4927_NUM_IR_TMR 3
#define TX4927_IR_TMR(n) (17 + (n))
#define TX4927_IR_PCIERR 22
+#define TX4927_IR_PCIPME 23
+#define TX4927_IR_ACLC 24
+#define TX4927_IR_ACLCPME 25
#define TX4927_NUM_IR 32
#define TX4927_IRC_INT 2 /* IP[2] in Status register */
@@ -196,6 +207,8 @@ struct tx4927_ccfg_reg {
#define TX4927_EBUSC_BA(ch) ((TX4927_EBUSC_CR(ch) >> 48) << 20)
#define TX4927_EBUSC_SIZE(ch) \
(0x00100000 << ((unsigned long)(TX4927_EBUSC_CR(ch) >> 8) & 0xf))
+#define TX4927_EBUSC_WIDTH(ch) \
+ (64 >> ((__u32)(TX4927_EBUSC_CR(ch) >> 20) & 0x3))
/* utilities */
static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
@@ -251,5 +264,6 @@ int tx4927_report_pciclk(void);
int tx4927_pciclk66_setup(void);
void tx4927_setup_pcierr_irq(void);
void tx4927_irq_init(void);
+void tx4927_mtd_init(int ch);
#endif /* __ASM_TXX9_TX4927_H */
diff --git a/trunk/include/asm-mips/txx9/tx4927pcic.h b/trunk/arch/mips/include/asm/txx9/tx4927pcic.h
similarity index 100%
rename from trunk/include/asm-mips/txx9/tx4927pcic.h
rename to trunk/arch/mips/include/asm/txx9/tx4927pcic.h
diff --git a/trunk/include/asm-mips/txx9/tx4938.h b/trunk/arch/mips/include/asm/txx9/tx4938.h
similarity index 99%
rename from trunk/include/asm-mips/txx9/tx4938.h
rename to trunk/arch/mips/include/asm/txx9/tx4938.h
index 8175d4ccbc39..989e7751135a 100644
--- a/trunk/include/asm-mips/txx9/tx4938.h
+++ b/trunk/arch/mips/include/asm/txx9/tx4938.h
@@ -274,6 +274,7 @@ struct tx4938_ccfg_reg {
#define TX4938_EBUSC_CR(ch) TX4927_EBUSC_CR(ch)
#define TX4938_EBUSC_BA(ch) TX4927_EBUSC_BA(ch)
#define TX4938_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch)
+#define TX4938_EBUSC_WIDTH(ch) TX4927_EBUSC_WIDTH(ch)
#define tx4938_get_mem_size() tx4927_get_mem_size()
void tx4938_wdt_init(void);
@@ -289,5 +290,6 @@ struct pci_dev;
int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
void tx4938_setup_pcierr_irq(void);
void tx4938_irq_init(void);
+void tx4938_mtd_init(int ch);
#endif
diff --git a/trunk/arch/mips/include/asm/txx9/tx4939.h b/trunk/arch/mips/include/asm/txx9/tx4939.h
new file mode 100644
index 000000000000..88badb423010
--- /dev/null
+++ b/trunk/arch/mips/include/asm/txx9/tx4939.h
@@ -0,0 +1,545 @@
+/*
+ * Definitions for TX4939
+ *
+ * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#ifndef __ASM_TXX9_TX4939_H
+#define __ASM_TXX9_TX4939_H
+
+/* some controllers are compatible with 4927/4938 */
+#include
+
+#ifdef CONFIG_64BIT
+#define TX4939_REG_BASE 0xffffffffff1f0000UL /* == TX4938_REG_BASE */
+#else
+#define TX4939_REG_BASE 0xff1f0000UL /* == TX4938_REG_BASE */
+#endif
+#define TX4939_REG_SIZE 0x00010000 /* == TX4938_REG_SIZE */
+
+#define TX4939_ATA_REG(ch) (TX4939_REG_BASE + 0x3000 + (ch) * 0x1000)
+#define TX4939_NDFMC_REG (TX4939_REG_BASE + 0x5000)
+#define TX4939_SRAMC_REG (TX4939_REG_BASE + 0x6000)
+#define TX4939_CRYPTO_REG (TX4939_REG_BASE + 0x6800)
+#define TX4939_PCIC1_REG (TX4939_REG_BASE + 0x7000)
+#define TX4939_DDRC_REG (TX4939_REG_BASE + 0x8000)
+#define TX4939_EBUSC_REG (TX4939_REG_BASE + 0x9000)
+#define TX4939_VPC_REG (TX4939_REG_BASE + 0xa000)
+#define TX4939_DMA_REG(ch) (TX4939_REG_BASE + 0xb000 + (ch) * 0x800)
+#define TX4939_PCIC_REG (TX4939_REG_BASE + 0xd000)
+#define TX4939_CCFG_REG (TX4939_REG_BASE + 0xe000)
+#define TX4939_IRC_REG (TX4939_REG_BASE + 0xe800)
+#define TX4939_NR_TMR 6 /* 0xf000,0xf100,0xf200,0xfd00,0xfe00,0xff00 */
+#define TX4939_TMR_REG(ch) \
+ (TX4939_REG_BASE + 0xf000 + ((ch) + ((ch) >= 3) * 10) * 0x100)
+#define TX4939_NR_SIO 4 /* 0xf300, 0xf400, 0xf380, 0xf480 */
+#define TX4939_SIO_REG(ch) \
+ (TX4939_REG_BASE + 0xf300 + (((ch) & 1) << 8) + (((ch) & 2) << 6))
+#define TX4939_ACLC_REG (TX4939_REG_BASE + 0xf700)
+#define TX4939_SPI_REG (TX4939_REG_BASE + 0xf800)
+#define TX4939_I2C_REG (TX4939_REG_BASE + 0xf900)
+#define TX4939_I2S_REG (TX4939_REG_BASE + 0xfa00)
+#define TX4939_RTC_REG (TX4939_REG_BASE + 0xfb00)
+#define TX4939_CIR_REG (TX4939_REG_BASE + 0xfc00)
+
+struct tx4939_le_reg {
+ __u32 r;
+ __u32 unused;
+};
+
+struct tx4939_ddrc_reg {
+ struct tx4939_le_reg ctl[47];
+ __u64 unused0[17];
+ __u64 winen;
+ __u64 win[4];
+};
+
+struct tx4939_ccfg_reg {
+ __u64 ccfg;
+ __u64 crir;
+ __u64 pcfg;
+ __u64 toea;
+ __u64 clkctr;
+ __u64 unused0;
+ __u64 garbc;
+ __u64 unused1[2];
+ __u64 ramp;
+ __u64 unused2[2];
+ __u64 dskwctrl;
+ __u64 mclkosc;
+ __u64 mclkctl;
+ __u64 unused3[17];
+ struct {
+ __u64 mr;
+ __u64 dr;
+ } gpio[2];
+};
+
+struct tx4939_irc_reg {
+ struct tx4939_le_reg den;
+ struct tx4939_le_reg scipb;
+ struct tx4939_le_reg dm[2];
+ struct tx4939_le_reg lvl[16];
+ struct tx4939_le_reg msk;
+ struct tx4939_le_reg edc;
+ struct tx4939_le_reg pnd0;
+ struct tx4939_le_reg cs;
+ struct tx4939_le_reg pnd1;
+ struct tx4939_le_reg dm2[2];
+ struct tx4939_le_reg dbr[2];
+ struct tx4939_le_reg dben;
+ struct tx4939_le_reg unused0[2];
+ struct tx4939_le_reg flag[2];
+ struct tx4939_le_reg pol;
+ struct tx4939_le_reg cnt;
+ struct tx4939_le_reg maskint;
+ struct tx4939_le_reg maskext;
+};
+
+struct tx4939_rtc_reg {
+ __u32 ctl;
+ __u32 adr;
+ __u32 dat;
+ __u32 tbc;
+};
+
+struct tx4939_crypto_reg {
+ struct tx4939_le_reg csr;
+ struct tx4939_le_reg idesptr;
+ struct tx4939_le_reg cdesptr;
+ struct tx4939_le_reg buserr;
+ struct tx4939_le_reg cip_tout;
+ struct tx4939_le_reg cir;
+ union {
+ struct {
+ struct tx4939_le_reg data[8];
+ struct tx4939_le_reg ctrl;
+ } gen;
+ struct {
+ struct {
+ struct tx4939_le_reg l;
+ struct tx4939_le_reg u;
+ } key[3], ini;
+ struct tx4939_le_reg ctrl;
+ } des;
+ struct {
+ struct tx4939_le_reg key[4];
+ struct tx4939_le_reg ini[4];
+ struct tx4939_le_reg ctrl;
+ } aes;
+ struct {
+ struct {
+ struct tx4939_le_reg l;
+ struct tx4939_le_reg u;
+ } cnt;
+ struct tx4939_le_reg ini[5];
+ struct tx4939_le_reg unused;
+ struct tx4939_le_reg ctrl;
+ } hash;
+ } cdr;
+ struct tx4939_le_reg unused0[7];
+ struct tx4939_le_reg rcsr;
+ struct tx4939_le_reg rpr;
+ __u64 rdr;
+ __u64 ror[3];
+ struct tx4939_le_reg unused1[2];
+ struct tx4939_le_reg xorslr;
+ struct tx4939_le_reg xorsur;
+};
+
+struct tx4939_crypto_desc {
+ __u32 src;
+ __u32 dst;
+ __u32 next;
+ __u32 ctrl;
+ __u32 index;
+ __u32 xor;
+};
+
+struct tx4939_vpc_reg {
+ struct tx4939_le_reg csr;
+ struct {
+ struct tx4939_le_reg ctrlA;
+ struct tx4939_le_reg ctrlB;
+ struct tx4939_le_reg idesptr;
+ struct tx4939_le_reg cdesptr;
+ } port[3];
+ struct tx4939_le_reg buserr;
+};
+
+struct tx4939_vpc_desc {
+ __u32 src;
+ __u32 next;
+ __u32 ctrl1;
+ __u32 ctrl2;
+};
+
+/*
+ * IRC
+ */
+#define TX4939_IR_NONE 0
+#define TX4939_IR_DDR 1
+#define TX4939_IR_WTOERR 2
+#define TX4939_NUM_IR_INT 3
+#define TX4939_IR_INT(n) (3 + (n))
+#define TX4939_NUM_IR_ETH 2
+#define TX4939_IR_ETH(n) ((n) ? 43 : 6)
+#define TX4939_IR_VIDEO 7
+#define TX4939_IR_CIR 8
+#define TX4939_NUM_IR_SIO 4
+#define TX4939_IR_SIO(n) ((n) ? 43 + (n) : 9) /* 9,44-46 */
+#define TX4939_NUM_IR_DMA 4
+#define TX4939_IR_DMA(ch, n) (((ch) ? 22 : 10) + (n)) /* 10-13,22-25 */
+#define TX4939_IR_IRC 14
+#define TX4939_IR_PDMAC 15
+#define TX4939_NUM_IR_TMR 6
+#define TX4939_IR_TMR(n) (((n) >= 3 ? 45 : 16) + (n)) /* 16-18,48-50 */
+#define TX4939_NUM_IR_ATA 2
+#define TX4939_IR_ATA(n) (19 + (n))
+#define TX4939_IR_ACLC 21
+#define TX4939_IR_CIPHER 26
+#define TX4939_IR_INTA 27
+#define TX4939_IR_INTB 28
+#define TX4939_IR_INTC 29
+#define TX4939_IR_INTD 30
+#define TX4939_IR_I2C 33
+#define TX4939_IR_SPI 34
+#define TX4939_IR_PCIC 35
+#define TX4939_IR_PCIC1 36
+#define TX4939_IR_PCIERR 37
+#define TX4939_IR_PCIPME 38
+#define TX4939_IR_NDFMC 39
+#define TX4939_IR_ACLCPME 40
+#define TX4939_IR_RTC 41
+#define TX4939_IR_RND 42
+#define TX4939_IR_I2S 47
+#define TX4939_NUM_IR 64
+
+#define TX4939_IRC_INT 2 /* IP[2] in Status register */
+
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX4939_CCFG_PCIBOOT 0x0000040000000000ULL
+#define TX4939_CCFG_WDRST 0x0000020000000000ULL
+#define TX4939_CCFG_WDREXEN 0x0000010000000000ULL
+#define TX4939_CCFG_BCFG_MASK 0x000000ff00000000ULL
+#define TX4939_CCFG_GTOT_MASK 0x06000000
+#define TX4939_CCFG_GTOT_4096 0x06000000
+#define TX4939_CCFG_GTOT_2048 0x04000000
+#define TX4939_CCFG_GTOT_1024 0x02000000
+#define TX4939_CCFG_GTOT_512 0x00000000
+#define TX4939_CCFG_TINTDIS 0x01000000
+#define TX4939_CCFG_PCI66 0x00800000
+#define TX4939_CCFG_PCIMODE 0x00400000
+#define TX4939_CCFG_SSCG 0x00100000
+#define TX4939_CCFG_MULCLK_MASK 0x000e0000
+#define TX4939_CCFG_MULCLK_8 (0x7 << 17)
+#define TX4939_CCFG_MULCLK_9 (0x0 << 17)
+#define TX4939_CCFG_MULCLK_10 (0x1 << 17)
+#define TX4939_CCFG_MULCLK_11 (0x2 << 17)
+#define TX4939_CCFG_MULCLK_12 (0x3 << 17)
+#define TX4939_CCFG_MULCLK_13 (0x4 << 17)
+#define TX4939_CCFG_MULCLK_14 (0x5 << 17)
+#define TX4939_CCFG_MULCLK_15 (0x6 << 17)
+#define TX4939_CCFG_BEOW 0x00010000
+#define TX4939_CCFG_WR 0x00008000
+#define TX4939_CCFG_TOE 0x00004000
+#define TX4939_CCFG_PCIARB 0x00002000
+#define TX4939_CCFG_YDIVMODE_MASK 0x00001c00
+#define TX4939_CCFG_YDIVMODE_2 (0x0 << 10)
+#define TX4939_CCFG_YDIVMODE_3 (0x1 << 10)
+#define TX4939_CCFG_YDIVMODE_5 (0x6 << 10)
+#define TX4939_CCFG_YDIVMODE_6 (0x7 << 10)
+#define TX4939_CCFG_PTSEL 0x00000200
+#define TX4939_CCFG_BESEL 0x00000100
+#define TX4939_CCFG_SYSSP_MASK 0x000000c0
+#define TX4939_CCFG_ACKSEL 0x00000020
+#define TX4939_CCFG_ROMW 0x00000010
+#define TX4939_CCFG_ENDIAN 0x00000004
+#define TX4939_CCFG_ARMODE 0x00000002
+#define TX4939_CCFG_ACEHOLD 0x00000001
+
+/* PCFG : Pin Configuration */
+#define TX4939_PCFG_SIO2MODE_MASK 0xc000000000000000ULL
+#define TX4939_PCFG_SIO2MODE_GPIO 0x8000000000000000ULL
+#define TX4939_PCFG_SIO2MODE_SIO2 0x4000000000000000ULL
+#define TX4939_PCFG_SIO2MODE_SIO0 0x0000000000000000ULL
+#define TX4939_PCFG_SPIMODE 0x2000000000000000ULL
+#define TX4939_PCFG_I2CMODE 0x1000000000000000ULL
+#define TX4939_PCFG_I2SMODE_MASK 0x0c00000000000000ULL
+#define TX4939_PCFG_I2SMODE_GPIO 0x0c00000000000000ULL
+#define TX4939_PCFG_I2SMODE_I2S 0x0800000000000000ULL
+#define TX4939_PCFG_I2SMODE_I2S_ALT 0x0400000000000000ULL
+#define TX4939_PCFG_I2SMODE_ACLC 0x0000000000000000ULL
+#define TX4939_PCFG_SIO3MODE 0x0200000000000000ULL
+#define TX4939_PCFG_DMASEL3 0x0004000000000000ULL
+#define TX4939_PCFG_DMASEL3_SIO0 0x0004000000000000ULL
+#define TX4939_PCFG_DMASEL3_NDFC 0x0000000000000000ULL
+#define TX4939_PCFG_VSSMODE 0x0000200000000000ULL
+#define TX4939_PCFG_VPSMODE 0x0000100000000000ULL
+#define TX4939_PCFG_ET1MODE 0x0000080000000000ULL
+#define TX4939_PCFG_ET0MODE 0x0000040000000000ULL
+#define TX4939_PCFG_ATA1MODE 0x0000020000000000ULL
+#define TX4939_PCFG_ATA0MODE 0x0000010000000000ULL
+#define TX4939_PCFG_BP_PLL 0x0000000100000000ULL
+
+#define TX4939_PCFG_SYSCLKEN 0x08000000
+#define TX4939_PCFG_PCICLKEN_ALL 0x000f0000
+#define TX4939_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
+#define TX4939_PCFG_SPEED1 0x00002000
+#define TX4939_PCFG_SPEED0 0x00001000
+#define TX4939_PCFG_ITMODE 0x00000300
+#define TX4939_PCFG_DMASEL_ALL (0x00000007 | TX4939_PCFG_DMASEL3)
+#define TX4939_PCFG_DMASEL2 0x00000004
+#define TX4939_PCFG_DMASEL2_DRQ2 0x00000000
+#define TX4939_PCFG_DMASEL2_SIO0 0x00000004
+#define TX4939_PCFG_DMASEL1 0x00000002
+#define TX4939_PCFG_DMASEL1_DRQ1 0x00000000
+#define TX4939_PCFG_DMASEL0 0x00000001
+#define TX4939_PCFG_DMASEL0_DRQ0 0x00000000
+
+/* CLKCTR : Clock Control */
+#define TX4939_CLKCTR_IOSCKD 0x8000000000000000ULL
+#define TX4939_CLKCTR_SYSCKD 0x4000000000000000ULL
+#define TX4939_CLKCTR_TM5CKD 0x2000000000000000ULL
+#define TX4939_CLKCTR_TM4CKD 0x1000000000000000ULL
+#define TX4939_CLKCTR_TM3CKD 0x0800000000000000ULL
+#define TX4939_CLKCTR_CIRCKD 0x0400000000000000ULL
+#define TX4939_CLKCTR_SIO3CKD 0x0200000000000000ULL
+#define TX4939_CLKCTR_SIO2CKD 0x0100000000000000ULL
+#define TX4939_CLKCTR_SIO1CKD 0x0080000000000000ULL
+#define TX4939_CLKCTR_VPCCKD 0x0040000000000000ULL
+#define TX4939_CLKCTR_EPCICKD 0x0020000000000000ULL
+#define TX4939_CLKCTR_ETH1CKD 0x0008000000000000ULL
+#define TX4939_CLKCTR_ATA1CKD 0x0004000000000000ULL
+#define TX4939_CLKCTR_BROMCKD 0x0002000000000000ULL
+#define TX4939_CLKCTR_NDCCKD 0x0001000000000000ULL
+#define TX4939_CLKCTR_I2CCKD 0x0000800000000000ULL
+#define TX4939_CLKCTR_ETH0CKD 0x0000400000000000ULL
+#define TX4939_CLKCTR_SPICKD 0x0000200000000000ULL
+#define TX4939_CLKCTR_SRAMCKD 0x0000100000000000ULL
+#define TX4939_CLKCTR_PCI1CKD 0x0000080000000000ULL
+#define TX4939_CLKCTR_DMA1CKD 0x0000040000000000ULL
+#define TX4939_CLKCTR_ACLCKD 0x0000020000000000ULL
+#define TX4939_CLKCTR_ATA0CKD 0x0000010000000000ULL
+#define TX4939_CLKCTR_DMA0CKD 0x0000008000000000ULL
+#define TX4939_CLKCTR_PCICCKD 0x0000004000000000ULL
+#define TX4939_CLKCTR_I2SCKD 0x0000002000000000ULL
+#define TX4939_CLKCTR_TM0CKD 0x0000001000000000ULL
+#define TX4939_CLKCTR_TM1CKD 0x0000000800000000ULL
+#define TX4939_CLKCTR_TM2CKD 0x0000000400000000ULL
+#define TX4939_CLKCTR_SIO0CKD 0x0000000200000000ULL
+#define TX4939_CLKCTR_CYPCKD 0x0000000100000000ULL
+#define TX4939_CLKCTR_IOSRST 0x80000000
+#define TX4939_CLKCTR_SYSRST 0x40000000
+#define TX4939_CLKCTR_TM5RST 0x20000000
+#define TX4939_CLKCTR_TM4RST 0x10000000
+#define TX4939_CLKCTR_TM3RST 0x08000000
+#define TX4939_CLKCTR_CIRRST 0x04000000
+#define TX4939_CLKCTR_SIO3RST 0x02000000
+#define TX4939_CLKCTR_SIO2RST 0x01000000
+#define TX4939_CLKCTR_SIO1RST 0x00800000
+#define TX4939_CLKCTR_VPCRST 0x00400000
+#define TX4939_CLKCTR_EPCIRST 0x00200000
+#define TX4939_CLKCTR_ETH1RST 0x00080000
+#define TX4939_CLKCTR_ATA1RST 0x00040000
+#define TX4939_CLKCTR_BROMRST 0x00020000
+#define TX4939_CLKCTR_NDCRST 0x00010000
+#define TX4939_CLKCTR_I2CRST 0x00008000
+#define TX4939_CLKCTR_ETH0RST 0x00004000
+#define TX4939_CLKCTR_SPIRST 0x00002000
+#define TX4939_CLKCTR_SRAMRST 0x00001000
+#define TX4939_CLKCTR_PCI1RST 0x00000800
+#define TX4939_CLKCTR_DMA1RST 0x00000400
+#define TX4939_CLKCTR_ACLRST 0x00000200
+#define TX4939_CLKCTR_ATA0RST 0x00000100
+#define TX4939_CLKCTR_DMA0RST 0x00000080
+#define TX4939_CLKCTR_PCICRST 0x00000040
+#define TX4939_CLKCTR_I2SRST 0x00000020
+#define TX4939_CLKCTR_TM0RST 0x00000010
+#define TX4939_CLKCTR_TM1RST 0x00000008
+#define TX4939_CLKCTR_TM2RST 0x00000004
+#define TX4939_CLKCTR_SIO0RST 0x00000002
+#define TX4939_CLKCTR_CYPRST 0x00000001
+
+/*
+ * RTC
+ */
+#define TX4939_RTCCTL_ALME 0x00000080
+#define TX4939_RTCCTL_ALMD 0x00000040
+#define TX4939_RTCCTL_BUSY 0x00000020
+
+#define TX4939_RTCCTL_COMMAND 0x00000007
+#define TX4939_RTCCTL_COMMAND_NOP 0x00000000
+#define TX4939_RTCCTL_COMMAND_GETTIME 0x00000001
+#define TX4939_RTCCTL_COMMAND_SETTIME 0x00000002
+#define TX4939_RTCCTL_COMMAND_GETALARM 0x00000003
+#define TX4939_RTCCTL_COMMAND_SETALARM 0x00000004
+
+#define TX4939_RTCTBC_PM 0x00000080
+#define TX4939_RTCTBC_COMP 0x0000007f
+
+#define TX4939_RTC_REG_RAMSIZE 0x00000100
+#define TX4939_RTC_REG_RWBSIZE 0x00000006
+
+/*
+ * CRYPTO
+ */
+#define TX4939_CRYPTO_CSR_SAESO 0x08000000
+#define TX4939_CRYPTO_CSR_SAESI 0x04000000
+#define TX4939_CRYPTO_CSR_SDESO 0x02000000
+#define TX4939_CRYPTO_CSR_SDESI 0x01000000
+#define TX4939_CRYPTO_CSR_INDXBST_MASK 0x00700000
+#define TX4939_CRYPTO_CSR_INDXBST(n) ((n) << 20)
+#define TX4939_CRYPTO_CSR_TOINT 0x00080000
+#define TX4939_CRYPTO_CSR_DCINT 0x00040000
+#define TX4939_CRYPTO_CSR_GBINT 0x00010000
+#define TX4939_CRYPTO_CSR_INDXAST_MASK 0x0000e000
+#define TX4939_CRYPTO_CSR_INDXAST(n) ((n) << 13)
+#define TX4939_CRYPTO_CSR_CSWAP_MASK 0x00001800
+#define TX4939_CRYPTO_CSR_CSWAP_NONE 0x00000000
+#define TX4939_CRYPTO_CSR_CSWAP_IN 0x00000800
+#define TX4939_CRYPTO_CSR_CSWAP_OUT 0x00001000
+#define TX4939_CRYPTO_CSR_CSWAP_BOTH 0x00001800
+#define TX4939_CRYPTO_CSR_CDIV_MASK 0x00000600
+#define TX4939_CRYPTO_CSR_CDIV_DIV2 0x00000000
+#define TX4939_CRYPTO_CSR_CDIV_DIV1 0x00000200
+#define TX4939_CRYPTO_CSR_CDIV_DIV2ALT 0x00000400
+#define TX4939_CRYPTO_CSR_CDIV_DIV1ALT 0x00000600
+#define TX4939_CRYPTO_CSR_PDINT_MASK 0x000000c0
+#define TX4939_CRYPTO_CSR_PDINT_ALL 0x00000000
+#define TX4939_CRYPTO_CSR_PDINT_END 0x00000040
+#define TX4939_CRYPTO_CSR_PDINT_NEXT 0x00000080
+#define TX4939_CRYPTO_CSR_PDINT_NONE 0x000000c0
+#define TX4939_CRYPTO_CSR_GINTE 0x00000008
+#define TX4939_CRYPTO_CSR_RSTD 0x00000004
+#define TX4939_CRYPTO_CSR_RSTC 0x00000002
+#define TX4939_CRYPTO_CSR_ENCR 0x00000001
+
+/* bits for tx4939_crypto_reg.cdr.gen.ctrl */
+#define TX4939_CRYPTO_CTX_ENGINE_MASK 0x00000003
+#define TX4939_CRYPTO_CTX_ENGINE_DES 0x00000000
+#define TX4939_CRYPTO_CTX_ENGINE_AES 0x00000001
+#define TX4939_CRYPTO_CTX_ENGINE_MD5 0x00000002
+#define TX4939_CRYPTO_CTX_ENGINE_SHA1 0x00000003
+#define TX4939_CRYPTO_CTX_TDMS 0x00000010
+#define TX4939_CRYPTO_CTX_CMS 0x00000020
+#define TX4939_CRYPTO_CTX_DMS 0x00000040
+#define TX4939_CRYPTO_CTX_UPDATE 0x00000080
+
+/* bits for tx4939_crypto_desc.ctrl */
+#define TX4939_CRYPTO_DESC_OB_CNT_MASK 0xffe00000
+#define TX4939_CRYPTO_DESC_OB_CNT(cnt) ((cnt) << 21)
+#define TX4939_CRYPTO_DESC_IB_CNT_MASK 0x001ffc00
+#define TX4939_CRYPTO_DESC_IB_CNT(cnt) ((cnt) << 10)
+#define TX4939_CRYPTO_DESC_START 0x00000200
+#define TX4939_CRYPTO_DESC_END 0x00000100
+#define TX4939_CRYPTO_DESC_XOR 0x00000010
+#define TX4939_CRYPTO_DESC_LAST 0x00000008
+#define TX4939_CRYPTO_DESC_ERR_MASK 0x00000006
+#define TX4939_CRYPTO_DESC_ERR_NONE 0x00000000
+#define TX4939_CRYPTO_DESC_ERR_TOUT 0x00000002
+#define TX4939_CRYPTO_DESC_ERR_DIGEST 0x00000004
+#define TX4939_CRYPTO_DESC_OWN 0x00000001
+
+/* bits for tx4939_crypto_desc.index */
+#define TX4939_CRYPTO_DESC_HASH_IDX_MASK 0x00000070
+#define TX4939_CRYPTO_DESC_HASH_IDX(idx) ((idx) << 4)
+#define TX4939_CRYPTO_DESC_ENCRYPT_IDX_MASK 0x00000007
+#define TX4939_CRYPTO_DESC_ENCRYPT_IDX(idx) ((idx) << 0)
+
+#define TX4939_CRYPTO_NR_SET 6
+
+#define TX4939_CRYPTO_RCSR_INTE 0x00000008
+#define TX4939_CRYPTO_RCSR_RST 0x00000004
+#define TX4939_CRYPTO_RCSR_FIN 0x00000002
+#define TX4939_CRYPTO_RCSR_ST 0x00000001
+
+/*
+ * VPC
+ */
+#define TX4939_VPC_CSR_GBINT 0x00010000
+#define TX4939_VPC_CSR_SWAPO 0x00000020
+#define TX4939_VPC_CSR_SWAPI 0x00000010
+#define TX4939_VPC_CSR_GINTE 0x00000008
+#define TX4939_VPC_CSR_RSTD 0x00000004
+#define TX4939_VPC_CSR_RSTVPC 0x00000002
+
+#define TX4939_VPC_CTRLA_VDPSN 0x00000200
+#define TX4939_VPC_CTRLA_PBUSY 0x00000100
+#define TX4939_VPC_CTRLA_DCINT 0x00000080
+#define TX4939_VPC_CTRLA_UOINT 0x00000040
+#define TX4939_VPC_CTRLA_PDINT_MASK 0x00000030
+#define TX4939_VPC_CTRLA_PDINT_ALL 0x00000000
+#define TX4939_VPC_CTRLA_PDINT_NEXT 0x00000010
+#define TX4939_VPC_CTRLA_PDINT_NONE 0x00000030
+#define TX4939_VPC_CTRLA_VDVLDP 0x00000008
+#define TX4939_VPC_CTRLA_VDMODE 0x00000004
+#define TX4939_VPC_CTRLA_VDFOR 0x00000002
+#define TX4939_VPC_CTRLA_ENVPC 0x00000001
+
+/* bits for tx4939_vpc_desc.ctrl1 */
+#define TX4939_VPC_DESC_CTRL1_ERR_MASK 0x00000006
+#define TX4939_VPC_DESC_CTRL1_OWN 0x00000001
+
+#define tx4939_ddrcptr ((struct tx4939_ddrc_reg __iomem *)TX4939_DDRC_REG)
+#define tx4939_ebuscptr tx4938_ebuscptr
+#define tx4939_ircptr \
+ ((struct tx4939_irc_reg __iomem *)TX4939_IRC_REG)
+#define tx4939_pcicptr tx4938_pcicptr
+#define tx4939_pcic1ptr tx4938_pcic1ptr
+#define tx4939_ccfgptr \
+ ((struct tx4939_ccfg_reg __iomem *)TX4939_CCFG_REG)
+#define tx4939_sramcptr tx4938_sramcptr
+#define tx4939_rtcptr \
+ ((struct tx4939_rtc_reg __iomem *)TX4939_RTC_REG)
+#define tx4939_cryptoptr \
+ ((struct tx4939_crypto_reg __iomem *)TX4939_CRYPTO_REG)
+#define tx4939_vpcptr ((struct tx4939_vpc_reg __iomem *)TX4939_VPC_REG)
+
+#define TX4939_REV_MAJ_MIN() \
+ ((__u32)__raw_readq(&tx4939_ccfgptr->crir) & 0x00ff)
+#define TX4939_REV_PCODE() \
+ ((__u32)__raw_readq(&tx4939_ccfgptr->crir) >> 16)
+#define TX4939_CCFG_BCFG() \
+ ((__u32)((__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_BCFG_MASK) \
+ >> 32))
+
+#define tx4939_ccfg_clear(bits) tx4938_ccfg_clear(bits)
+#define tx4939_ccfg_set(bits) tx4938_ccfg_set(bits)
+#define tx4939_ccfg_change(change, new) tx4938_ccfg_change(change, new)
+
+#define TX4939_EBUSC_CR(ch) TX4927_EBUSC_CR(ch)
+#define TX4939_EBUSC_BA(ch) TX4927_EBUSC_BA(ch)
+#define TX4939_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch)
+#define TX4939_EBUSC_WIDTH(ch) \
+ (16 >> ((__u32)(TX4939_EBUSC_CR(ch) >> 20) & 0x1))
+
+/* SCLK0 = MSTCLK * 429/19 * 16/245 / 2 (14.745MHz for MST 20MHz) */
+#define TX4939_SCLK0(mst) \
+ ((((mst) + 245/2) / 245UL * 429 * 16 + 19) / 19 / 2)
+
+void tx4939_wdt_init(void);
+void tx4939_add_memory_regions(void);
+void tx4939_setup(void);
+void tx4939_time_init(unsigned int tmrnr);
+void tx4939_sio_init(unsigned int sclk, unsigned int cts_mask);
+void tx4939_spi_init(int busid);
+void tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1);
+int tx4939_report_pciclk(void);
+void tx4939_report_pci1clk(void);
+struct pci_dev;
+int tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
+int tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+void tx4939_setup_pcierr_irq(void);
+void tx4939_irq_init(void);
+int tx4939_irq(void);
+void tx4939_mtd_init(int ch);
+void tx4939_ata_init(void);
+
+#endif /* __ASM_TXX9_TX4939_H */
diff --git a/trunk/include/asm-mips/txx9irq.h b/trunk/arch/mips/include/asm/txx9irq.h
similarity index 100%
rename from trunk/include/asm-mips/txx9irq.h
rename to trunk/arch/mips/include/asm/txx9irq.h
diff --git a/trunk/include/asm-mips/txx9pio.h b/trunk/arch/mips/include/asm/txx9pio.h
similarity index 100%
rename from trunk/include/asm-mips/txx9pio.h
rename to trunk/arch/mips/include/asm/txx9pio.h
diff --git a/trunk/include/asm-mips/txx9tmr.h b/trunk/arch/mips/include/asm/txx9tmr.h
similarity index 100%
rename from trunk/include/asm-mips/txx9tmr.h
rename to trunk/arch/mips/include/asm/txx9tmr.h
diff --git a/trunk/include/asm-mips/types.h b/trunk/arch/mips/include/asm/types.h
similarity index 100%
rename from trunk/include/asm-mips/types.h
rename to trunk/arch/mips/include/asm/types.h
diff --git a/trunk/include/asm-mips/uaccess.h b/trunk/arch/mips/include/asm/uaccess.h
similarity index 74%
rename from trunk/include/asm-mips/uaccess.h
rename to trunk/arch/mips/include/asm/uaccess.h
index 66523d610950..09ff5bb17445 100644
--- a/trunk/include/asm-mips/uaccess.h
+++ b/trunk/arch/mips/include/asm/uaccess.h
@@ -13,7 +13,6 @@
#include
#include
#include
-#include
/*
* The fs value determines whether argument validity checking should be
@@ -224,7 +223,7 @@ do { \
#define __get_user_nocheck(x, ptr, size) \
({ \
- long __gu_err; \
+ int __gu_err; \
\
__get_user_common((x), size, ptr); \
__gu_err; \
@@ -232,7 +231,7 @@ do { \
#define __get_user_check(x, ptr, size) \
({ \
- long __gu_err = -EFAULT; \
+ int __gu_err = -EFAULT; \
const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
\
if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \
@@ -304,7 +303,7 @@ do { \
#define __put_user_nocheck(x, ptr, size) \
({ \
__typeof__(*(ptr)) __pu_val; \
- long __pu_err = 0; \
+ int __pu_err = 0; \
\
__pu_val = (x); \
switch (size) { \
@@ -321,7 +320,7 @@ do { \
({ \
__typeof__(*(ptr)) __user *__pu_addr = (ptr); \
__typeof__(*(ptr)) __pu_val = (x); \
- long __pu_err = -EFAULT; \
+ int __pu_err = -EFAULT; \
\
if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
switch (size) { \
@@ -373,6 +372,269 @@ do { \
extern void __put_user_unknown(void);
+/*
+ * put_user_unaligned: - Write a simple value into user space.
+ * @x: Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define put_user_unaligned(x,ptr) \
+ __put_user_unaligned_check((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * get_user_unaligned: - Get a simple variable from user space.
+ * @x: Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define get_user_unaligned(x,ptr) \
+ __get_user_unaligned_check((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * __put_user_unaligned: - Write a simple value into user space, with less checking.
+ * @x: Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define __put_user_unaligned(x,ptr) \
+ __put_user_unaligned_nocheck((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * __get_user_unaligned: - Get a simple variable from user space, with less checking.
+ * @x: Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only. This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space. It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define __get_user_unaligned(x,ptr) \
+ __get_user__unalignednocheck((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * Yuck. We need two variants, one for 64bit operation and one
+ * for 32 bit mode and old iron.
+ */
+#ifdef CONFIG_32BIT
+#define __GET_USER_UNALIGNED_DW(val, ptr) \
+ __get_user_unaligned_asm_ll32(val, ptr)
+#endif
+#ifdef CONFIG_64BIT
+#define __GET_USER_UNALIGNED_DW(val, ptr) \
+ __get_user_unaligned_asm(val, "uld", ptr)
+#endif
+
+extern void __get_user_unaligned_unknown(void);
+
+#define __get_user_unaligned_common(val, size, ptr) \
+do { \
+ switch (size) { \
+ case 1: __get_user_asm(val, "lb", ptr); break; \
+ case 2: __get_user_unaligned_asm(val, "ulh", ptr); break; \
+ case 4: __get_user_unaligned_asm(val, "ulw", ptr); break; \
+ case 8: __GET_USER_UNALIGNED_DW(val, ptr); break; \
+ default: __get_user_unaligned_unknown(); break; \
+ } \
+} while (0)
+
+#define __get_user_unaligned_nocheck(x,ptr,size) \
+({ \
+ int __gu_err; \
+ \
+ __get_user_unaligned_common((x), size, ptr); \
+ __gu_err; \
+})
+
+#define __get_user_unaligned_check(x,ptr,size) \
+({ \
+ int __gu_err = -EFAULT; \
+ const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \
+ \
+ if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \
+ __get_user_unaligned_common((x), size, __gu_ptr); \
+ \
+ __gu_err; \
+})
+
+#define __get_user_unaligned_asm(val, insn, addr) \
+{ \
+ long __gu_tmp; \
+ \
+ __asm__ __volatile__( \
+ "1: " insn " %1, %3 \n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " "__UA_ADDR "\t1b, 3b \n" \
+ " "__UA_ADDR "\t1b + 4, 3b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=r" (__gu_tmp) \
+ : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
+ \
+ (val) = (__typeof__(*(addr))) __gu_tmp; \
+}
+
+/*
+ * Get a long long 64 using 32 bit registers.
+ */
+#define __get_user_unaligned_asm_ll32(val, addr) \
+{ \
+ unsigned long long __gu_tmp; \
+ \
+ __asm__ __volatile__( \
+ "1: ulw %1, (%3) \n" \
+ "2: ulw %D1, 4(%3) \n" \
+ " move %0, $0 \n" \
+ "3: .section .fixup,\"ax\" \n" \
+ "4: li %0, %4 \n" \
+ " move %1, $0 \n" \
+ " move %D1, $0 \n" \
+ " j 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 4b \n" \
+ " " __UA_ADDR " 1b + 4, 4b \n" \
+ " " __UA_ADDR " 2b, 4b \n" \
+ " " __UA_ADDR " 2b + 4, 4b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=&r" (__gu_tmp) \
+ : "0" (0), "r" (addr), "i" (-EFAULT)); \
+ (val) = (__typeof__(*(addr))) __gu_tmp; \
+}
+
+/*
+ * Yuck. We need two variants, one for 64bit operation and one
+ * for 32 bit mode and old iron.
+ */
+#ifdef CONFIG_32BIT
+#define __PUT_USER_UNALIGNED_DW(ptr) __put_user_unaligned_asm_ll32(ptr)
+#endif
+#ifdef CONFIG_64BIT
+#define __PUT_USER_UNALIGNED_DW(ptr) __put_user_unaligned_asm("usd", ptr)
+#endif
+
+#define __put_user_unaligned_nocheck(x,ptr,size) \
+({ \
+ __typeof__(*(ptr)) __pu_val; \
+ int __pu_err = 0; \
+ \
+ __pu_val = (x); \
+ switch (size) { \
+ case 1: __put_user_asm("sb", ptr); break; \
+ case 2: __put_user_unaligned_asm("ush", ptr); break; \
+ case 4: __put_user_unaligned_asm("usw", ptr); break; \
+ case 8: __PUT_USER_UNALIGNED_DW(ptr); break; \
+ default: __put_user_unaligned_unknown(); break; \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_unaligned_check(x,ptr,size) \
+({ \
+ __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
+ __typeof__(*(ptr)) __pu_val = (x); \
+ int __pu_err = -EFAULT; \
+ \
+ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \
+ switch (size) { \
+ case 1: __put_user_asm("sb", __pu_addr); break; \
+ case 2: __put_user_unaligned_asm("ush", __pu_addr); break; \
+ case 4: __put_user_unaligned_asm("usw", __pu_addr); break; \
+ case 8: __PUT_USER_UNALGINED_DW(__pu_addr); break; \
+ default: __put_user_unaligned_unknown(); break; \
+ } \
+ } \
+ __pu_err; \
+})
+
+#define __put_user_unaligned_asm(insn, ptr) \
+{ \
+ __asm__ __volatile__( \
+ "1: " insn " %z2, %3 # __put_user_unaligned_asm\n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (__pu_err) \
+ : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), \
+ "i" (-EFAULT)); \
+}
+
+#define __put_user_unaligned_asm_ll32(ptr) \
+{ \
+ __asm__ __volatile__( \
+ "1: sw %2, (%3) # __put_user_unaligned_asm_ll32 \n" \
+ "2: sw %D2, 4(%3) \n" \
+ "3: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "4: li %0, %4 \n" \
+ " j 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 4b \n" \
+ " " __UA_ADDR " 1b + 4, 4b \n" \
+ " " __UA_ADDR " 2b, 4b \n" \
+ " " __UA_ADDR " 2b + 4, 4b \n" \
+ " .previous" \
+ : "=r" (__pu_err) \
+ : "0" (0), "r" (__pu_val), "r" (ptr), \
+ "i" (-EFAULT)); \
+}
+
+extern void __put_user_unaligned_unknown(void);
+
/*
* We're generating jump to subroutines which will be outside the range of
* jump instructions
diff --git a/trunk/include/asm-mips/ucontext.h b/trunk/arch/mips/include/asm/ucontext.h
similarity index 100%
rename from trunk/include/asm-mips/ucontext.h
rename to trunk/arch/mips/include/asm/ucontext.h
diff --git a/trunk/include/asm-mips/unaligned.h b/trunk/arch/mips/include/asm/unaligned.h
similarity index 100%
rename from trunk/include/asm-mips/unaligned.h
rename to trunk/arch/mips/include/asm/unaligned.h
diff --git a/trunk/include/asm-mips/unistd.h b/trunk/arch/mips/include/asm/unistd.h
similarity index 100%
rename from trunk/include/asm-mips/unistd.h
rename to trunk/arch/mips/include/asm/unistd.h
diff --git a/trunk/include/asm-mips/user.h b/trunk/arch/mips/include/asm/user.h
similarity index 100%
rename from trunk/include/asm-mips/user.h
rename to trunk/arch/mips/include/asm/user.h
diff --git a/trunk/include/asm-mips/vga.h b/trunk/arch/mips/include/asm/vga.h
similarity index 100%
rename from trunk/include/asm-mips/vga.h
rename to trunk/arch/mips/include/asm/vga.h
diff --git a/trunk/include/asm-mips/vpe.h b/trunk/arch/mips/include/asm/vpe.h
similarity index 100%
rename from trunk/include/asm-mips/vpe.h
rename to trunk/arch/mips/include/asm/vpe.h
diff --git a/trunk/include/asm-mips/vr41xx/capcella.h b/trunk/arch/mips/include/asm/vr41xx/capcella.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/capcella.h
rename to trunk/arch/mips/include/asm/vr41xx/capcella.h
diff --git a/trunk/include/asm-mips/vr41xx/giu.h b/trunk/arch/mips/include/asm/vr41xx/giu.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/giu.h
rename to trunk/arch/mips/include/asm/vr41xx/giu.h
diff --git a/trunk/include/asm-mips/vr41xx/irq.h b/trunk/arch/mips/include/asm/vr41xx/irq.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/irq.h
rename to trunk/arch/mips/include/asm/vr41xx/irq.h
diff --git a/trunk/include/asm-mips/vr41xx/mpc30x.h b/trunk/arch/mips/include/asm/vr41xx/mpc30x.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/mpc30x.h
rename to trunk/arch/mips/include/asm/vr41xx/mpc30x.h
diff --git a/trunk/include/asm-mips/vr41xx/pci.h b/trunk/arch/mips/include/asm/vr41xx/pci.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/pci.h
rename to trunk/arch/mips/include/asm/vr41xx/pci.h
diff --git a/trunk/include/asm-mips/vr41xx/siu.h b/trunk/arch/mips/include/asm/vr41xx/siu.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/siu.h
rename to trunk/arch/mips/include/asm/vr41xx/siu.h
diff --git a/trunk/include/asm-mips/vr41xx/tb0219.h b/trunk/arch/mips/include/asm/vr41xx/tb0219.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/tb0219.h
rename to trunk/arch/mips/include/asm/vr41xx/tb0219.h
diff --git a/trunk/include/asm-mips/vr41xx/tb0226.h b/trunk/arch/mips/include/asm/vr41xx/tb0226.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/tb0226.h
rename to trunk/arch/mips/include/asm/vr41xx/tb0226.h
diff --git a/trunk/include/asm-mips/vr41xx/tb0287.h b/trunk/arch/mips/include/asm/vr41xx/tb0287.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/tb0287.h
rename to trunk/arch/mips/include/asm/vr41xx/tb0287.h
diff --git a/trunk/include/asm-mips/vr41xx/vr41xx.h b/trunk/arch/mips/include/asm/vr41xx/vr41xx.h
similarity index 100%
rename from trunk/include/asm-mips/vr41xx/vr41xx.h
rename to trunk/arch/mips/include/asm/vr41xx/vr41xx.h
diff --git a/trunk/include/asm-mips/war.h b/trunk/arch/mips/include/asm/war.h
similarity index 100%
rename from trunk/include/asm-mips/war.h
rename to trunk/arch/mips/include/asm/war.h
diff --git a/trunk/arch/mips/include/asm/watch.h b/trunk/arch/mips/include/asm/watch.h
new file mode 100644
index 000000000000..20126ec79359
--- /dev/null
+++ b/trunk/arch/mips/include/asm/watch.h
@@ -0,0 +1,32 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 David Daney
+ */
+#ifndef _ASM_WATCH_H
+#define _ASM_WATCH_H
+
+#include
+
+#include
+
+void mips_install_watch_registers(void);
+void mips_read_watch_registers(void);
+void mips_clear_watch_registers(void);
+void mips_probe_watch_registers(struct cpuinfo_mips *c);
+
+#ifdef CONFIG_HARDWARE_WATCHPOINTS
+#define __restore_watch() do { \
+ if (unlikely(test_bit(TIF_LOAD_WATCH, \
+ ¤t_thread_info()->flags))) { \
+ mips_install_watch_registers(); \
+ } \
+} while (0)
+
+#else
+#define __restore_watch() do {} while (0)
+#endif
+
+#endif /* _ASM_WATCH_H */
diff --git a/trunk/include/asm-mips/wbflush.h b/trunk/arch/mips/include/asm/wbflush.h
similarity index 100%
rename from trunk/include/asm-mips/wbflush.h
rename to trunk/arch/mips/include/asm/wbflush.h
diff --git a/trunk/include/asm-mips/xor.h b/trunk/arch/mips/include/asm/xor.h
similarity index 100%
rename from trunk/include/asm-mips/xor.h
rename to trunk/arch/mips/include/asm/xor.h
diff --git a/trunk/include/asm-mips/xtalk/xtalk.h b/trunk/arch/mips/include/asm/xtalk/xtalk.h
similarity index 100%
rename from trunk/include/asm-mips/xtalk/xtalk.h
rename to trunk/arch/mips/include/asm/xtalk/xtalk.h
diff --git a/trunk/include/asm-mips/xtalk/xwidget.h b/trunk/arch/mips/include/asm/xtalk/xwidget.h
similarity index 100%
rename from trunk/include/asm-mips/xtalk/xwidget.h
rename to trunk/arch/mips/include/asm/xtalk/xwidget.h
diff --git a/trunk/arch/mips/kernel/Makefile b/trunk/arch/mips/kernel/Makefile
index 25775cb54000..d9da7112aaf8 100644
--- a/trunk/arch/mips/kernel/Makefile
+++ b/trunk/arch/mips/kernel/Makefile
@@ -6,7 +6,7 @@ extra-y := head.o init_task.o vmlinux.lds
obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
ptrace.o reset.o setup.o signal.o syscall.o \
- time.o topology.o traps.o unaligned.o
+ time.o topology.o traps.o unaligned.o watch.o
obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o
obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o
diff --git a/trunk/arch/mips/kernel/cpu-probe.c b/trunk/arch/mips/kernel/cpu-probe.c
index e621fda8ab37..0cf15457ecac 100644
--- a/trunk/arch/mips/kernel/cpu-probe.c
+++ b/trunk/arch/mips/kernel/cpu-probe.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
@@ -677,6 +678,7 @@ static inline void spram_config(void) {}
static inline void cpu_probe_mips(struct cpuinfo_mips *c)
{
decode_configs(c);
+ mips_probe_watch_registers(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_4KC:
c->cputype = CPU_4KC;
diff --git a/trunk/arch/mips/kernel/genex.S b/trunk/arch/mips/kernel/genex.S
index 01dcbe38fa01..757d48f0d80f 100644
--- a/trunk/arch/mips/kernel/genex.S
+++ b/trunk/arch/mips/kernel/genex.S
@@ -453,7 +453,11 @@ NESTED(nmi_handler, PT_SIZE, sp)
BUILD_HANDLER tr tr sti silent /* #13 */
BUILD_HANDLER fpe fpe fpe silent /* #15 */
BUILD_HANDLER mdmx mdmx sti silent /* #22 */
+#ifdef CONFIG_HARDWARE_WATCHPOINTS
+ BUILD_HANDLER watch watch sti silent /* #23 */
+#else
BUILD_HANDLER watch watch sti verbose /* #23 */
+#endif
BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
BUILD_HANDLER mt mt sti silent /* #25 */
BUILD_HANDLER dsp dsp sti silent /* #26 */
diff --git a/trunk/arch/mips/kernel/proc.c b/trunk/arch/mips/kernel/proc.c
index 36f065398243..75bb1300dd7a 100644
--- a/trunk/arch/mips/kernel/proc.c
+++ b/trunk/arch/mips/kernel/proc.c
@@ -23,6 +23,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
unsigned int version = cpu_data[n].processor_id;
unsigned int fp_vers = cpu_data[n].fpu_id;
char fmt [64];
+ int i;
#ifdef CONFIG_SMP
if (!cpu_isset(n, cpu_online_map))
@@ -50,8 +51,16 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
seq_printf(m, "extra interrupt vector\t: %s\n",
cpu_has_divec ? "yes" : "no");
- seq_printf(m, "hardware watchpoint\t: %s\n",
- cpu_has_watch ? "yes" : "no");
+ seq_printf(m, "hardware watchpoint\t: %s",
+ cpu_has_watch ? "yes, " : "no\n");
+ if (cpu_has_watch) {
+ seq_printf(m, "count: %d, address/irw mask: [",
+ cpu_data[n].watch_reg_count);
+ for (i = 0; i < cpu_data[n].watch_reg_count; i++)
+ seq_printf(m, "%s0x%04x", i ? ", " : "" ,
+ cpu_data[n].watch_reg_masks[i]);
+ seq_printf(m, "]\n");
+ }
seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
cpu_has_mips16 ? " mips16" : "",
cpu_has_mdmx ? " mdmx" : "",
diff --git a/trunk/arch/mips/kernel/ptrace.c b/trunk/arch/mips/kernel/ptrace.c
index 96ffc9c6d194..054861ccb4dd 100644
--- a/trunk/arch/mips/kernel/ptrace.c
+++ b/trunk/arch/mips/kernel/ptrace.c
@@ -46,7 +46,8 @@
*/
void ptrace_disable(struct task_struct *child)
{
- /* Nothing to do.. */
+ /* Don't load the watchpoint registers for the ex-child. */
+ clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
}
/*
@@ -167,6 +168,93 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
return 0;
}
+int ptrace_get_watch_regs(struct task_struct *child,
+ struct pt_watch_regs __user *addr)
+{
+ enum pt_watch_style style;
+ int i;
+
+ if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
+ return -EIO;
+ if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
+ return -EIO;
+
+#ifdef CONFIG_32BIT
+ style = pt_watch_style_mips32;
+#define WATCH_STYLE mips32
+#else
+ style = pt_watch_style_mips64;
+#define WATCH_STYLE mips64
+#endif
+
+ __put_user(style, &addr->style);
+ __put_user(current_cpu_data.watch_reg_use_cnt,
+ &addr->WATCH_STYLE.num_valid);
+ for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+ __put_user(child->thread.watch.mips3264.watchlo[i],
+ &addr->WATCH_STYLE.watchlo[i]);
+ __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
+ &addr->WATCH_STYLE.watchhi[i]);
+ __put_user(current_cpu_data.watch_reg_masks[i],
+ &addr->WATCH_STYLE.watch_masks[i]);
+ }
+ for (; i < 8; i++) {
+ __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
+ __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
+ __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
+ }
+
+ return 0;
+}
+
+int ptrace_set_watch_regs(struct task_struct *child,
+ struct pt_watch_regs __user *addr)
+{
+ int i;
+ int watch_active = 0;
+ unsigned long lt[NUM_WATCH_REGS];
+ u16 ht[NUM_WATCH_REGS];
+
+ if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0)
+ return -EIO;
+ if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
+ return -EIO;
+ /* Check the values. */
+ for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+ __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
+#ifdef CONFIG_32BIT
+ if (lt[i] & __UA_LIMIT)
+ return -EINVAL;
+#else
+ if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
+ if (lt[i] & 0xffffffff80000000UL)
+ return -EINVAL;
+ } else {
+ if (lt[i] & __UA_LIMIT)
+ return -EINVAL;
+ }
+#endif
+ __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
+ if (ht[i] & ~0xff8)
+ return -EINVAL;
+ }
+ /* Install them. */
+ for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) {
+ if (lt[i] & 7)
+ watch_active = 1;
+ child->thread.watch.mips3264.watchlo[i] = lt[i];
+ /* Set the G bit. */
+ child->thread.watch.mips3264.watchhi[i] = ht[i];
+ }
+
+ if (watch_active)
+ set_tsk_thread_flag(child, TIF_LOAD_WATCH);
+ else
+ clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
+
+ return 0;
+}
+
long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
int ret;
@@ -440,6 +528,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
(unsigned long __user *) data);
break;
+ case PTRACE_GET_WATCH_REGS:
+ ret = ptrace_get_watch_regs(child,
+ (struct pt_watch_regs __user *) addr);
+ break;
+
+ case PTRACE_SET_WATCH_REGS:
+ ret = ptrace_set_watch_regs(child,
+ (struct pt_watch_regs __user *) addr);
+ break;
+
default:
ret = ptrace_request(child, request, addr, data);
break;
diff --git a/trunk/arch/mips/kernel/ptrace32.c b/trunk/arch/mips/kernel/ptrace32.c
index 76818be6ba7c..1ca34104e593 100644
--- a/trunk/arch/mips/kernel/ptrace32.c
+++ b/trunk/arch/mips/kernel/ptrace32.c
@@ -15,6 +15,7 @@
* binaries.
*/
#include
+#include
#include
#include
#include
@@ -36,47 +37,17 @@
#include
#include
-int ptrace_getregs(struct task_struct *child, __s64 __user *data);
-int ptrace_setregs(struct task_struct *child, __s64 __user *data);
-
-int ptrace_getfpregs(struct task_struct *child, __u32 __user *data);
-int ptrace_setfpregs(struct task_struct *child, __u32 __user *data);
-
/*
* Tracing a 32-bit process with a 64-bit strace and vice versa will not
* work. I don't know how to fix this.
*/
-asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
+long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+ compat_ulong_t caddr, compat_ulong_t cdata)
{
- struct task_struct *child;
+ int addr = caddr;
+ int data = cdata;
int ret;
-#if 0
- printk("ptrace(r=%d,pid=%d,addr=%08lx,data=%08lx)\n",
- (int) request, (int) pid, (unsigned long) addr,
- (unsigned long) data);
-#endif
- lock_kernel();
- if (request == PTRACE_TRACEME) {
- ret = ptrace_traceme();
- goto out;
- }
-
- child = ptrace_get_task_struct(pid);
- if (IS_ERR(child)) {
- ret = PTR_ERR(child);
- goto out;
- }
-
- if (request == PTRACE_ATTACH) {
- ret = ptrace_attach(child);
- goto out_tsk;
- }
-
- ret = ptrace_check_attach(child, request == PTRACE_KILL);
- if (ret < 0)
- goto out_tsk;
-
switch (request) {
/* when I and D space are separate, these will need to be fixed. */
case PTRACE_PEEKTEXT: /* read word at location addr. */
@@ -214,7 +185,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
if (!cpu_has_dsp) {
tmp = 0;
ret = -EIO;
- goto out_tsk;
+ goto out;
}
dregs = __get_dsp_regs(child);
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
@@ -224,14 +195,14 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
if (!cpu_has_dsp) {
tmp = 0;
ret = -EIO;
- goto out_tsk;
+ goto out;
}
tmp = child->thread.dsp.dspcontrol;
break;
default:
tmp = 0;
ret = -EIO;
- goto out_tsk;
+ goto out;
}
ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
break;
@@ -410,14 +381,20 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
(unsigned long __user *) (unsigned long) data);
break;
+ case PTRACE_GET_WATCH_REGS:
+ ret = ptrace_get_watch_regs(child,
+ (struct pt_watch_regs __user *) (unsigned long) addr);
+ break;
+
+ case PTRACE_SET_WATCH_REGS:
+ ret = ptrace_set_watch_regs(child,
+ (struct pt_watch_regs __user *) (unsigned long) addr);
+ break;
+
default:
ret = ptrace_request(child, request, addr, data);
break;
}
-
-out_tsk:
- put_task_struct(child);
out:
- unlock_kernel();
return ret;
}
diff --git a/trunk/arch/mips/kernel/scall64-n32.S b/trunk/arch/mips/kernel/scall64-n32.S
index da7f1b6ea0fb..324c5499dec2 100644
--- a/trunk/arch/mips/kernel/scall64-n32.S
+++ b/trunk/arch/mips/kernel/scall64-n32.S
@@ -219,7 +219,7 @@ EXPORT(sysn32_call_table)
PTR compat_sys_getrusage
PTR compat_sys_sysinfo
PTR compat_sys_times
- PTR sys32_ptrace
+ PTR compat_sys_ptrace
PTR sys_getuid /* 6100 */
PTR sys_syslog
PTR sys_getgid
diff --git a/trunk/arch/mips/kernel/scall64-o32.S b/trunk/arch/mips/kernel/scall64-o32.S
index d7cd1aac9ada..85fedac99a57 100644
--- a/trunk/arch/mips/kernel/scall64-o32.S
+++ b/trunk/arch/mips/kernel/scall64-o32.S
@@ -231,7 +231,7 @@ sys_call_table:
PTR sys_setuid
PTR sys_getuid
PTR compat_sys_stime /* 4025 */
- PTR sys32_ptrace
+ PTR compat_sys_ptrace
PTR sys_alarm
PTR sys_ni_syscall /* was sys_fstat */
PTR sys_pause
diff --git a/trunk/arch/mips/kernel/signal32.c b/trunk/arch/mips/kernel/signal32.c
index 572c610db1b1..652709b353ad 100644
--- a/trunk/arch/mips/kernel/signal32.c
+++ b/trunk/arch/mips/kernel/signal32.c
@@ -482,6 +482,18 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
return err;
}
+int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
+{
+ memset(to, 0, sizeof *to);
+
+ if (copy_from_user(to, from, 3*sizeof(int)) ||
+ copy_from_user(to->_sifields._pad,
+ from->_sifields._pad, SI_PAD_SIZE32))
+ return -EFAULT;
+
+ return 0;
+}
+
asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs)
{
struct sigframe32 __user *frame;
diff --git a/trunk/arch/mips/kernel/smp.c b/trunk/arch/mips/kernel/smp.c
index 4410f172b8ab..7b59cfb7e602 100644
--- a/trunk/arch/mips/kernel/smp.c
+++ b/trunk/arch/mips/kernel/smp.c
@@ -121,6 +121,8 @@ asmlinkage __cpuinit void start_secondary(void)
cpu = smp_processor_id();
cpu_data[cpu].udelay_val = loops_per_jiffy;
+ notify_cpu_starting(cpu);
+
mp_ops->smp_finish();
set_cpu_sibling_map(cpu);
diff --git a/trunk/arch/mips/kernel/traps.c b/trunk/arch/mips/kernel/traps.c
index b602ac6eb47d..80b9e070c207 100644
--- a/trunk/arch/mips/kernel/traps.c
+++ b/trunk/arch/mips/kernel/traps.c
@@ -42,6 +42,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -912,13 +913,26 @@ asmlinkage void do_mdmx(struct pt_regs *regs)
asmlinkage void do_watch(struct pt_regs *regs)
{
+ u32 cause;
+
/*
- * We use the watch exception where available to detect stack
- * overflows.
+ * Clear WP (bit 22) bit of cause register so we don't loop
+ * forever.
*/
- dump_tlb_all();
- show_regs(regs);
- panic("Caught WATCH exception - probably caused by stack overflow.");
+ cause = read_c0_cause();
+ cause &= ~(1 << 22);
+ write_c0_cause(cause);
+
+ /*
+ * If the current thread has the watch registers loaded, save
+ * their values and send SIGTRAP. Otherwise another thread
+ * left the registers set, clear them and continue.
+ */
+ if (test_tsk_thread_flag(current, TIF_LOAD_WATCH)) {
+ mips_read_watch_registers();
+ force_sig(SIGTRAP, current);
+ } else
+ mips_clear_watch_registers();
}
asmlinkage void do_mcheck(struct pt_regs *regs)
diff --git a/trunk/arch/mips/kernel/watch.c b/trunk/arch/mips/kernel/watch.c
new file mode 100644
index 000000000000..c15406968030
--- /dev/null
+++ b/trunk/arch/mips/kernel/watch.c
@@ -0,0 +1,188 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 David Daney
+ */
+
+#include
+
+#include
+#include
+
+/*
+ * Install the watch registers for the current thread. A maximum of
+ * four registers are installed although the machine may have more.
+ */
+void mips_install_watch_registers(void)
+{
+ struct mips3264_watch_reg_state *watches =
+ ¤t->thread.watch.mips3264;
+ switch (current_cpu_data.watch_reg_use_cnt) {
+ default:
+ BUG();
+ case 4:
+ write_c0_watchlo3(watches->watchlo[3]);
+ /* Write 1 to the I, R, and W bits to clear them, and
+ 1 to G so all ASIDs are trapped. */
+ write_c0_watchhi3(0x40000007 | watches->watchhi[3]);
+ case 3:
+ write_c0_watchlo2(watches->watchlo[2]);
+ write_c0_watchhi2(0x40000007 | watches->watchhi[2]);
+ case 2:
+ write_c0_watchlo1(watches->watchlo[1]);
+ write_c0_watchhi1(0x40000007 | watches->watchhi[1]);
+ case 1:
+ write_c0_watchlo0(watches->watchlo[0]);
+ write_c0_watchhi0(0x40000007 | watches->watchhi[0]);
+ }
+}
+
+/*
+ * Read back the watchhi registers so the user space debugger has
+ * access to the I, R, and W bits. A maximum of four registers are
+ * read although the machine may have more.
+ */
+void mips_read_watch_registers(void)
+{
+ struct mips3264_watch_reg_state *watches =
+ ¤t->thread.watch.mips3264;
+ switch (current_cpu_data.watch_reg_use_cnt) {
+ default:
+ BUG();
+ case 4:
+ watches->watchhi[3] = (read_c0_watchhi3() & 0x0fff);
+ case 3:
+ watches->watchhi[2] = (read_c0_watchhi2() & 0x0fff);
+ case 2:
+ watches->watchhi[1] = (read_c0_watchhi1() & 0x0fff);
+ case 1:
+ watches->watchhi[0] = (read_c0_watchhi0() & 0x0fff);
+ }
+ if (current_cpu_data.watch_reg_use_cnt == 1 &&
+ (watches->watchhi[0] & 7) == 0) {
+ /* Pathological case of release 1 architecture that
+ * doesn't set the condition bits. We assume that
+ * since we got here, the watch condition was met and
+ * signal that the conditions requested in watchlo
+ * were met. */
+ watches->watchhi[0] |= (watches->watchlo[0] & 7);
+ }
+ }
+
+/*
+ * Disable all watch registers. Although only four registers are
+ * installed, all are cleared to eliminate the possibility of endless
+ * looping in the watch handler.
+ */
+void mips_clear_watch_registers(void)
+{
+ switch (current_cpu_data.watch_reg_count) {
+ default:
+ BUG();
+ case 8:
+ write_c0_watchlo7(0);
+ case 7:
+ write_c0_watchlo6(0);
+ case 6:
+ write_c0_watchlo5(0);
+ case 5:
+ write_c0_watchlo4(0);
+ case 4:
+ write_c0_watchlo3(0);
+ case 3:
+ write_c0_watchlo2(0);
+ case 2:
+ write_c0_watchlo1(0);
+ case 1:
+ write_c0_watchlo0(0);
+ }
+}
+
+__cpuinit void mips_probe_watch_registers(struct cpuinfo_mips *c)
+{
+ unsigned int t;
+
+ if ((c->options & MIPS_CPU_WATCH) == 0)
+ return;
+ /*
+ * Check which of the I,R and W bits are supported, then
+ * disable the register.
+ */
+ write_c0_watchlo0(7);
+ t = read_c0_watchlo0();
+ write_c0_watchlo0(0);
+ c->watch_reg_masks[0] = t & 7;
+
+ /* Write the mask bits and read them back to determine which
+ * can be used. */
+ c->watch_reg_count = 1;
+ c->watch_reg_use_cnt = 1;
+ t = read_c0_watchhi0();
+ write_c0_watchhi0(t | 0xff8);
+ t = read_c0_watchhi0();
+ c->watch_reg_masks[0] |= (t & 0xff8);
+ if ((t & 0x80000000) == 0)
+ return;
+
+ write_c0_watchlo1(7);
+ t = read_c0_watchlo1();
+ write_c0_watchlo1(0);
+ c->watch_reg_masks[1] = t & 7;
+
+ c->watch_reg_count = 2;
+ c->watch_reg_use_cnt = 2;
+ t = read_c0_watchhi1();
+ write_c0_watchhi1(t | 0xff8);
+ t = read_c0_watchhi1();
+ c->watch_reg_masks[1] |= (t & 0xff8);
+ if ((t & 0x80000000) == 0)
+ return;
+
+ write_c0_watchlo2(7);
+ t = read_c0_watchlo2();
+ write_c0_watchlo2(0);
+ c->watch_reg_masks[2] = t & 7;
+
+ c->watch_reg_count = 3;
+ c->watch_reg_use_cnt = 3;
+ t = read_c0_watchhi2();
+ write_c0_watchhi2(t | 0xff8);
+ t = read_c0_watchhi2();
+ c->watch_reg_masks[2] |= (t & 0xff8);
+ if ((t & 0x80000000) == 0)
+ return;
+
+ write_c0_watchlo3(7);
+ t = read_c0_watchlo3();
+ write_c0_watchlo3(0);
+ c->watch_reg_masks[3] = t & 7;
+
+ c->watch_reg_count = 4;
+ c->watch_reg_use_cnt = 4;
+ t = read_c0_watchhi3();
+ write_c0_watchhi3(t | 0xff8);
+ t = read_c0_watchhi3();
+ c->watch_reg_masks[3] |= (t & 0xff8);
+ if ((t & 0x80000000) == 0)
+ return;
+
+ /* We use at most 4, but probe and report up to 8. */
+ c->watch_reg_count = 5;
+ t = read_c0_watchhi4();
+ if ((t & 0x80000000) == 0)
+ return;
+
+ c->watch_reg_count = 6;
+ t = read_c0_watchhi5();
+ if ((t & 0x80000000) == 0)
+ return;
+
+ c->watch_reg_count = 7;
+ t = read_c0_watchhi6();
+ if ((t & 0x80000000) == 0)
+ return;
+
+ c->watch_reg_count = 8;
+}
diff --git a/trunk/arch/mips/lib/csum_partial.S b/trunk/arch/mips/lib/csum_partial.S
index edac9892c51a..6b876ca299ee 100644
--- a/trunk/arch/mips/lib/csum_partial.S
+++ b/trunk/arch/mips/lib/csum_partial.S
@@ -55,20 +55,14 @@
#define UNIT(unit) ((unit)*NBYTES)
#define ADDC(sum,reg) \
- .set push; \
- .set noat; \
ADD sum, reg; \
sltu v1, sum, reg; \
ADD sum, v1; \
- .set pop
#define ADDC32(sum,reg) \
- .set push; \
- .set noat; \
addu sum, reg; \
sltu v1, sum, reg; \
addu sum, v1; \
- .set pop
#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \
LOAD _t0, (offset + UNIT(0))(src); \
@@ -267,8 +261,6 @@ LEAF(csum_partial)
1: ADDC(sum, t1)
/* fold checksum */
- .set push
- .set noat
#ifdef USE_DOUBLE
dsll32 v1, sum, 0
daddu sum, v1
@@ -276,21 +268,22 @@ LEAF(csum_partial)
dsra32 sum, sum, 0
addu sum, v1
#endif
- sll v1, sum, 16
- addu sum, v1
- sltu v1, sum, v1
- srl sum, sum, 16
- addu sum, v1
/* odd buffer alignment? */
- beqz t7, 1f
- nop
- sll v1, sum, 8
+#ifdef CPU_MIPSR2
+ wsbh v1, sum
+ movn sum, v1, t7
+#else
+ beqz t7, 1f /* odd buffer alignment? */
+ lui v1, 0x00ff
+ addu v1, 0x00ff
+ and t0, sum, v1
+ sll t0, t0, 8
srl sum, sum, 8
- or sum, v1
- andi sum, 0xffff
- .set pop
+ and sum, sum, v1
+ or sum, sum, t0
1:
+#endif
.set reorder
/* Add the passed partial csum. */
ADDC32(sum, a2)
@@ -669,8 +662,6 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc)
ADDC(sum, t2)
.Ldone:
/* fold checksum */
- .set push
- .set noat
#ifdef USE_DOUBLE
dsll32 v1, sum, 0
daddu sum, v1
@@ -678,21 +669,21 @@ EXC( sb t0, NBYTES-2(dst), .Ls_exc)
dsra32 sum, sum, 0
addu sum, v1
#endif
- sll v1, sum, 16
- addu sum, v1
- sltu v1, sum, v1
- srl sum, sum, 16
- addu sum, v1
- /* odd buffer alignment? */
- beqz odd, 1f
- nop
- sll v1, sum, 8
+#ifdef CPU_MIPSR2
+ wsbh v1, sum
+ movn sum, v1, odd
+#else
+ beqz odd, 1f /* odd buffer alignment? */
+ lui v1, 0x00ff
+ addu v1, 0x00ff
+ and t0, sum, v1
+ sll t0, t0, 8
srl sum, sum, 8
- or sum, v1
- andi sum, 0xffff
- .set pop
+ and sum, sum, v1
+ or sum, sum, t0
1:
+#endif
.set reorder
ADDC32(sum, psum)
jr ra
diff --git a/trunk/arch/mips/pci/Makefile b/trunk/arch/mips/pci/Makefile
index c8c32f417b6c..b1886244cedf 100644
--- a/trunk/arch/mips/pci/Makefile
+++ b/trunk/arch/mips/pci/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
+obj-$(CONFIG_SOC_TX4939) += pci-tx4939.o
obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
diff --git a/trunk/arch/mips/pci/pci-tx4938.c b/trunk/arch/mips/pci/pci-tx4938.c
index 60e2c52c2c5e..1ea257bc3b8f 100644
--- a/trunk/arch/mips/pci/pci-tx4938.c
+++ b/trunk/arch/mips/pci/pci-tx4938.c
@@ -114,7 +114,7 @@ int __init tx4938_pciclk66_setup(void)
return pciclk;
}
-int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+int __init tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
{
if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
switch (slot) {
diff --git a/trunk/arch/mips/pci/pci-tx4939.c b/trunk/arch/mips/pci/pci-tx4939.c
new file mode 100644
index 000000000000..5fecf1cdc325
--- /dev/null
+++ b/trunk/arch/mips/pci/pci-tx4939.c
@@ -0,0 +1,109 @@
+/*
+ * linux/arch/mips/pci/pci-tx4939.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+
+int __init tx4939_report_pciclk(void)
+{
+ int pciclk = 0;
+
+ pr_info("PCIC --%s PCICLK:",
+ (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
+ " PCI66" : "");
+ if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
+ pciclk = txx9_master_clock * 20 / 6;
+ if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
+ pciclk /= 2;
+ printk(KERN_CONT "Internal(%u.%uMHz)",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+ } else {
+ printk(KERN_CONT "External");
+ pciclk = -1;
+ }
+ printk(KERN_CONT "\n");
+ return pciclk;
+}
+
+void __init tx4939_report_pci1clk(void)
+{
+ unsigned int pciclk = txx9_master_clock * 20 / 6;
+
+ pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+}
+
+int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+{
+ if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
+ switch (slot) {
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
+ if (__raw_readq(&tx4939_ccfgptr->pcfg) &
+ TX4939_PCFG_ET0MODE)
+ return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
+ break;
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
+ if (__raw_readq(&tx4939_ccfgptr->pcfg) &
+ TX4939_PCFG_ET1MODE)
+ return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
+ break;
+ }
+ return 0;
+ }
+ return -1;
+}
+
+int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq = tx4939_pcic1_map_irq(dev, slot);
+
+ if (irq >= 0)
+ return irq;
+ irq = pin;
+ /* IRQ rotation */
+ irq--; /* 0-3 */
+ irq = (irq + 33 - slot) % 4;
+ irq++; /* 1-4 */
+
+ switch (irq) {
+ case 1:
+ irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
+ break;
+ case 2:
+ irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
+ break;
+ case 3:
+ irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
+ break;
+ case 4:
+ irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
+ break;
+ }
+ return irq;
+}
+
+void __init tx4939_setup_pcierr_irq(void)
+{
+ if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
+ tx4927_pcierr_interrupt,
+ IRQF_DISABLED, "PCI error",
+ (void *)TX4939_PCIC_REG))
+ pr_warning("Failed to request irq for PCIERR\n");
+}
diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/Makefile b/trunk/arch/mips/pmc-sierra/msp71xx/Makefile
index 4bba79c1cc79..e107f79b1491 100644
--- a/trunk/arch/mips/pmc-sierra/msp71xx/Makefile
+++ b/trunk/arch/mips/pmc-sierra/msp71xx/Makefile
@@ -3,6 +3,7 @@
#
obj-y += msp_prom.o msp_setup.o msp_irq.o \
msp_time.o msp_serial.o msp_elb.o
+obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o
obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o
obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o
obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o
diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/gpio.c b/trunk/arch/mips/pmc-sierra/msp71xx/gpio.c
new file mode 100644
index 000000000000..69848c5813e2
--- /dev/null
+++ b/trunk/arch/mips/pmc-sierra/msp71xx/gpio.c
@@ -0,0 +1,218 @@
+/*
+ * @file /arch/mips/pmc-sierra/msp71xx/gpio.c
+ *
+ * Generic PMC MSP71xx GPIO handling. These base gpio are controlled by two
+ * types of registers. The data register sets the output level when in output
+ * mode and when in input mode will contain the value at the input. The config
+ * register sets the various modes for each gpio.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * @author Patrick Glass
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MSP71XX_CFG_OFFSET(gpio) (4 * (gpio))
+#define CONF_MASK 0x0F
+#define MSP71XX_GPIO_INPUT 0x01
+#define MSP71XX_GPIO_OUTPUT 0x08
+
+#define MSP71XX_GPIO_BASE 0x0B8400000L
+
+#define to_msp71xx_gpio_chip(c) container_of(c, struct msp71xx_gpio_chip, chip)
+
+static spinlock_t gpio_lock;
+
+/*
+ * struct msp71xx_gpio_chip - container for gpio chip and registers
+ * @chip: chip structure for the specified gpio bank
+ * @data_reg: register for reading and writing the gpio pin value
+ * @config_reg: register to set the mode for the gpio pin bank
+ * @out_drive_reg: register to set the output drive mode for the gpio pin bank
+ */
+struct msp71xx_gpio_chip {
+ struct gpio_chip chip;
+ void __iomem *data_reg;
+ void __iomem *config_reg;
+ void __iomem *out_drive_reg;
+};
+
+/*
+ * msp71xx_gpio_get() - return the chip's gpio value
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose value will be returned
+ *
+ * It will return 0 if gpio value is low and other if high.
+ */
+static int msp71xx_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
+
+ return __raw_readl(msp_chip->data_reg) & (1 << offset);
+}
+
+/*
+ * msp71xx_gpio_set() - set the output value for the gpio
+ * @chip: chip structure who controls the specified gpio
+ * @offset: gpio whose value will be assigned
+ * @value: logic level to assign to the gpio initially
+ *
+ * This will set the gpio bit specified to the desired value. It will set the
+ * gpio pin low if value is 0 otherwise it will be high.
+ */
+static void msp71xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
+ unsigned long flags;
+ u32 data;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ data = __raw_readl(msp_chip->data_reg);
+ if (value)
+ data |= (1 << offset);
+ else
+ data &= ~(1 << offset);
+ __raw_writel(data, msp_chip->data_reg);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+}
+
+/*
+ * msp71xx_set_gpio_mode() - declare the mode for a gpio
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose value will be assigned
+ * @mode: desired configuration for the gpio (see datasheet)
+ *
+ * It will set the gpio pin config to the @mode value passed in.
+ */
+static int msp71xx_set_gpio_mode(struct gpio_chip *chip,
+ unsigned offset, int mode)
+{
+ struct msp71xx_gpio_chip *msp_chip = to_msp71xx_gpio_chip(chip);
+ const unsigned bit_offset = MSP71XX_CFG_OFFSET(offset);
+ unsigned long flags;
+ u32 cfg;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ cfg = __raw_readl(msp_chip->config_reg);
+ cfg &= ~(CONF_MASK << bit_offset);
+ cfg |= (mode << bit_offset);
+ __raw_writel(cfg, msp_chip->config_reg);
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ return 0;
+}
+
+/*
+ * msp71xx_direction_output() - declare the direction mode for a gpio
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose value will be assigned
+ * @value: logic level to assign to the gpio initially
+ *
+ * This call will set the mode for the @gpio to output. It will set the
+ * gpio pin low if value is 0 otherwise it will be high.
+ */
+static int msp71xx_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ msp71xx_gpio_set(chip, offset, value);
+
+ return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_OUTPUT);
+}
+
+/*
+ * msp71xx_direction_input() - declare the direction mode for a gpio
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose to which the value will be assigned
+ *
+ * This call will set the mode for the @gpio to input.
+ */
+static int msp71xx_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ return msp71xx_set_gpio_mode(chip, offset, MSP71XX_GPIO_INPUT);
+}
+
+/*
+ * msp71xx_set_output_drive() - declare the output drive for the gpio line
+ * @gpio: gpio pin whose output drive you wish to modify
+ * @value: zero for active drain 1 for open drain drive
+ *
+ * This call will set the output drive mode for the @gpio to output.
+ */
+int msp71xx_set_output_drive(unsigned gpio, int value)
+{
+ unsigned long flags;
+ u32 data;
+
+ if (gpio > 15 || gpio < 0)
+ return -EINVAL;
+
+ spin_lock_irqsave(&gpio_lock, flags);
+
+ data = __raw_readl((void __iomem *)(MSP71XX_GPIO_BASE + 0x190));
+ if (value)
+ data |= (1 << gpio);
+ else
+ data &= ~(1 << gpio);
+ __raw_writel(data, (void __iomem *)(MSP71XX_GPIO_BASE + 0x190));
+
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(msp71xx_set_output_drive);
+
+#define MSP71XX_GPIO_BANK(name, dr, cr, base_gpio, num_gpio) \
+{ \
+ .chip = { \
+ .label = name, \
+ .direction_input = msp71xx_direction_input, \
+ .direction_output = msp71xx_direction_output, \
+ .get = msp71xx_gpio_get, \
+ .set = msp71xx_gpio_set, \
+ .base = base_gpio, \
+ .ngpio = num_gpio \
+ }, \
+ .data_reg = (void __iomem *)(MSP71XX_GPIO_BASE + dr), \
+ .config_reg = (void __iomem *)(MSP71XX_GPIO_BASE + cr), \
+ .out_drive_reg = (void __iomem *)(MSP71XX_GPIO_BASE + 0x190), \
+}
+
+/*
+ * struct msp71xx_gpio_banks[] - container array of gpio banks
+ * @chip: chip structure for the specified gpio bank
+ * @data_reg: register for reading and writing the gpio pin value
+ * @config_reg: register to set the mode for the gpio pin bank
+ *
+ * This array structure defines the gpio banks for the PMC MIPS Processor.
+ * We specify the bank name, the data register, the config register, base
+ * starting gpio number, and the number of gpios exposed by the bank.
+ */
+static struct msp71xx_gpio_chip msp71xx_gpio_banks[] = {
+
+ MSP71XX_GPIO_BANK("GPIO_1_0", 0x170, 0x180, 0, 2),
+ MSP71XX_GPIO_BANK("GPIO_5_2", 0x174, 0x184, 2, 4),
+ MSP71XX_GPIO_BANK("GPIO_9_6", 0x178, 0x188, 6, 4),
+ MSP71XX_GPIO_BANK("GPIO_15_10", 0x17C, 0x18C, 10, 6),
+};
+
+void __init msp71xx_init_gpio(void)
+{
+ int i;
+
+ spin_lock_init(&gpio_lock);
+
+ for (i = 0; i < ARRAY_SIZE(msp71xx_gpio_banks); i++)
+ gpiochip_add(&msp71xx_gpio_banks[i].chip);
+}
diff --git a/trunk/arch/mips/pmc-sierra/msp71xx/gpio_extended.c b/trunk/arch/mips/pmc-sierra/msp71xx/gpio_extended.c
new file mode 100644
index 000000000000..fc6dbc6cf1c0
--- /dev/null
+++ b/trunk/arch/mips/pmc-sierra/msp71xx/gpio_extended.c
@@ -0,0 +1,148 @@
+/*
+ * @file /arch/mips/pmc-sierra/msp71xx/gpio_extended.c
+ *
+ * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
+ * a set of hardware registers that have no need for explicit locking as
+ * it is handled by unique method of writing individual set/clr bits.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * @author Patrick Glass
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define MSP71XX_DATA_OFFSET(gpio) (2 * (gpio))
+#define MSP71XX_READ_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 1)
+#define MSP71XX_CFG_OUT_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 16)
+#define MSP71XX_CFG_IN_OFFSET(gpio) (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
+
+#define MSP71XX_EXD_GPIO_BASE 0x0BC000000L
+
+#define to_msp71xx_exd_gpio_chip(c) \
+ container_of(c, struct msp71xx_exd_gpio_chip, chip)
+
+/*
+ * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
+ * @chip: chip structure for the specified gpio bank
+ * @reg: register for control and data of gpio pin
+ */
+struct msp71xx_exd_gpio_chip {
+ struct gpio_chip chip;
+ void __iomem *reg;
+};
+
+/*
+ * msp71xx_exd_gpio_get() - return the chip's gpio value
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose value will be returned
+ *
+ * It will return 0 if gpio value is low and other if high.
+ */
+static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct msp71xx_exd_gpio_chip *msp71xx_chip =
+ to_msp71xx_exd_gpio_chip(chip);
+ const unsigned bit = MSP71XX_READ_OFFSET(offset);
+
+ return __raw_readl(msp71xx_chip->reg) & (1 << bit);
+}
+
+/*
+ * msp71xx_exd_gpio_set() - set the output value for the gpio
+ * @chip: chip structure who controls the specified gpio
+ * @offset: gpio whose value will be assigned
+ * @value: logic level to assign to the gpio initially
+ *
+ * This will set the gpio bit specified to the desired value. It will set the
+ * gpio pin low if value is 0 otherwise it will be high.
+ */
+static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct msp71xx_exd_gpio_chip *msp71xx_chip =
+ to_msp71xx_exd_gpio_chip(chip);
+ const unsigned bit = MSP71XX_DATA_OFFSET(offset);
+
+ __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
+}
+
+/*
+ * msp71xx_exd_direction_output() - declare the direction mode for a gpio
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose value will be assigned
+ * @value: logic level to assign to the gpio initially
+ *
+ * This call will set the mode for the @gpio to output. It will set the
+ * gpio pin low if value is 0 otherwise it will be high.
+ */
+static int msp71xx_exd_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ struct msp71xx_exd_gpio_chip *msp71xx_chip =
+ to_msp71xx_exd_gpio_chip(chip);
+
+ msp71xx_exd_gpio_set(chip, offset, value);
+ __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
+ return 0;
+}
+
+/*
+ * msp71xx_exd_direction_input() - declare the direction mode for a gpio
+ * @chip: chip structure which controls the specified gpio
+ * @offset: gpio whose to which the value will be assigned
+ *
+ * This call will set the mode for the @gpio to input.
+ */
+static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ struct msp71xx_exd_gpio_chip *msp71xx_chip =
+ to_msp71xx_exd_gpio_chip(chip);
+
+ __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
+ return 0;
+}
+
+#define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
+{ \
+ .chip = { \
+ .label = name, \
+ .direction_input = msp71xx_exd_direction_input, \
+ .direction_output = msp71xx_exd_direction_output, \
+ .get = msp71xx_exd_gpio_get, \
+ .set = msp71xx_exd_gpio_set, \
+ .base = base_gpio, \
+ .ngpio = num_gpio, \
+ }, \
+ .reg = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
+}
+
+/*
+ * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
+ * @chip: chip structure for the specified gpio bank
+ * @reg: register for reading and writing the gpio pin value
+ *
+ * This array structure defines the extended gpio banks for the
+ * PMC MIPS Processor. We specify the bank name, the data/config
+ * register,the base starting gpio number, and the number of
+ * gpios exposed by the bank of gpios.
+ */
+static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
+
+ MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
+ MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
+};
+
+void __init msp71xx_init_gpio_extended(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
+ gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
+}
diff --git a/trunk/arch/mips/rb532/devices.c b/trunk/arch/mips/rb532/devices.c
index 82ab395efa33..31619c601b11 100644
--- a/trunk/arch/mips/rb532/devices.c
+++ b/trunk/arch/mips/rb532/devices.c
@@ -34,21 +34,11 @@
#include
#include
#include
-
-#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
-#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
-#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
-#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
+#include
#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
-/* NAND definitions */
-#define GPIO_RDY (1 << 0x08)
-#define GPIO_WPX (1 << 0x09)
-#define GPIO_ALE (1 << 0x0a)
-#define GPIO_CLE (1 << 0x0b)
-
static struct resource korina_dev0_res[] = {
{
.name = "korina_regs",
@@ -94,15 +84,13 @@ static struct korina_device korina_dev0_data = {
};
static struct platform_device korina_dev0 = {
- .id = 0,
+ .id = -1,
.name = "korina",
.dev.platform_data = &korina_dev0_data,
.resource = korina_dev0_res,
.num_resources = ARRAY_SIZE(korina_dev0_res),
};
-#define CF_GPIO_NUM 13
-
static struct resource cf_slot0_res[] = {
{
.name = "cf_membase",
@@ -116,11 +104,11 @@ static struct resource cf_slot0_res[] = {
};
static struct cf_device cf_slot0_data = {
- .gpio_pin = 13
+ .gpio_pin = CF_GPIO_NUM
};
static struct platform_device cf_slot0 = {
- .id = 0,
+ .id = -1,
.name = "pata-rb532-cf",
.dev.platform_data = &cf_slot0_data,
.resource = cf_slot0_res,
@@ -185,7 +173,7 @@ static struct mtd_partition rb532_partition_info[] = {
static struct platform_device rb532_led = {
.name = "rb532-led",
- .id = 0,
+ .id = -1,
};
static struct gpio_keys_button rb532_gpio_btn[] = {
diff --git a/trunk/arch/mips/rb532/gpio.c b/trunk/arch/mips/rb532/gpio.c
index 00a1c7877bf4..76a7fd96d564 100644
--- a/trunk/arch/mips/rb532/gpio.c
+++ b/trunk/arch/mips/rb532/gpio.c
@@ -27,28 +27,31 @@
*/
#include
-#include
#include
#include
-#include
#include
-#include
#include
-
-#include
+#include
#include
-
-struct rb532_gpio_reg __iomem *rb532_gpio_reg0;
-EXPORT_SYMBOL(rb532_gpio_reg0);
+#include
+
+struct rb532_gpio_chip {
+ struct gpio_chip chip;
+ void __iomem *regbase;
+ void (*set_int_level)(struct gpio_chip *chip, unsigned offset, int value);
+ int (*get_int_level)(struct gpio_chip *chip, unsigned offset);
+ void (*set_int_status)(struct gpio_chip *chip, unsigned offset, int value);
+ int (*get_int_status)(struct gpio_chip *chip, unsigned offset);
+};
struct mpmc_device dev3;
static struct resource rb532_gpio_reg0_res[] = {
{
.name = "gpio_reg0",
- .start = (u32)(IDT434_REG_BASE + GPIOBASE),
- .end = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)),
+ .start = REGBASE + GPIOBASE,
+ .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
.flags = IORESOURCE_MEM,
}
};
@@ -56,8 +59,8 @@ static struct resource rb532_gpio_reg0_res[] = {
static struct resource rb532_dev3_ctl_res[] = {
{
.name = "dev3_ctl",
- .start = (u32)(IDT434_REG_BASE + DEV3BASE),
- .end = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)),
+ .start = REGBASE + DEV3BASE,
+ .end = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
.flags = IORESOURCE_MEM,
}
};
@@ -70,7 +73,7 @@ void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
spin_lock_irqsave(&dev3.lock, flags);
- data = *(volatile unsigned *) (IDT434_REG_BASE + reg_offs);
+ data = readl(IDT434_REG_BASE + reg_offs);
for (i = 0; i != len; ++i) {
if (val & (1 << i))
data |= (1 << (i + bit));
@@ -108,108 +111,199 @@ unsigned char get_latch_u5(void)
}
EXPORT_SYMBOL(get_latch_u5);
-int rb532_gpio_get_value(unsigned gpio)
+/*
+ * Return GPIO level */
+static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpiod) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOD) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_value);
-void rb532_gpio_set_value(unsigned gpio, int value)
+/*
+ * Set output GPIO level
+ */
+static void rb532_gpio_set(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpvr;
- tmp = readl(&rb532_gpio_reg0->gpiod) & ~(1 << gpio);
- if (value)
- tmp |= 1 << gpio;
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpvr = gpch->regbase + GPIOD;
- writel(tmp, (void *)&rb532_gpio_reg0->gpiod);
+ local_irq_save(flags);
+ tmp = readl(gpvr);
+ if (value)
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpvr);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_value);
-int rb532_gpio_direction_input(unsigned gpio)
+/*
+ * Set GPIO direction to input
+ */
+static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- writel(readl(&rb532_gpio_reg0->gpiocfg) & ~(1 << gpio),
- (void *)&rb532_gpio_reg0->gpiocfg);
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 value;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpdr;
- return 0;
-}
-EXPORT_SYMBOL(rb532_gpio_direction_input);
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpdr = gpch->regbase + GPIOCFG;
-int rb532_gpio_direction_output(unsigned gpio, int value)
-{
- gpio_set_value(gpio, value);
- writel(readl(&rb532_gpio_reg0->gpiocfg) | (1 << gpio),
- (void *)&rb532_gpio_reg0->gpiocfg);
+ local_irq_save(flags);
+ value = readl(gpdr);
+ value &= ~mask;
+ writel(value, gpdr);
+ local_irq_restore(flags);
return 0;
}
-EXPORT_SYMBOL(rb532_gpio_direction_output);
-void rb532_gpio_set_int_level(unsigned gpio, int value)
+/*
+ * Set GPIO direction to output
+ */
+static int rb532_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpdr;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ writel(mask, gpch->regbase + GPIOD);
+ gpdr = gpch->regbase + GPIOCFG;
+
+ local_irq_save(flags);
+ tmp = readl(gpdr);
+ tmp |= mask;
+ writel(tmp, gpdr);
+ local_irq_restore(flags);
- tmp = readl(&rb532_gpio_reg0->gpioilevel) & ~(1 << gpio);
- if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpioilevel);
+ return 0;
}
-EXPORT_SYMBOL(rb532_gpio_set_int_level);
-int rb532_gpio_get_int_level(unsigned gpio)
+/*
+ * Set the GPIO interrupt level
+ */
+static void rb532_gpio_set_int_level(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- return readl(&rb532_gpio_reg0->gpioilevel) & (1 << gpio);
-}
-EXPORT_SYMBOL(rb532_gpio_get_int_level);
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpil;
-void rb532_gpio_set_int_status(unsigned gpio, int value)
-{
- unsigned tmp;
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpil = gpch->regbase + GPIOILEVEL;
- tmp = readl(&rb532_gpio_reg0->gpioistat);
+ local_irq_save(flags);
+ tmp = readl(gpil);
if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpioistat);
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpil);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_int_status);
-int rb532_gpio_get_int_status(unsigned gpio)
+/*
+ * Get the GPIO interrupt level
+ */
+static int rb532_gpio_get_int_level(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpioistat) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOILEVEL) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_int_status);
-void rb532_gpio_set_func(unsigned gpio, int value)
+/*
+ * Set the GPIO interrupt status
+ */
+static void rb532_gpio_set_int_status(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpis;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpis = gpch->regbase + GPIOISTAT;
- tmp = readl(&rb532_gpio_reg0->gpiofunc);
+ local_irq_save(flags);
+ tmp = readl(gpis);
if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpiofunc);
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpis);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_func);
-int rb532_gpio_get_func(unsigned gpio)
+/*
+ * Get the GPIO interrupt status
+ */
+static int rb532_gpio_get_int_status(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpiofunc) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOISTAT) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_func);
+
+static struct rb532_gpio_chip rb532_gpio_chip[] = {
+ [0] = {
+ .chip = {
+ .label = "gpio0",
+ .direction_input = rb532_gpio_direction_input,
+ .direction_output = rb532_gpio_direction_output,
+ .get = rb532_gpio_get,
+ .set = rb532_gpio_set,
+ .base = 0,
+ .ngpio = 32,
+ },
+ .get_int_level = rb532_gpio_get_int_level,
+ .set_int_level = rb532_gpio_set_int_level,
+ .get_int_status = rb532_gpio_get_int_status,
+ .set_int_status = rb532_gpio_set_int_status,
+ },
+};
int __init rb532_gpio_init(void)
{
- rb532_gpio_reg0 = ioremap_nocache(rb532_gpio_reg0_res[0].start,
- rb532_gpio_reg0_res[0].end -
- rb532_gpio_reg0_res[0].start);
+ struct resource *r;
- if (!rb532_gpio_reg0) {
+ r = rb532_gpio_reg0_res;
+ rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start);
+
+ if (!rb532_gpio_chip->regbase) {
printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
return -ENXIO;
}
- dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start,
- rb532_dev3_ctl_res[0].end -
- rb532_dev3_ctl_res[0].start);
+ /* Register our GPIO chip */
+ gpiochip_add(&rb532_gpio_chip->chip);
+
+ r = rb532_dev3_ctl_res;
+ dev3.base = ioremap_nocache(r->start, r->end - r->start);
if (!dev3.base) {
printk(KERN_ERR "rb532: cannot remap device controller 3\n");
diff --git a/trunk/arch/mips/rb532/irq.c b/trunk/arch/mips/rb532/irq.c
index c0d0f950caf2..549b46d2fcee 100644
--- a/trunk/arch/mips/rb532/irq.c
+++ b/trunk/arch/mips/rb532/irq.c
@@ -45,7 +45,7 @@
#include
#include
-#include
+#include
struct intr_group {
u32 mask; /* mask of valid bits in pending/mask registers */
diff --git a/trunk/arch/mips/rb532/prom.c b/trunk/arch/mips/rb532/prom.c
index 1bc0af8febf4..46ca24dbcc2d 100644
--- a/trunk/arch/mips/rb532/prom.c
+++ b/trunk/arch/mips/rb532/prom.c
@@ -37,12 +37,8 @@
#include
#include
-extern void __init setup_serial_port(void);
-
unsigned int idt_cpu_freq = 132000000;
EXPORT_SYMBOL(idt_cpu_freq);
-unsigned int gpio_bootup_state;
-EXPORT_SYMBOL(gpio_bootup_state);
static struct resource ddr_reg[] = {
{
@@ -108,9 +104,6 @@ void __init prom_setup_cmdline(void)
mips_machtype = MACH_MIKROTIK_RB532;
}
- if (match_tag(prom_argv[i], GPIO_TAG))
- gpio_bootup_state = tag2ul(prom_argv[i], GPIO_TAG);
-
strcpy(cp, prom_argv[i]);
cp += strlen(prom_argv[i]);
}
@@ -122,11 +115,6 @@ void __init prom_setup_cmdline(void)
strcpy(cp, arcs_cmdline);
cp += strlen(arcs_cmdline);
}
- if (gpio_bootup_state & 0x02)
- strcpy(cp, GPIO_INIT_NOBUTTON);
- else
- strcpy(cp, GPIO_INIT_BUTTON);
-
cmd_line[CL_SIZE-1] = '\0';
strcpy(arcs_cmdline, cmd_line);
diff --git a/trunk/arch/mips/rb532/serial.c b/trunk/arch/mips/rb532/serial.c
index 1a05b5ddee09..3e0d7ec3a579 100644
--- a/trunk/arch/mips/rb532/serial.c
+++ b/trunk/arch/mips/rb532/serial.c
@@ -31,16 +31,16 @@
#include
#include
-#include
+#include
extern unsigned int idt_cpu_freq;
static struct uart_port rb532_uart = {
.type = PORT_16550A,
.line = 0,
- .irq = RC32434_UART0_IRQ,
+ .irq = UART0_IRQ,
.iotype = UPIO_MEM,
- .membase = (char *)KSEG1ADDR(RC32434_UART0_BASE),
+ .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
.regshift = 2
};
diff --git a/trunk/arch/mips/rb532/setup.c b/trunk/arch/mips/rb532/setup.c
index 7aafa95ac20b..50f530f5b602 100644
--- a/trunk/arch/mips/rb532/setup.c
+++ b/trunk/arch/mips/rb532/setup.c
@@ -9,7 +9,7 @@
#include
#include
-#include
+#include
#include
struct pci_reg __iomem *pci_reg;
@@ -27,7 +27,7 @@ static struct resource pci0_res[] = {
static void rb_machine_restart(char *command)
{
/* just jump to the reset vector */
- writel(0x80000001, (void *)KSEG1ADDR(RC32434_REG_BASE + RC32434_RST));
+ writel(0x80000001, IDT434_REG_BASE + RST);
((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
}
diff --git a/trunk/arch/mips/txx9/Kconfig b/trunk/arch/mips/txx9/Kconfig
index 840fe757c48d..17052db4161d 100644
--- a/trunk/arch/mips/txx9/Kconfig
+++ b/trunk/arch/mips/txx9/Kconfig
@@ -45,6 +45,14 @@ config TOSHIBA_RBTX4938
This Toshiba board is based on the TX4938 processor. Say Y here to
support this machine type
+config TOSHIBA_RBTX4939
+ bool "Toshiba RBTX4939 bobard"
+ depends on MACH_TX49XX
+ select SOC_TX4939
+ help
+ This Toshiba board is based on the TX4939 processor. Say Y here to
+ support this machine type
+
config SOC_TX3927
bool
select CEVT_TXX9
@@ -71,6 +79,13 @@ config SOC_TX4938
select PCI_TX4927
select GPIO_TXX9
+config SOC_TX4939
+ bool
+ select CEVT_TXX9
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select PCI_TX4927
+
config TOSHIBA_FPCIB0
bool "FPCIB0 Backplane Support"
depends on PCI && MACH_TXX9
@@ -94,16 +109,11 @@ config TOSHIBA_RBTX4938_MPLEX_NAND
bool "NAND"
config TOSHIBA_RBTX4938_MPLEX_ATA
bool "ATA"
+config TOSHIBA_RBTX4938_MPLEX_KEEP
+ bool "Keep firmware settings"
endchoice
-config TX4938_NAND_BOOT
- depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND Boot Support (EXPERIMENTAL)"
- help
- This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
- Select this option if you need to use NAND boot.
-
endif
config PCI_TX4927
diff --git a/trunk/arch/mips/txx9/generic/Makefile b/trunk/arch/mips/txx9/generic/Makefile
index 9bb34af26b73..0030d23bef5b 100644
--- a/trunk/arch/mips/txx9/generic/Makefile
+++ b/trunk/arch/mips/txx9/generic/Makefile
@@ -7,6 +7,8 @@ obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_SOC_TX3927) += setup_tx3927.o irq_tx3927.o
obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o setup_tx4927.o irq_tx4927.o
obj-$(CONFIG_SOC_TX4938) += mem_tx4927.o setup_tx4938.o irq_tx4938.o
+obj-$(CONFIG_SOC_TX4939) += setup_tx4939.o irq_tx4939.o
obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
+obj-$(CONFIG_SPI) += spi_eeprom.o
EXTRA_CFLAGS += -Werror
diff --git a/trunk/arch/mips/txx9/generic/irq_tx4927.c b/trunk/arch/mips/txx9/generic/irq_tx4927.c
index cbea1fdde82b..ad2870def8f1 100644
--- a/trunk/arch/mips/txx9/generic/irq_tx4927.c
+++ b/trunk/arch/mips/txx9/generic/irq_tx4927.c
@@ -30,8 +30,19 @@
void __init tx4927_irq_init(void)
{
+ int i;
+
mips_cpu_irq_init();
txx9_irq_init(TX4927_IRC_REG & 0xfffffffffULL);
set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
handle_simple_irq);
+ /* raise priority for errors, timers, SIO */
+ txx9_irq_set_pri(TX4927_IR_ECCERR, 7);
+ txx9_irq_set_pri(TX4927_IR_WTOERR, 7);
+ txx9_irq_set_pri(TX4927_IR_PCIERR, 7);
+ txx9_irq_set_pri(TX4927_IR_PCIPME, 7);
+ for (i = 0; i < TX4927_NUM_IR_TMR; i++)
+ txx9_irq_set_pri(TX4927_IR_TMR(i), 6);
+ for (i = 0; i < TX4927_NUM_IR_SIO; i++)
+ txx9_irq_set_pri(TX4927_IR_SIO(i), 5);
}
diff --git a/trunk/arch/mips/txx9/generic/irq_tx4938.c b/trunk/arch/mips/txx9/generic/irq_tx4938.c
index 6eac684bf190..025ae11359a8 100644
--- a/trunk/arch/mips/txx9/generic/irq_tx4938.c
+++ b/trunk/arch/mips/txx9/generic/irq_tx4938.c
@@ -18,8 +18,19 @@
void __init tx4938_irq_init(void)
{
+ int i;
+
mips_cpu_irq_init();
txx9_irq_init(TX4938_IRC_REG & 0xfffffffffULL);
set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
handle_simple_irq);
+ /* raise priority for errors, timers, SIO */
+ txx9_irq_set_pri(TX4938_IR_ECCERR, 7);
+ txx9_irq_set_pri(TX4938_IR_WTOERR, 7);
+ txx9_irq_set_pri(TX4938_IR_PCIERR, 7);
+ txx9_irq_set_pri(TX4938_IR_PCIPME, 7);
+ for (i = 0; i < TX4938_NUM_IR_TMR; i++)
+ txx9_irq_set_pri(TX4938_IR_TMR(i), 6);
+ for (i = 0; i < TX4938_NUM_IR_SIO; i++)
+ txx9_irq_set_pri(TX4938_IR_SIO(i), 5);
}
diff --git a/trunk/arch/mips/txx9/generic/irq_tx4939.c b/trunk/arch/mips/txx9/generic/irq_tx4939.c
new file mode 100644
index 000000000000..013213a8706b
--- /dev/null
+++ b/trunk/arch/mips/txx9/generic/irq_tx4939.c
@@ -0,0 +1,215 @@
+/*
+ * TX4939 irq routines
+ * Based on linux/arch/mips/kernel/irq_txx9.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ * source@mvista.com
+ * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+/*
+ * TX4939 defines 64 IRQs.
+ * Similer to irq_txx9.c but different register layouts.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* IRCER : Int. Control Enable */
+#define TXx9_IRCER_ICE 0x00000001
+
+/* IRCR : Int. Control */
+#define TXx9_IRCR_LOW 0x00000000
+#define TXx9_IRCR_HIGH 0x00000001
+#define TXx9_IRCR_DOWN 0x00000002
+#define TXx9_IRCR_UP 0x00000003
+#define TXx9_IRCR_EDGE(cr) ((cr) & 0x00000002)
+
+/* IRSCR : Int. Status Control */
+#define TXx9_IRSCR_EIClrE 0x00000100
+#define TXx9_IRSCR_EIClr_MASK 0x0000000f
+
+/* IRCSR : Int. Current Status */
+#define TXx9_IRCSR_IF 0x00010000
+
+#define irc_dlevel 0
+#define irc_elevel 1
+
+static struct {
+ unsigned char level;
+ unsigned char mode;
+} tx4939irq[TX4939_NUM_IR] __read_mostly;
+
+static void tx4939_irq_unmask(unsigned int irq)
+{
+ unsigned int irq_nr = irq - TXX9_IRQ_BASE;
+ u32 __iomem *lvlp;
+ int ofs;
+ if (irq_nr < 32) {
+ irq_nr--;
+ lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r;
+ } else {
+ irq_nr -= 32;
+ lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r;
+ }
+ ofs = (irq_nr & 16) + (irq_nr & 1) * 8;
+ __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs))
+ | (tx4939irq[irq_nr].level << ofs),
+ lvlp);
+}
+
+static inline void tx4939_irq_mask(unsigned int irq)
+{
+ unsigned int irq_nr = irq - TXX9_IRQ_BASE;
+ u32 __iomem *lvlp;
+ int ofs;
+ if (irq_nr < 32) {
+ irq_nr--;
+ lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r;
+ } else {
+ irq_nr -= 32;
+ lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r;
+ }
+ ofs = (irq_nr & 16) + (irq_nr & 1) * 8;
+ __raw_writel((__raw_readl(lvlp) & ~(0xff << ofs))
+ | (irc_dlevel << ofs),
+ lvlp);
+ mmiowb();
+}
+
+static void tx4939_irq_mask_ack(unsigned int irq)
+{
+ unsigned int irq_nr = irq - TXX9_IRQ_BASE;
+
+ tx4939_irq_mask(irq);
+ if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) {
+ irq_nr--;
+ /* clear edge detection */
+ __raw_writel((TXx9_IRSCR_EIClrE | (irq_nr & 0xf))
+ << (irq_nr & 0x10),
+ &tx4939_ircptr->edc.r);
+ }
+}
+
+static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type)
+{
+ unsigned int irq_nr = irq - TXX9_IRQ_BASE;
+ u32 cr;
+ u32 __iomem *crp;
+ int ofs;
+ int mode;
+
+ if (flow_type & IRQF_TRIGGER_PROBE)
+ return 0;
+ switch (flow_type & IRQF_TRIGGER_MASK) {
+ case IRQF_TRIGGER_RISING:
+ mode = TXx9_IRCR_UP;
+ break;
+ case IRQF_TRIGGER_FALLING:
+ mode = TXx9_IRCR_DOWN;
+ break;
+ case IRQF_TRIGGER_HIGH:
+ mode = TXx9_IRCR_HIGH;
+ break;
+ case IRQF_TRIGGER_LOW:
+ mode = TXx9_IRCR_LOW;
+ break;
+ default:
+ return -EINVAL;
+ }
+ if (irq_nr < 32) {
+ irq_nr--;
+ crp = &tx4939_ircptr->dm[(irq_nr & 8) >> 3].r;
+ } else {
+ irq_nr -= 32;
+ crp = &tx4939_ircptr->dm2[((irq_nr & 8) >> 3)].r;
+ }
+ ofs = (((irq_nr & 16) >> 1) | (irq_nr & (8 - 1))) * 2;
+ cr = __raw_readl(crp);
+ cr &= ~(0x3 << ofs);
+ cr |= (mode & 0x3) << ofs;
+ __raw_writel(cr, crp);
+ tx4939irq[irq_nr].mode = mode;
+ return 0;
+}
+
+static struct irq_chip tx4939_irq_chip = {
+ .name = "TX4939",
+ .ack = tx4939_irq_mask_ack,
+ .mask = tx4939_irq_mask,
+ .mask_ack = tx4939_irq_mask_ack,
+ .unmask = tx4939_irq_unmask,
+ .set_type = tx4939_irq_set_type,
+};
+
+static int tx4939_irq_set_pri(int irc_irq, int new_pri)
+{
+ int old_pri;
+
+ if ((unsigned int)irc_irq >= TX4939_NUM_IR)
+ return 0;
+ old_pri = tx4939irq[irc_irq].level;
+ tx4939irq[irc_irq].level = new_pri;
+ return old_pri;
+}
+
+void __init tx4939_irq_init(void)
+{
+ int i;
+
+ mips_cpu_irq_init();
+ /* disable interrupt control */
+ __raw_writel(0, &tx4939_ircptr->den.r);
+ __raw_writel(0, &tx4939_ircptr->maskint.r);
+ __raw_writel(0, &tx4939_ircptr->maskext.r);
+ /* irq_base + 0 is not used */
+ for (i = 1; i < TX4939_NUM_IR; i++) {
+ tx4939irq[i].level = 4; /* middle level */
+ tx4939irq[i].mode = TXx9_IRCR_LOW;
+ set_irq_chip_and_handler(TXX9_IRQ_BASE + i,
+ &tx4939_irq_chip, handle_level_irq);
+ }
+
+ /* mask all IRC interrupts */
+ __raw_writel(0, &tx4939_ircptr->msk.r);
+ for (i = 0; i < 16; i++)
+ __raw_writel(0, &tx4939_ircptr->lvl[i].r);
+ /* setup IRC interrupt mode (Low Active) */
+ for (i = 0; i < 2; i++)
+ __raw_writel(0, &tx4939_ircptr->dm[i].r);
+ for (i = 0; i < 2; i++)
+ __raw_writel(0, &tx4939_ircptr->dm2[i].r);
+ /* enable interrupt control */
+ __raw_writel(TXx9_IRCER_ICE, &tx4939_ircptr->den.r);
+ __raw_writel(irc_elevel, &tx4939_ircptr->msk.r);
+
+ set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4939_IRC_INT,
+ handle_simple_irq);
+
+ /* raise priority for errors, timers, sio */
+ tx4939_irq_set_pri(TX4939_IR_WTOERR, 7);
+ tx4939_irq_set_pri(TX4939_IR_PCIERR, 7);
+ tx4939_irq_set_pri(TX4939_IR_PCIPME, 7);
+ for (i = 0; i < TX4939_NUM_IR_TMR; i++)
+ tx4939_irq_set_pri(TX4939_IR_TMR(i), 6);
+ for (i = 0; i < TX4939_NUM_IR_SIO; i++)
+ tx4939_irq_set_pri(TX4939_IR_SIO(i), 5);
+}
+
+int tx4939_irq(void)
+{
+ u32 csr = __raw_readl(&tx4939_ircptr->cs.r);
+
+ if (likely(!(csr & TXx9_IRCSR_IF)))
+ return TXX9_IRQ_BASE + (csr & (TX4939_NUM_IR - 1));
+ return -1;
+}
diff --git a/trunk/arch/mips/txx9/generic/setup.c b/trunk/arch/mips/txx9/generic/setup.c
index fe6bee09cece..5526375010f8 100644
--- a/trunk/arch/mips/txx9/generic/setup.c
+++ b/trunk/arch/mips/txx9/generic/setup.c
@@ -22,11 +22,16 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
+#include
+#include
#include
#include
+#include
#ifdef CONFIG_CPU_TX49XX
#include
#endif
@@ -67,7 +72,12 @@ unsigned int txx9_master_clock;
unsigned int txx9_cpu_clock;
unsigned int txx9_gbus_clock;
+#ifdef CONFIG_CPU_TX39XX
+/* don't enable by default - see errata */
+int txx9_ccfg_toeon __initdata;
+#else
int txx9_ccfg_toeon __initdata = 1;
+#endif
/* Minimum CLK support */
@@ -119,39 +129,232 @@ int irq_to_gpio(unsigned irq)
EXPORT_SYMBOL(irq_to_gpio);
#endif
-extern struct txx9_board_vec jmr3927_vec;
-extern struct txx9_board_vec rbtx4927_vec;
-extern struct txx9_board_vec rbtx4937_vec;
-extern struct txx9_board_vec rbtx4938_vec;
+#define BOARD_VEC(board) extern struct txx9_board_vec board;
+#include
+#undef BOARD_VEC
struct txx9_board_vec *txx9_board_vec __initdata;
static char txx9_system_type[32];
-void __init prom_init_cmdline(void)
+static struct txx9_board_vec *board_vecs[] __initdata = {
+#define BOARD_VEC(board) &board,
+#include
+#undef BOARD_VEC
+};
+
+static struct txx9_board_vec *__init find_board_byname(const char *name)
+{
+ int i;
+
+ /* search board_vecs table */
+ for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
+ if (strstr(board_vecs[i]->system, name))
+ return board_vecs[i];
+ }
+ return NULL;
+}
+
+static void __init prom_init_cmdline(void)
{
int argc = (int)fw_arg0;
- char **argv = (char **)fw_arg1;
+ int *argv32 = (int *)fw_arg1;
int i; /* Always ignore the "-c" at argv[0] */
-#ifdef CONFIG_64BIT
- char *fixed_argv[32];
- for (i = 0; i < argc; i++)
- fixed_argv[i] = (char *)(long)(*((__s32 *)argv + i));
- argv = fixed_argv;
-#endif
+ char builtin[CL_SIZE];
/* ignore all built-in args if any f/w args given */
- if (argc > 1)
- *arcs_cmdline = '\0';
+ /*
+ * But if built-in strings was started with '+', append them
+ * to command line args. If built-in was started with '-',
+ * ignore all f/w args.
+ */
+ builtin[0] = '\0';
+ if (arcs_cmdline[0] == '+')
+ strcpy(builtin, arcs_cmdline + 1);
+ else if (arcs_cmdline[0] == '-') {
+ strcpy(builtin, arcs_cmdline + 1);
+ argc = 0;
+ } else if (argc <= 1)
+ strcpy(builtin, arcs_cmdline);
+ arcs_cmdline[0] = '\0';
for (i = 1; i < argc; i++) {
+ char *str = (char *)(long)argv32[i];
if (i != 1)
strcat(arcs_cmdline, " ");
- strcat(arcs_cmdline, argv[i]);
+ if (strchr(str, ' ')) {
+ strcat(arcs_cmdline, "\"");
+ strcat(arcs_cmdline, str);
+ strcat(arcs_cmdline, "\"");
+ } else
+ strcat(arcs_cmdline, str);
+ }
+ /* append saved builtin args */
+ if (builtin[0]) {
+ if (arcs_cmdline[0])
+ strcat(arcs_cmdline, " ");
+ strcat(arcs_cmdline, builtin);
}
}
-void __init prom_init(void)
+static int txx9_ic_disable __initdata;
+static int txx9_dc_disable __initdata;
+
+#if defined(CONFIG_CPU_TX49XX)
+/* flush all cache on very early stage (before 4k_cache_init) */
+static void __init early_flush_dcache(void)
{
+ unsigned int conf = read_c0_config();
+ unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
+ unsigned int linesz = 32;
+ unsigned long addr, end;
+
+ end = INDEX_BASE + dc_size / 4;
+ /* 4way, waybit=0 */
+ for (addr = INDEX_BASE; addr < end; addr += linesz) {
+ cache_op(Index_Writeback_Inv_D, addr | 0);
+ cache_op(Index_Writeback_Inv_D, addr | 1);
+ cache_op(Index_Writeback_Inv_D, addr | 2);
+ cache_op(Index_Writeback_Inv_D, addr | 3);
+ }
+}
+
+static void __init txx9_cache_fixup(void)
+{
+ unsigned int conf;
+
+ conf = read_c0_config();
+ /* flush and disable */
+ if (txx9_ic_disable) {
+ conf |= TX49_CONF_IC;
+ write_c0_config(conf);
+ }
+ if (txx9_dc_disable) {
+ early_flush_dcache();
+ conf |= TX49_CONF_DC;
+ write_c0_config(conf);
+ }
+
+ /* enable cache */
+ conf = read_c0_config();
+ if (!txx9_ic_disable)
+ conf &= ~TX49_CONF_IC;
+ if (!txx9_dc_disable)
+ conf &= ~TX49_CONF_DC;
+ write_c0_config(conf);
+
+ if (conf & TX49_CONF_IC)
+ pr_info("TX49XX I-Cache disabled.\n");
+ if (conf & TX49_CONF_DC)
+ pr_info("TX49XX D-Cache disabled.\n");
+}
+#elif defined(CONFIG_CPU_TX39XX)
+/* flush all cache on very early stage (before tx39_cache_init) */
+static void __init early_flush_dcache(void)
+{
+ unsigned int conf = read_c0_config();
+ unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
+ TX39_CONF_DCS_SHIFT));
+ unsigned int linesz = 16;
+ unsigned long addr, end;
+
+ end = INDEX_BASE + dc_size / 2;
+ /* 2way, waybit=0 */
+ for (addr = INDEX_BASE; addr < end; addr += linesz) {
+ cache_op(Index_Writeback_Inv_D, addr | 0);
+ cache_op(Index_Writeback_Inv_D, addr | 1);
+ }
+}
+
+static void __init txx9_cache_fixup(void)
+{
+ unsigned int conf;
+
+ conf = read_c0_config();
+ /* flush and disable */
+ if (txx9_ic_disable) {
+ conf &= ~TX39_CONF_ICE;
+ write_c0_config(conf);
+ }
+ if (txx9_dc_disable) {
+ early_flush_dcache();
+ conf &= ~TX39_CONF_DCE;
+ write_c0_config(conf);
+ }
+
+ /* enable cache */
+ conf = read_c0_config();
+ if (!txx9_ic_disable)
+ conf |= TX39_CONF_ICE;
+ if (!txx9_dc_disable)
+ conf |= TX39_CONF_DCE;
+ write_c0_config(conf);
+
+ if (!(conf & TX39_CONF_ICE))
+ pr_info("TX39XX I-Cache disabled.\n");
+ if (!(conf & TX39_CONF_DCE))
+ pr_info("TX39XX D-Cache disabled.\n");
+}
+#else
+static inline void txx9_cache_fixup(void)
+{
+}
+#endif
+
+static void __init preprocess_cmdline(void)
+{
+ char cmdline[CL_SIZE];
+ char *s;
+
+ strcpy(cmdline, arcs_cmdline);
+ s = cmdline;
+ arcs_cmdline[0] = '\0';
+ while (s && *s) {
+ char *str = strsep(&s, " ");
+ if (strncmp(str, "board=", 6) == 0) {
+ txx9_board_vec = find_board_byname(str + 6);
+ continue;
+ } else if (strncmp(str, "masterclk=", 10) == 0) {
+ unsigned long val;
+ if (strict_strtoul(str + 10, 10, &val) == 0)
+ txx9_master_clock = val;
+ continue;
+ } else if (strcmp(str, "icdisable") == 0) {
+ txx9_ic_disable = 1;
+ continue;
+ } else if (strcmp(str, "dcdisable") == 0) {
+ txx9_dc_disable = 1;
+ continue;
+ } else if (strcmp(str, "toeoff") == 0) {
+ txx9_ccfg_toeon = 0;
+ continue;
+ } else if (strcmp(str, "toeon") == 0) {
+ txx9_ccfg_toeon = 1;
+ continue;
+ }
+ if (arcs_cmdline[0])
+ strcat(arcs_cmdline, " ");
+ strcat(arcs_cmdline, str);
+ }
+
+ txx9_cache_fixup();
+}
+
+static void __init select_board(void)
+{
+ const char *envstr;
+
+ /* first, determine by "board=" argument in preprocess_cmdline() */
+ if (txx9_board_vec)
+ return;
+ /* next, determine by "board" envvar */
+ envstr = prom_getenv("board");
+ if (envstr) {
+ txx9_board_vec = find_board_byname(envstr);
+ if (txx9_board_vec)
+ return;
+ }
+
+ /* select "default" board */
#ifdef CONFIG_CPU_TX39XX
txx9_board_vec = &jmr3927_vec;
#endif
@@ -169,9 +372,21 @@ void __init prom_init(void)
case 0x4938:
txx9_board_vec = &rbtx4938_vec;
break;
+#endif
+#ifdef CONFIG_TOSHIBA_RBTX4939
+ case 0x4939:
+ txx9_board_vec = &rbtx4939_vec;
+ break;
#endif
}
#endif
+}
+
+void __init prom_init(void)
+{
+ prom_init_cmdline();
+ preprocess_cmdline();
+ select_board();
strcpy(txx9_system_type, txx9_board_vec->system);
@@ -180,6 +395,11 @@ void __init prom_init(void)
void __init prom_free_prom_memory(void)
{
+ unsigned long saddr = PAGE_SIZE;
+ unsigned long eaddr = __pa_symbol(&_text);
+
+ if (saddr < eaddr)
+ free_init_pages("prom memory", saddr, eaddr);
}
const char *get_system_type(void)
@@ -192,6 +412,21 @@ char * __init prom_getcmdline(void)
return &(arcs_cmdline[0]);
}
+const char *__init prom_getenv(const char *name)
+{
+ const s32 *str = (const s32 *)fw_arg2;
+
+ if (!str)
+ return NULL;
+ /* YAMON style ("name", "value" pairs) */
+ while (str[0] && str[1]) {
+ if (!strcmp((const char *)(unsigned long)str[0], name))
+ return (const char *)(unsigned long)str[1];
+ str += 2;
+ }
+ return NULL;
+}
+
static void __noreturn txx9_machine_halt(void)
{
local_irq_disable();
@@ -222,6 +457,20 @@ void __init txx9_wdt_init(unsigned long base)
platform_device_register_simple("txx9wdt", -1, &res, 1);
}
+void txx9_wdt_now(unsigned long base)
+{
+ struct txx9_tmr_reg __iomem *tmrptr =
+ ioremap(base, sizeof(struct txx9_tmr_reg));
+ /* disable watch dog timer */
+ __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
+ __raw_writel(0, &tmrptr->tcr);
+ /* kick watchdog */
+ __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
+ __raw_writel(1, &tmrptr->cpra); /* immediate */
+ __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
+ &tmrptr->tcr);
+}
+
/* SPI support */
void __init txx9_spi_init(int busid, unsigned long base, int irq)
{
@@ -372,3 +621,153 @@ static unsigned long __swizzle_addr_none(unsigned long port)
unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
EXPORT_SYMBOL(__swizzle_addr_b);
#endif
+
+void __init txx9_physmap_flash_init(int no, unsigned long addr,
+ unsigned long size,
+ const struct physmap_flash_data *pdata)
+{
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+ struct resource res = {
+ .start = addr,
+ .end = addr + size - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *pdev;
+#ifdef CONFIG_MTD_PARTITIONS
+ static struct mtd_partition parts[2];
+ struct physmap_flash_data pdata_part;
+
+ /* If this area contained boot area, make separate partition */
+ if (pdata->nr_parts == 0 && !pdata->parts &&
+ addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
+ !parts[0].name) {
+ parts[0].name = "boot";
+ parts[0].offset = 0x1fc00000 - addr;
+ parts[0].size = addr + size - 0x1fc00000;
+ parts[1].name = "user";
+ parts[1].offset = 0;
+ parts[1].size = 0x1fc00000 - addr;
+ pdata_part = *pdata;
+ pdata_part.nr_parts = ARRAY_SIZE(parts);
+ pdata_part.parts = parts;
+ pdata = &pdata_part;
+ }
+#endif
+ pdev = platform_device_alloc("physmap-flash", no);
+ if (!pdev ||
+ platform_device_add_resources(pdev, &res, 1) ||
+ platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
+ platform_device_add(pdev))
+ platform_device_put(pdev);
+#endif
+}
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static DEFINE_SPINLOCK(txx9_iocled_lock);
+
+#define TXX9_IOCLED_MAXLEDS 8
+
+struct txx9_iocled_data {
+ struct gpio_chip chip;
+ u8 cur_val;
+ void __iomem *mmioaddr;
+ struct gpio_led_platform_data pdata;
+ struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
+ char names[TXX9_IOCLED_MAXLEDS][32];
+};
+
+static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
+{
+ struct txx9_iocled_data *data =
+ container_of(chip, struct txx9_iocled_data, chip);
+ return data->cur_val & (1 << offset);
+}
+
+static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
+ int value)
+{
+ struct txx9_iocled_data *data =
+ container_of(chip, struct txx9_iocled_data, chip);
+ unsigned long flags;
+ spin_lock_irqsave(&txx9_iocled_lock, flags);
+ if (value)
+ data->cur_val |= 1 << offset;
+ else
+ data->cur_val &= ~(1 << offset);
+ writeb(data->cur_val, data->mmioaddr);
+ mmiowb();
+ spin_unlock_irqrestore(&txx9_iocled_lock, flags);
+}
+
+static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
+{
+ return 0;
+}
+
+static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
+ int value)
+{
+ txx9_iocled_set(chip, offset, value);
+ return 0;
+}
+
+void __init txx9_iocled_init(unsigned long baseaddr,
+ int basenum, unsigned int num, int lowactive,
+ const char *color, char **deftriggers)
+{
+ struct txx9_iocled_data *iocled;
+ struct platform_device *pdev;
+ int i;
+ static char *default_triggers[] __initdata = {
+ "heartbeat",
+ "ide-disk",
+ "nand-disk",
+ NULL,
+ };
+
+ if (!deftriggers)
+ deftriggers = default_triggers;
+ iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
+ if (!iocled)
+ return;
+ iocled->mmioaddr = ioremap(baseaddr, 1);
+ if (!iocled->mmioaddr)
+ return;
+ iocled->chip.get = txx9_iocled_get;
+ iocled->chip.set = txx9_iocled_set;
+ iocled->chip.direction_input = txx9_iocled_dir_in;
+ iocled->chip.direction_output = txx9_iocled_dir_out;
+ iocled->chip.label = "iocled";
+ iocled->chip.base = basenum;
+ iocled->chip.ngpio = num;
+ if (gpiochip_add(&iocled->chip))
+ return;
+ if (basenum < 0)
+ basenum = iocled->chip.base;
+
+ pdev = platform_device_alloc("leds-gpio", basenum);
+ if (!pdev)
+ return;
+ iocled->pdata.num_leds = num;
+ iocled->pdata.leds = iocled->leds;
+ for (i = 0; i < num; i++) {
+ struct gpio_led *led = &iocled->leds[i];
+ snprintf(iocled->names[i], sizeof(iocled->names[i]),
+ "iocled:%s:%u", color, i);
+ led->name = iocled->names[i];
+ led->gpio = basenum + i;
+ led->active_low = lowactive;
+ if (deftriggers && *deftriggers)
+ led->default_trigger = *deftriggers++;
+ }
+ pdev->dev.platform_data = &iocled->pdata;
+ if (platform_device_add(pdev))
+ platform_device_put(pdev);
+}
+#else /* CONFIG_LEDS_GPIO */
+void __init txx9_iocled_init(unsigned long baseaddr,
+ int basenum, unsigned int num, int lowactive,
+ const char *color, char **deftriggers)
+{
+}
+#endif /* CONFIG_LEDS_GPIO */
diff --git a/trunk/arch/mips/txx9/generic/setup_tx3927.c b/trunk/arch/mips/txx9/generic/setup_tx3927.c
index 7bd963d37fc3..9505d58454c8 100644
--- a/trunk/arch/mips/txx9/generic/setup_tx3927.c
+++ b/trunk/arch/mips/txx9/generic/setup_tx3927.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -32,11 +33,6 @@ void __init tx3927_setup(void)
int i;
unsigned int conf;
- /* don't enable - see errata */
- txx9_ccfg_toeon = 0;
- if (strstr(prom_getcmdline(), "toeon") != NULL)
- txx9_ccfg_toeon = 1;
-
txx9_reg_res_init(TX3927_REV_PCODE(), TX3927_REG_BASE,
TX3927_REG_SIZE);
@@ -99,16 +95,14 @@ void __init tx3927_setup(void)
txx9_gpio_init(TX3927_PIO_REG, 0, 16);
conf = read_c0_conf();
- if (!(conf & TX39_CONF_ICE))
- printk(KERN_INFO "TX3927 I-Cache disabled.\n");
- if (!(conf & TX39_CONF_DCE))
- printk(KERN_INFO "TX3927 D-Cache disabled.\n");
- else if (!(conf & TX39_CONF_WBON))
- printk(KERN_INFO "TX3927 D-Cache WriteThrough.\n");
- else if (!(conf & TX39_CONF_CWFON))
- printk(KERN_INFO "TX3927 D-Cache WriteBack.\n");
- else
- printk(KERN_INFO "TX3927 D-Cache WriteBack (CWF) .\n");
+ if (conf & TX39_CONF_DCE) {
+ if (!(conf & TX39_CONF_WBON))
+ pr_info("TX3927 D-Cache WriteThrough.\n");
+ else if (!(conf & TX39_CONF_CWFON))
+ pr_info("TX3927 D-Cache WriteBack.\n");
+ else
+ pr_info("TX3927 D-Cache WriteBack (CWF) .\n");
+ }
}
void __init tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr)
@@ -128,3 +122,16 @@ void __init tx3927_sio_init(unsigned int sclk, unsigned int cts_mask)
TXX9_IRQ_BASE + TX3927_IR_SIO(i),
i, sclk, (1 << i) & cts_mask);
}
+
+void __init tx3927_mtd_init(int ch)
+{
+ struct physmap_flash_data pdata = {
+ .width = TX3927_ROMC_WIDTH(ch) / 8,
+ };
+ unsigned long start = txx9_ce_res[ch].start;
+ unsigned long size = txx9_ce_res[ch].end - start + 1;
+
+ if (!(tx3927_romcptr->cr[ch] & 0x8))
+ return; /* disabled */
+ txx9_physmap_flash_init(ch, start, size, &pdata);
+}
diff --git a/trunk/arch/mips/txx9/generic/setup_tx4927.c b/trunk/arch/mips/txx9/generic/setup_tx4927.c
index f80d4b7a694d..914e93c62639 100644
--- a/trunk/arch/mips/txx9/generic/setup_tx4927.c
+++ b/trunk/arch/mips/txx9/generic/setup_tx4927.c
@@ -14,6 +14,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
#include
#include
#include
@@ -22,6 +26,10 @@
static void __init tx4927_wdr_init(void)
{
+ /* report watchdog reset status */
+ if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)
+ pr_warning("Watchdog reset detected at 0x%lx\n",
+ read_c0_errorepc());
/* clear WatchDogReset (W1C) */
tx4927_ccfg_set(TX4927_CCFG_WDRST);
/* do reset on watchdog */
@@ -33,6 +41,47 @@ void __init tx4927_wdt_init(void)
txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
}
+static void tx4927_machine_restart(char *command)
+{
+ local_irq_disable();
+ pr_emerg("Rebooting (with %s watchdog reset)...\n",
+ (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ?
+ "external" : "internal");
+ /* clear watchdog status */
+ tx4927_ccfg_set(TX4927_CCFG_WDRST); /* W1C */
+ txx9_wdt_now(TX4927_TMR_REG(2) & 0xfffffffffULL);
+ while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST))
+ ;
+ mdelay(10);
+ if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) {
+ pr_emerg("Rebooting (with internal watchdog reset)...\n");
+ /* External WDRST failed. Do internal watchdog reset */
+ tx4927_ccfg_clear(TX4927_CCFG_WDREXEN);
+ }
+ /* fallback */
+ (*_machine_halt)();
+}
+
+void show_registers(struct pt_regs *regs);
+static int tx4927_be_handler(struct pt_regs *regs, int is_fixup)
+{
+ int data = regs->cp0_cause & 4;
+ console_verbose();
+ pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc);
+ pr_err("ccfg:%llx, toea:%llx\n",
+ (unsigned long long)____raw_readq(&tx4927_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4927_ccfgptr->toea));
+#ifdef CONFIG_PCI
+ tx4927_report_pcic_status();
+#endif
+ show_registers(regs);
+ panic("BusError!");
+}
+static void __init tx4927_be_init(void)
+{
+ board_be_handler = tx4927_be_handler;
+}
+
static struct resource tx4927_sdram_resource[4];
void __init tx4927_setup(void)
@@ -44,6 +93,7 @@ void __init tx4927_setup(void)
txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE,
TX4927_REG_SIZE);
+ set_c0_config(TX49_CONF_CWFON);
/* SDRAMC,EBUSC are configured by PROM */
for (i = 0; i < 8; i++) {
@@ -167,6 +217,9 @@ void __init tx4927_setup(void)
txx9_gpio_init(TX4927_PIO_REG & 0xfffffffffULL, 0, TX4927_NUM_PIO);
__raw_writel(0, &tx4927_pioptr->maskcpu);
__raw_writel(0, &tx4927_pioptr->maskext);
+
+ _machine_restart = tx4927_machine_restart;
+ board_be_init = tx4927_be_init;
}
void __init tx4927_time_init(unsigned int tmrnr)
@@ -186,3 +239,47 @@ void __init tx4927_sio_init(unsigned int sclk, unsigned int cts_mask)
TXX9_IRQ_BASE + TX4927_IR_SIO(i),
i, sclk, (1 << i) & cts_mask);
}
+
+void __init tx4927_mtd_init(int ch)
+{
+ struct physmap_flash_data pdata = {
+ .width = TX4927_EBUSC_WIDTH(ch) / 8,
+ };
+ unsigned long start = txx9_ce_res[ch].start;
+ unsigned long size = txx9_ce_res[ch].end - start + 1;
+
+ if (!(TX4927_EBUSC_CR(ch) & 0x8))
+ return; /* disabled */
+ txx9_physmap_flash_init(ch, start, size, &pdata);
+}
+
+static void __init tx4927_stop_unused_modules(void)
+{
+ __u64 pcfg, rst = 0, ckd = 0;
+ char buf[128];
+
+ buf[0] = '\0';
+ local_irq_disable();
+ pcfg = ____raw_readq(&tx4927_ccfgptr->pcfg);
+ if (!(pcfg & TX4927_PCFG_SEL2)) {
+ rst |= TX4927_CLKCTR_ACLRST;
+ ckd |= TX4927_CLKCTR_ACLCKD;
+ strcat(buf, " ACLC");
+ }
+ if (rst | ckd) {
+ txx9_set64(&tx4927_ccfgptr->clkctr, rst);
+ txx9_set64(&tx4927_ccfgptr->clkctr, ckd);
+ }
+ local_irq_enable();
+ if (buf[0])
+ pr_info("%s: stop%s\n", txx9_pcode_str, buf);
+}
+
+static int __init tx4927_late_init(void)
+{
+ if (txx9_pcode != 0x4927)
+ return -ENODEV;
+ tx4927_stop_unused_modules();
+ return 0;
+}
+late_initcall(tx4927_late_init);
diff --git a/trunk/arch/mips/txx9/generic/setup_tx4938.c b/trunk/arch/mips/txx9/generic/setup_tx4938.c
index f3040b9ba059..af724e53ef91 100644
--- a/trunk/arch/mips/txx9/generic/setup_tx4938.c
+++ b/trunk/arch/mips/txx9/generic/setup_tx4938.c
@@ -14,6 +14,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
#include
#include
#include
@@ -22,6 +26,10 @@
static void __init tx4938_wdr_init(void)
{
+ /* report watchdog reset status */
+ if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)
+ pr_warning("Watchdog reset detected at 0x%lx\n",
+ read_c0_errorepc());
/* clear WatchDogReset (W1C) */
tx4938_ccfg_set(TX4938_CCFG_WDRST);
/* do reset on watchdog */
@@ -33,6 +41,47 @@ void __init tx4938_wdt_init(void)
txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
}
+static void tx4938_machine_restart(char *command)
+{
+ local_irq_disable();
+ pr_emerg("Rebooting (with %s watchdog reset)...\n",
+ (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ?
+ "external" : "internal");
+ /* clear watchdog status */
+ tx4938_ccfg_set(TX4938_CCFG_WDRST); /* W1C */
+ txx9_wdt_now(TX4938_TMR_REG(2) & 0xfffffffffULL);
+ while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST))
+ ;
+ mdelay(10);
+ if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) {
+ pr_emerg("Rebooting (with internal watchdog reset)...\n");
+ /* External WDRST failed. Do internal watchdog reset */
+ tx4938_ccfg_clear(TX4938_CCFG_WDREXEN);
+ }
+ /* fallback */
+ (*_machine_halt)();
+}
+
+void show_registers(struct pt_regs *regs);
+static int tx4938_be_handler(struct pt_regs *regs, int is_fixup)
+{
+ int data = regs->cp0_cause & 4;
+ console_verbose();
+ pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc);
+ pr_err("ccfg:%llx, toea:%llx\n",
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->toea));
+#ifdef CONFIG_PCI
+ tx4927_report_pcic_status();
+#endif
+ show_registers(regs);
+ panic("BusError!");
+}
+static void __init tx4938_be_init(void)
+{
+ board_be_handler = tx4938_be_handler;
+}
+
static struct resource tx4938_sdram_resource[4];
static struct resource tx4938_sram_resource;
@@ -47,6 +96,7 @@ void __init tx4938_setup(void)
txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE,
TX4938_REG_SIZE);
+ set_c0_config(TX49_CONF_CWFON);
/* SDRAMC,EBUSC are configured by PROM */
for (i = 0; i < 8; i++) {
@@ -227,6 +277,9 @@ void __init tx4938_setup(void)
TX4938_CLKCTR_ETH1CKD);
}
}
+
+ _machine_restart = tx4938_machine_restart;
+ board_be_init = tx4938_be_init;
}
void __init tx4938_time_init(unsigned int tmrnr)
@@ -268,3 +321,72 @@ void __init tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
if (addr1 && (pcfg & TX4938_PCFG_ETH1_SEL))
txx9_ethaddr_init(TXX9_IRQ_BASE + TX4938_IR_ETH1, addr1);
}
+
+void __init tx4938_mtd_init(int ch)
+{
+ struct physmap_flash_data pdata = {
+ .width = TX4938_EBUSC_WIDTH(ch) / 8,
+ };
+ unsigned long start = txx9_ce_res[ch].start;
+ unsigned long size = txx9_ce_res[ch].end - start + 1;
+
+ if (!(TX4938_EBUSC_CR(ch) & 0x8))
+ return; /* disabled */
+ txx9_physmap_flash_init(ch, start, size, &pdata);
+}
+
+static void __init tx4938_stop_unused_modules(void)
+{
+ __u64 pcfg, rst = 0, ckd = 0;
+ char buf[128];
+
+ buf[0] = '\0';
+ local_irq_disable();
+ pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
+ switch (txx9_pcode) {
+ case 0x4937:
+ if (!(pcfg & TX4938_PCFG_SEL2)) {
+ rst |= TX4938_CLKCTR_ACLRST;
+ ckd |= TX4938_CLKCTR_ACLCKD;
+ strcat(buf, " ACLC");
+ }
+ break;
+ case 0x4938:
+ if (!(pcfg & TX4938_PCFG_SEL2) ||
+ (pcfg & TX4938_PCFG_ETH0_SEL)) {
+ rst |= TX4938_CLKCTR_ACLRST;
+ ckd |= TX4938_CLKCTR_ACLCKD;
+ strcat(buf, " ACLC");
+ }
+ if ((pcfg &
+ (TX4938_PCFG_ATA_SEL | TX4938_PCFG_ISA_SEL |
+ TX4938_PCFG_NDF_SEL))
+ != TX4938_PCFG_NDF_SEL) {
+ rst |= TX4938_CLKCTR_NDFRST;
+ ckd |= TX4938_CLKCTR_NDFCKD;
+ strcat(buf, " NDFMC");
+ }
+ if (!(pcfg & TX4938_PCFG_SPI_SEL)) {
+ rst |= TX4938_CLKCTR_SPIRST;
+ ckd |= TX4938_CLKCTR_SPICKD;
+ strcat(buf, " SPI");
+ }
+ break;
+ }
+ if (rst | ckd) {
+ txx9_set64(&tx4938_ccfgptr->clkctr, rst);
+ txx9_set64(&tx4938_ccfgptr->clkctr, ckd);
+ }
+ local_irq_enable();
+ if (buf[0])
+ pr_info("%s: stop%s\n", txx9_pcode_str, buf);
+}
+
+static int __init tx4938_late_init(void)
+{
+ if (txx9_pcode != 0x4937 && txx9_pcode != 0x4938)
+ return -ENODEV;
+ tx4938_stop_unused_modules();
+ return 0;
+}
+late_initcall(tx4938_late_init);
diff --git a/trunk/arch/mips/txx9/generic/setup_tx4939.c b/trunk/arch/mips/txx9/generic/setup_tx4939.c
new file mode 100644
index 000000000000..6c0049a5bbc1
--- /dev/null
+++ b/trunk/arch/mips/txx9/generic/setup_tx4939.c
@@ -0,0 +1,506 @@
+/*
+ * TX4939 setup routines
+ * Based on linux/arch/mips/txx9/generic/setup_tx4938.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * 2003-2005 (c) MontaVista Software, Inc.
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static void __init tx4939_wdr_init(void)
+{
+ /* report watchdog reset status */
+ if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST)
+ pr_warning("Watchdog reset detected at 0x%lx\n",
+ read_c0_errorepc());
+ /* clear WatchDogReset (W1C) */
+ tx4939_ccfg_set(TX4939_CCFG_WDRST);
+ /* do reset on watchdog */
+ tx4939_ccfg_set(TX4939_CCFG_WR);
+}
+
+void __init tx4939_wdt_init(void)
+{
+ txx9_wdt_init(TX4939_TMR_REG(2) & 0xfffffffffULL);
+}
+
+static void tx4939_machine_restart(char *command)
+{
+ local_irq_disable();
+ pr_emerg("Rebooting (with %s watchdog reset)...\n",
+ (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) ?
+ "external" : "internal");
+ /* clear watchdog status */
+ tx4939_ccfg_set(TX4939_CCFG_WDRST); /* W1C */
+ txx9_wdt_now(TX4939_TMR_REG(2) & 0xfffffffffULL);
+ while (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDRST))
+ ;
+ mdelay(10);
+ if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_WDREXEN) {
+ pr_emerg("Rebooting (with internal watchdog reset)...\n");
+ /* External WDRST failed. Do internal watchdog reset */
+ tx4939_ccfg_clear(TX4939_CCFG_WDREXEN);
+ }
+ /* fallback */
+ (*_machine_halt)();
+}
+
+void show_registers(struct pt_regs *regs);
+static int tx4939_be_handler(struct pt_regs *regs, int is_fixup)
+{
+ int data = regs->cp0_cause & 4;
+ console_verbose();
+ pr_err("%cBE exception at %#lx\n",
+ data ? 'D' : 'I', regs->cp0_epc);
+ pr_err("ccfg:%llx, toea:%llx\n",
+ (unsigned long long)____raw_readq(&tx4939_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4939_ccfgptr->toea));
+#ifdef CONFIG_PCI
+ tx4927_report_pcic_status();
+#endif
+ show_registers(regs);
+ panic("BusError!");
+}
+static void __init tx4939_be_init(void)
+{
+ board_be_handler = tx4939_be_handler;
+}
+
+static struct resource tx4939_sdram_resource[4];
+static struct resource tx4939_sram_resource;
+#define TX4939_SRAM_SIZE 0x800
+
+void __init tx4939_add_memory_regions(void)
+{
+ int i;
+ unsigned long start, size;
+ u64 win;
+
+ for (i = 0; i < 4; i++) {
+ if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i)))
+ continue;
+ win = ____raw_readq(&tx4939_ddrcptr->win[i]);
+ start = (unsigned long)(win >> 48);
+ size = (((unsigned long)(win >> 32) & 0xffff) + 1) - start;
+ add_memory_region(start << 20, size << 20, BOOT_MEM_RAM);
+ }
+}
+
+void __init tx4939_setup(void)
+{
+ int i;
+ __u32 divmode;
+ __u64 pcfg;
+ int cpuclk = 0;
+
+ txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE,
+ TX4939_REG_SIZE);
+ set_c0_config(TX49_CONF_CWFON);
+
+ /* SDRAMC,EBUSC are configured by PROM */
+ for (i = 0; i < 4; i++) {
+ if (!(TX4939_EBUSC_CR(i) & 0x8))
+ continue; /* disabled */
+ txx9_ce_res[i].start = (unsigned long)TX4939_EBUSC_BA(i);
+ txx9_ce_res[i].end =
+ txx9_ce_res[i].start + TX4939_EBUSC_SIZE(i) - 1;
+ request_resource(&iomem_resource, &txx9_ce_res[i]);
+ }
+
+ /* clocks */
+ if (txx9_master_clock) {
+ /* calculate cpu_clock from master_clock */
+ divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
+ TX4939_CCFG_MULCLK_MASK;
+ cpuclk = txx9_master_clock * 20 / 2;
+ switch (divmode) {
+ case TX4939_CCFG_MULCLK_8:
+ cpuclk = cpuclk / 3 * 4 /* / 6 * 8 */; break;
+ case TX4939_CCFG_MULCLK_9:
+ cpuclk = cpuclk / 2 * 3 /* / 6 * 9 */; break;
+ case TX4939_CCFG_MULCLK_10:
+ cpuclk = cpuclk / 3 * 5 /* / 6 * 10 */; break;
+ case TX4939_CCFG_MULCLK_11:
+ cpuclk = cpuclk / 6 * 11; break;
+ case TX4939_CCFG_MULCLK_12:
+ cpuclk = cpuclk * 2 /* / 6 * 12 */; break;
+ case TX4939_CCFG_MULCLK_13:
+ cpuclk = cpuclk / 6 * 13; break;
+ case TX4939_CCFG_MULCLK_14:
+ cpuclk = cpuclk / 3 * 7 /* / 6 * 14 */; break;
+ case TX4939_CCFG_MULCLK_15:
+ cpuclk = cpuclk / 2 * 5 /* / 6 * 15 */; break;
+ }
+ txx9_cpu_clock = cpuclk;
+ } else {
+ if (txx9_cpu_clock == 0)
+ txx9_cpu_clock = 400000000; /* 400MHz */
+ /* calculate master_clock from cpu_clock */
+ cpuclk = txx9_cpu_clock;
+ divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
+ TX4939_CCFG_MULCLK_MASK;
+ switch (divmode) {
+ case TX4939_CCFG_MULCLK_8:
+ txx9_master_clock = cpuclk * 6 / 8; break;
+ case TX4939_CCFG_MULCLK_9:
+ txx9_master_clock = cpuclk * 6 / 9; break;
+ case TX4939_CCFG_MULCLK_10:
+ txx9_master_clock = cpuclk * 6 / 10; break;
+ case TX4939_CCFG_MULCLK_11:
+ txx9_master_clock = cpuclk * 6 / 11; break;
+ case TX4939_CCFG_MULCLK_12:
+ txx9_master_clock = cpuclk * 6 / 12; break;
+ case TX4939_CCFG_MULCLK_13:
+ txx9_master_clock = cpuclk * 6 / 13; break;
+ case TX4939_CCFG_MULCLK_14:
+ txx9_master_clock = cpuclk * 6 / 14; break;
+ case TX4939_CCFG_MULCLK_15:
+ txx9_master_clock = cpuclk * 6 / 15; break;
+ }
+ txx9_master_clock /= 10; /* * 2 / 20 */
+ }
+ /* calculate gbus_clock from cpu_clock */
+ divmode = (__u32)____raw_readq(&tx4939_ccfgptr->ccfg) &
+ TX4939_CCFG_YDIVMODE_MASK;
+ txx9_gbus_clock = txx9_cpu_clock;
+ switch (divmode) {
+ case TX4939_CCFG_YDIVMODE_2:
+ txx9_gbus_clock /= 2; break;
+ case TX4939_CCFG_YDIVMODE_3:
+ txx9_gbus_clock /= 3; break;
+ case TX4939_CCFG_YDIVMODE_5:
+ txx9_gbus_clock /= 5; break;
+ case TX4939_CCFG_YDIVMODE_6:
+ txx9_gbus_clock /= 6; break;
+ }
+ /* change default value to udelay/mdelay take reasonable time */
+ loops_per_jiffy = txx9_cpu_clock / HZ / 2;
+
+ /* CCFG */
+ tx4939_wdr_init();
+ /* clear BusErrorOnWrite flag (W1C) */
+ tx4939_ccfg_set(TX4939_CCFG_WDRST | TX4939_CCFG_BEOW);
+ /* enable Timeout BusError */
+ if (txx9_ccfg_toeon)
+ tx4939_ccfg_set(TX4939_CCFG_TOE);
+
+ /* DMA selection */
+ txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_DMASEL_ALL);
+
+ /* Use external clock for external arbiter */
+ if (!(____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB))
+ txx9_clear64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_PCICLKEN_ALL);
+
+ pr_info("%s -- %dMHz(M%dMHz,G%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
+ txx9_pcode_str,
+ (cpuclk + 500000) / 1000000,
+ (txx9_master_clock + 500000) / 1000000,
+ (txx9_gbus_clock + 500000) / 1000000,
+ (__u32)____raw_readq(&tx4939_ccfgptr->crir),
+ (unsigned long long)____raw_readq(&tx4939_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4939_ccfgptr->pcfg));
+
+ pr_info("%s DDRC -- EN:%08x", txx9_pcode_str,
+ (__u32)____raw_readq(&tx4939_ddrcptr->winen));
+ for (i = 0; i < 4; i++) {
+ __u64 win = ____raw_readq(&tx4939_ddrcptr->win[i]);
+ if (!((__u32)____raw_readq(&tx4939_ddrcptr->winen) & (1 << i)))
+ continue; /* disabled */
+ printk(KERN_CONT " #%d:%016llx", i, (unsigned long long)win);
+ tx4939_sdram_resource[i].name = "DDR SDRAM";
+ tx4939_sdram_resource[i].start =
+ (unsigned long)(win >> 48) << 20;
+ tx4939_sdram_resource[i].end =
+ ((((unsigned long)(win >> 32) & 0xffff) + 1) <<
+ 20) - 1;
+ tx4939_sdram_resource[i].flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4939_sdram_resource[i]);
+ }
+ printk(KERN_CONT "\n");
+
+ /* SRAM */
+ if (____raw_readq(&tx4939_sramcptr->cr) & 1) {
+ unsigned int size = TX4939_SRAM_SIZE;
+ tx4939_sram_resource.name = "SRAM";
+ tx4939_sram_resource.start =
+ (____raw_readq(&tx4939_sramcptr->cr) >> (39-11))
+ & ~(size - 1);
+ tx4939_sram_resource.end =
+ tx4939_sram_resource.start + TX4939_SRAM_SIZE - 1;
+ tx4939_sram_resource.flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4939_sram_resource);
+ }
+
+ /* TMR */
+ /* disable all timers */
+ for (i = 0; i < TX4939_NR_TMR; i++)
+ txx9_tmr_init(TX4939_TMR_REG(i) & 0xfffffffffULL);
+
+ /* DMA */
+ for (i = 0; i < 2; i++)
+ ____raw_writeq(TX4938_DMA_MCR_MSTEN,
+ (void __iomem *)(TX4939_DMA_REG(i) + 0x50));
+
+ /* set PCIC1 reset (required to prevent hangup on BIST) */
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST);
+ pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
+ if (pcfg & (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE)) {
+ mdelay(1); /* at least 128 cpu clock */
+ /* clear PCIC1 reset */
+ txx9_clear64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1RST);
+ } else {
+ pr_info("%s: stop PCIC1\n", txx9_pcode_str);
+ /* stop PCIC1 */
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_PCI1CKD);
+ }
+ if (!(pcfg & TX4939_PCFG_ET0MODE)) {
+ pr_info("%s: stop ETH0\n", txx9_pcode_str);
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0RST);
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH0CKD);
+ }
+ if (!(pcfg & TX4939_PCFG_ET1MODE)) {
+ pr_info("%s: stop ETH1\n", txx9_pcode_str);
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1RST);
+ txx9_set64(&tx4939_ccfgptr->clkctr, TX4939_CLKCTR_ETH1CKD);
+ }
+
+ _machine_restart = tx4939_machine_restart;
+ board_be_init = tx4939_be_init;
+}
+
+void __init tx4939_time_init(unsigned int tmrnr)
+{
+ if (____raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_TINTDIS)
+ txx9_clockevent_init(TX4939_TMR_REG(tmrnr) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + TX4939_IR_TMR(tmrnr),
+ TXX9_IMCLK);
+}
+
+void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask)
+{
+ int i;
+ unsigned int ch_mask = 0;
+ __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
+
+ cts_mask |= ~1; /* only SIO0 have RTS/CTS */
+ if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO0)
+ cts_mask |= 1 << 0; /* disable SIO0 RTS/CTS by PCFG setting */
+ if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2)
+ ch_mask |= 1 << 2; /* disable SIO2 by PCFG setting */
+ if (pcfg & TX4939_PCFG_SIO3MODE)
+ ch_mask |= 1 << 3; /* disable SIO3 by PCFG setting */
+ for (i = 0; i < 4; i++) {
+ if ((1 << i) & ch_mask)
+ continue;
+ txx9_sio_init(TX4939_SIO_REG(i) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + TX4939_IR_SIO(i),
+ i, sclk, (1 << i) & cts_mask);
+ }
+}
+
+#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
+static int tx4939_get_eth_speed(struct net_device *dev)
+{
+ struct ethtool_cmd cmd = { ETHTOOL_GSET };
+ int speed = 100; /* default 100Mbps */
+ int err;
+ if (!dev->ethtool_ops || !dev->ethtool_ops->get_settings)
+ return speed;
+ err = dev->ethtool_ops->get_settings(dev, &cmd);
+ if (err < 0)
+ return speed;
+ speed = cmd.speed == SPEED_100 ? 100 : 10;
+ return speed;
+}
+static int tx4939_netdev_event(struct notifier_block *this,
+ unsigned long event,
+ void *ptr)
+{
+ struct net_device *dev = ptr;
+ if (event == NETDEV_CHANGE && netif_carrier_ok(dev)) {
+ __u64 bit = 0;
+ if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(0))
+ bit = TX4939_PCFG_SPEED0;
+ else if (dev->irq == TXX9_IRQ_BASE + TX4939_IR_ETH(1))
+ bit = TX4939_PCFG_SPEED1;
+ if (bit) {
+ int speed = tx4939_get_eth_speed(dev);
+ if (speed == 100)
+ txx9_set64(&tx4939_ccfgptr->pcfg, bit);
+ else
+ txx9_clear64(&tx4939_ccfgptr->pcfg, bit);
+ }
+ }
+ return NOTIFY_DONE;
+}
+
+static struct notifier_block tx4939_netdev_notifier = {
+ .notifier_call = tx4939_netdev_event,
+ .priority = 1,
+};
+
+void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
+{
+ u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
+
+ if (addr0 && (pcfg & TX4939_PCFG_ET0MODE))
+ txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(0), addr0);
+ if (addr1 && (pcfg & TX4939_PCFG_ET1MODE))
+ txx9_ethaddr_init(TXX9_IRQ_BASE + TX4939_IR_ETH(1), addr1);
+ register_netdevice_notifier(&tx4939_netdev_notifier);
+}
+#else
+void __init tx4939_ethaddr_init(unsigned char *addr0, unsigned char *addr1)
+{
+}
+#endif
+
+void __init tx4939_mtd_init(int ch)
+{
+ struct physmap_flash_data pdata = {
+ .width = TX4939_EBUSC_WIDTH(ch) / 8,
+ };
+ unsigned long start = txx9_ce_res[ch].start;
+ unsigned long size = txx9_ce_res[ch].end - start + 1;
+
+ if (!(TX4939_EBUSC_CR(ch) & 0x8))
+ return; /* disabled */
+ txx9_physmap_flash_init(ch, start, size, &pdata);
+}
+
+#define TX4939_ATA_REG_PHYS(ch) (TX4939_ATA_REG(ch) & 0xfffffffffULL)
+void __init tx4939_ata_init(void)
+{
+ static struct resource ata0_res[] = {
+ {
+ .start = TX4939_ATA_REG_PHYS(0),
+ .end = TX4939_ATA_REG_PHYS(0) + 0x1000 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = TXX9_IRQ_BASE + TX4939_IR_ATA(0),
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+ static struct resource ata1_res[] = {
+ {
+ .start = TX4939_ATA_REG_PHYS(1),
+ .end = TX4939_ATA_REG_PHYS(1) + 0x1000 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = TXX9_IRQ_BASE + TX4939_IR_ATA(1),
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+ static struct platform_device ata0_dev = {
+ .name = "tx4939ide",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(ata0_res),
+ .resource = ata0_res,
+ };
+ static struct platform_device ata1_dev = {
+ .name = "tx4939ide",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(ata1_res),
+ .resource = ata1_res,
+ };
+ __u64 pcfg = __raw_readq(&tx4939_ccfgptr->pcfg);
+
+ if (pcfg & TX4939_PCFG_ATA0MODE)
+ platform_device_register(&ata0_dev);
+ if ((pcfg & (TX4939_PCFG_ATA1MODE |
+ TX4939_PCFG_ET1MODE |
+ TX4939_PCFG_ET0MODE)) == TX4939_PCFG_ATA1MODE)
+ platform_device_register(&ata1_dev);
+}
+
+static void __init tx4939_stop_unused_modules(void)
+{
+ __u64 pcfg, rst = 0, ckd = 0;
+ char buf[128];
+
+ buf[0] = '\0';
+ local_irq_disable();
+ pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
+ if ((pcfg & TX4939_PCFG_I2SMODE_MASK) !=
+ TX4939_PCFG_I2SMODE_ACLC) {
+ rst |= TX4939_CLKCTR_ACLRST;
+ ckd |= TX4939_CLKCTR_ACLCKD;
+ strcat(buf, " ACLC");
+ }
+ if ((pcfg & TX4939_PCFG_I2SMODE_MASK) !=
+ TX4939_PCFG_I2SMODE_I2S &&
+ (pcfg & TX4939_PCFG_I2SMODE_MASK) !=
+ TX4939_PCFG_I2SMODE_I2S_ALT) {
+ rst |= TX4939_CLKCTR_I2SRST;
+ ckd |= TX4939_CLKCTR_I2SCKD;
+ strcat(buf, " I2S");
+ }
+ if (!(pcfg & TX4939_PCFG_ATA0MODE)) {
+ rst |= TX4939_CLKCTR_ATA0RST;
+ ckd |= TX4939_CLKCTR_ATA0CKD;
+ strcat(buf, " ATA0");
+ }
+ if (!(pcfg & TX4939_PCFG_ATA1MODE)) {
+ rst |= TX4939_CLKCTR_ATA1RST;
+ ckd |= TX4939_CLKCTR_ATA1CKD;
+ strcat(buf, " ATA1");
+ }
+ if (pcfg & TX4939_PCFG_SPIMODE) {
+ rst |= TX4939_CLKCTR_SPIRST;
+ ckd |= TX4939_CLKCTR_SPICKD;
+ strcat(buf, " SPI");
+ }
+ if (!(pcfg & (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE))) {
+ rst |= TX4939_CLKCTR_VPCRST;
+ ckd |= TX4939_CLKCTR_VPCCKD;
+ strcat(buf, " VPC");
+ }
+ if ((pcfg & TX4939_PCFG_SIO2MODE_MASK) != TX4939_PCFG_SIO2MODE_SIO2) {
+ rst |= TX4939_CLKCTR_SIO2RST;
+ ckd |= TX4939_CLKCTR_SIO2CKD;
+ strcat(buf, " SIO2");
+ }
+ if (pcfg & TX4939_PCFG_SIO3MODE) {
+ rst |= TX4939_CLKCTR_SIO3RST;
+ ckd |= TX4939_CLKCTR_SIO3CKD;
+ strcat(buf, " SIO3");
+ }
+ if (rst | ckd) {
+ txx9_set64(&tx4939_ccfgptr->clkctr, rst);
+ txx9_set64(&tx4939_ccfgptr->clkctr, ckd);
+ }
+ local_irq_enable();
+ if (buf[0])
+ pr_info("%s: stop%s\n", txx9_pcode_str, buf);
+}
+
+static int __init tx4939_late_init(void)
+{
+ if (txx9_pcode != 0x4939)
+ return -ENODEV;
+ tx4939_stop_unused_modules();
+ return 0;
+}
+late_initcall(tx4939_late_init);
diff --git a/trunk/arch/mips/txx9/rbtx4938/spi_eeprom.c b/trunk/arch/mips/txx9/generic/spi_eeprom.c
similarity index 79%
rename from trunk/arch/mips/txx9/rbtx4938/spi_eeprom.c
rename to trunk/arch/mips/txx9/generic/spi_eeprom.c
index a7ea8b041c1d..75c347238f47 100644
--- a/trunk/arch/mips/txx9/rbtx4938/spi_eeprom.c
+++ b/trunk/arch/mips/txx9/generic/spi_eeprom.c
@@ -18,29 +18,31 @@
#define AT250X0_PAGE_SIZE 8
/* register board information for at25 driver */
-int __init spi_eeprom_register(int chipid)
+int __init spi_eeprom_register(int busid, int chipid, int size)
{
- static struct spi_eeprom eeprom = {
- .name = "at250x0",
- .byte_len = 128,
- .page_size = AT250X0_PAGE_SIZE,
- .flags = EE_ADDR1,
- };
struct spi_board_info info = {
.modalias = "at25",
.max_speed_hz = 1500000, /* 1.5Mbps */
- .bus_num = 0,
+ .bus_num = busid,
.chip_select = chipid,
- .platform_data = &eeprom,
/* Mode 0: High-Active, Sample-Then-Shift */
};
-
+ struct spi_eeprom *eeprom;
+ eeprom = kzalloc(sizeof(*eeprom), GFP_KERNEL);
+ if (!eeprom)
+ return -ENOMEM;
+ strcpy(eeprom->name, "at250x0");
+ eeprom->byte_len = size;
+ eeprom->page_size = AT250X0_PAGE_SIZE;
+ eeprom->flags = EE_ADDR1;
+ info.platform_data = eeprom;
return spi_register_board_info(&info, 1);
}
/* simple temporary spi driver to provide early access to seeprom. */
static struct read_param {
+ int busid;
int chipid;
int address;
unsigned char *buf;
@@ -57,7 +59,8 @@ static int __init early_seeprom_probe(struct spi_device *spi)
dev_info(&spi->dev, "spiclk %u KHz.\n",
(spi->max_speed_hz + 500) / 1000);
- if (read_param->chipid != spi->chip_select)
+ if (read_param->busid != spi->master->bus_num ||
+ read_param->chipid != spi->chip_select)
return -ENODEV;
while (len > 0) {
/* spi_write_then_read can only work with small chunk */
@@ -80,11 +83,12 @@ static struct spi_driver early_seeprom_driver __initdata = {
.probe = early_seeprom_probe,
};
-int __init spi_eeprom_read(int chipid, int address,
+int __init spi_eeprom_read(int busid, int chipid, int address,
unsigned char *buf, int len)
{
int ret;
struct read_param param = {
+ .busid = busid,
.chipid = chipid,
.address = address,
.buf = buf,
diff --git a/trunk/arch/mips/txx9/jmr3927/prom.c b/trunk/arch/mips/txx9/jmr3927/prom.c
index 70c4c8ec3e84..c899c0c087a0 100644
--- a/trunk/arch/mips/txx9/jmr3927/prom.c
+++ b/trunk/arch/mips/txx9/jmr3927/prom.c
@@ -47,7 +47,6 @@ void __init jmr3927_prom_init(void)
if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
printk(KERN_ERR "TX3927 TLB off\n");
- prom_init_cmdline();
add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
txx9_sio_putchar_init(TX3927_SIO_REG(1));
}
diff --git a/trunk/arch/mips/txx9/jmr3927/setup.c b/trunk/arch/mips/txx9/jmr3927/setup.c
index 87db41be8a56..25e50a7be387 100644
--- a/trunk/arch/mips/txx9/jmr3927/setup.c
+++ b/trunk/arch/mips/txx9/jmr3927/setup.c
@@ -62,7 +62,6 @@ static void __init jmr3927_time_init(void)
}
#define DO_WRITE_THROUGH
-#define DO_ENABLE_CACHE
static void jmr3927_board_init(void);
@@ -77,11 +76,6 @@ static void __init jmr3927_mem_setup(void)
/* cache setup */
{
unsigned int conf;
-#ifdef DO_ENABLE_CACHE
- int mips_ic_disable = 0, mips_dc_disable = 0;
-#else
- int mips_ic_disable = 1, mips_dc_disable = 1;
-#endif
#ifdef DO_WRITE_THROUGH
int mips_config_cwfon = 0;
int mips_config_wbon = 0;
@@ -91,10 +85,7 @@ static void __init jmr3927_mem_setup(void)
#endif
conf = read_c0_conf();
- conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE |
- TX39_CONF_WBON | TX39_CONF_CWFON);
- conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
- conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
+ conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
@@ -199,11 +190,25 @@ static void __init jmr3927_rtc_init(void)
platform_device_register_simple("rtc-ds1742", -1, &res, 1);
}
+static void __init jmr3927_mtd_init(void)
+{
+ int i;
+
+ for (i = 0; i < 2; i++)
+ tx3927_mtd_init(i);
+}
+
static void __init jmr3927_device_init(void)
{
+ unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
+#ifdef __LITTLE_ENDIAN
+ iocled_base |= 1;
+#endif
__swizzle_addr_b = jmr3927_swizzle_addr_b;
jmr3927_rtc_init();
tx3927_wdt_init();
+ jmr3927_mtd_init();
+ txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
}
struct txx9_board_vec jmr3927_vec __initdata = {
diff --git a/trunk/arch/mips/txx9/rbtx4927/irq.c b/trunk/arch/mips/txx9/rbtx4927/irq.c
index 00cd5231da30..9c14ebb26cb4 100644
--- a/trunk/arch/mips/txx9/rbtx4927/irq.c
+++ b/trunk/arch/mips/txx9/rbtx4927/irq.c
@@ -133,15 +133,20 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq)
u8 level3;
level3 = readb(rbtx4927_imstat_addr) & 0x1f;
- if (level3)
- sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
- return sw_irq;
+ if (unlikely(!level3))
+ return -1;
+ return RBTX4927_IRQ_IOC + __fls8(level3);
}
static void __init toshiba_rbtx4927_irq_ioc_init(void)
{
int i;
+ /* mask all IOC interrupts */
+ writeb(0, rbtx4927_imask_addr);
+ /* clear SoftInt interrupts */
+ writeb(0, rbtx4927_softint_addr);
+
for (i = RBTX4927_IRQ_IOC;
i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
diff --git a/trunk/arch/mips/txx9/rbtx4927/prom.c b/trunk/arch/mips/txx9/rbtx4927/prom.c
index 1dc0a5b1956b..cc97c6a6011b 100644
--- a/trunk/arch/mips/txx9/rbtx4927/prom.c
+++ b/trunk/arch/mips/txx9/rbtx4927/prom.c
@@ -36,7 +36,6 @@
void __init rbtx4927_prom_init(void)
{
- prom_init_cmdline();
add_memory_region(0, tx4927_get_mem_size(), BOOT_MEM_RAM);
txx9_sio_putchar_init(TX4927_SIO_REG(0) & 0xfffffffffULL);
}
diff --git a/trunk/arch/mips/txx9/rbtx4927/setup.c b/trunk/arch/mips/txx9/rbtx4927/setup.c
index 0d39bafea794..4a74423b2ba8 100644
--- a/trunk/arch/mips/txx9/rbtx4927/setup.c
+++ b/trunk/arch/mips/txx9/rbtx4927/setup.c
@@ -48,6 +48,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -185,14 +186,8 @@ static void __init rbtx4937_clock_init(void);
static void __init rbtx4927_mem_setup(void)
{
- u32 cp0_config;
char *argptr;
- /* enable caches -- HCP5 does this, pmon does not */
- cp0_config = read_c0_config();
- cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
- write_c0_config(cp0_config);
-
if (TX4927_REV_PCODE() == 0x4927) {
rbtx4927_clock_init();
tx4927_setup();
@@ -212,6 +207,14 @@ static void __init rbtx4927_mem_setup(void)
set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
#endif
+ /* TX4927-SIO DTR on (PIO[15]) */
+ gpio_request(15, "sio-dtr");
+ gpio_direction_output(15, 1);
+ gpio_request(0, "led");
+ gpio_direction_output(0, 1);
+ gpio_request(1, "led");
+ gpio_direction_output(1, 1);
+
tx4927_sio_init(0, 0);
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
argptr = prom_getcmdline();
@@ -304,11 +307,21 @@ static void __init rbtx4927_ne_init(void)
platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res));
}
+static void __init rbtx4927_mtd_init(void)
+{
+ int i;
+
+ for (i = 0; i < 2; i++)
+ tx4927_mtd_init(i);
+}
+
static void __init rbtx4927_device_init(void)
{
toshiba_rbtx4927_rtc_init();
rbtx4927_ne_init();
tx4927_wdt_init();
+ rbtx4927_mtd_init();
+ txx9_iocled_init(RBTX4927_LED_ADDR - IO_BASE, -1, 3, 1, "green", NULL);
}
struct txx9_board_vec rbtx4927_vec __initdata = {
diff --git a/trunk/arch/mips/txx9/rbtx4938/Makefile b/trunk/arch/mips/txx9/rbtx4938/Makefile
index 9dcc52ae5b9d..f3e1f597b4f1 100644
--- a/trunk/arch/mips/txx9/rbtx4938/Makefile
+++ b/trunk/arch/mips/txx9/rbtx4938/Makefile
@@ -1,3 +1,3 @@
-obj-y += prom.o setup.o irq.o spi_eeprom.o
+obj-y += prom.o setup.o irq.o
EXTRA_CFLAGS += -Werror
diff --git a/trunk/arch/mips/txx9/rbtx4938/irq.c b/trunk/arch/mips/txx9/rbtx4938/irq.c
index ca2f8306ce93..7d21befb8932 100644
--- a/trunk/arch/mips/txx9/rbtx4938/irq.c
+++ b/trunk/arch/mips/txx9/rbtx4938/irq.c
@@ -85,10 +85,10 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq)
u8 level3;
level3 = readb(rbtx4938_imstat_addr);
- if (level3)
- /* must use fls so onboard ATA has priority */
- sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
- return sw_irq;
+ if (unlikely(!level3))
+ return -1;
+ /* must use fls so onboard ATA has priority */
+ return RBTX4938_IRQ_IOC + __fls8(level3);
}
static void __init
diff --git a/trunk/arch/mips/txx9/rbtx4938/prom.c b/trunk/arch/mips/txx9/rbtx4938/prom.c
index d73123cd2ab9..bcb469247e8c 100644
--- a/trunk/arch/mips/txx9/rbtx4938/prom.c
+++ b/trunk/arch/mips/txx9/rbtx4938/prom.c
@@ -18,9 +18,6 @@
void __init rbtx4938_prom_init(void)
{
-#ifndef CONFIG_TX4938_NAND_BOOT
- prom_init_cmdline();
-#endif
add_memory_region(0, tx4938_get_mem_size(), BOOT_MEM_RAM);
txx9_sio_putchar_init(TX4938_SIO_REG(0) & 0xfffffffffULL);
}
diff --git a/trunk/arch/mips/txx9/rbtx4938/setup.c b/trunk/arch/mips/txx9/rbtx4938/setup.c
index 9ab48dec0fe8..e077cc4d3a59 100644
--- a/trunk/arch/mips/txx9/rbtx4938/setup.c
+++ b/trunk/arch/mips/txx9/rbtx4938/setup.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
@@ -110,6 +111,7 @@ static void __init rbtx4938_pci_setup(void)
#define SEEPROM2_CS 0 /* IOC */
#define SEEPROM3_CS 1 /* IOC */
#define SRTC_CS 2 /* IOC */
+#define SPI_BUSNO 0
static int __init rbtx4938_ethaddr_init(void)
{
@@ -119,7 +121,7 @@ static int __init rbtx4938_ethaddr_init(void)
int i;
/* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
- if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
+ if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) {
printk(KERN_ERR "seeprom: read error.\n");
return -ENODEV;
} else {
@@ -173,23 +175,30 @@ static void __init rbtx4938_mem_setup(void)
#endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
- printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n");
+ pr_info("PIOSEL: disabling both ATA and NAND selection\n");
txx9_clear64(&tx4938_ccfgptr->pcfg,
TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
#endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
- printk(KERN_INFO "PIOSEL: enabling nand selection\n");
+ pr_info("PIOSEL: enabling NAND selection\n");
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
#endif
#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
- printk(KERN_INFO "PIOSEL: enabling ata selection\n");
+ pr_info("PIOSEL: enabling ATA selection\n");
txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
#endif
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP
+ pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg);
+ pr_info("PIOSEL: NAND %s, ATA %s\n",
+ (pcfg & TX4938_PCFG_NDF_SEL) ? "enabled" : "disabled",
+ (pcfg & TX4938_PCFG_ATA_SEL) ? "enabled" : "disabled");
+#endif
+
rbtx4938_spi_setup();
pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
/* fixup piosel */
@@ -279,9 +288,9 @@ static int __init rbtx4938_spi_init(void)
.mode = SPI_MODE_1 | SPI_CS_HIGH,
};
spi_register_board_info(&srtc_info, 1);
- spi_eeprom_register(SEEPROM1_CS);
- spi_eeprom_register(16 + SEEPROM2_CS);
- spi_eeprom_register(16 + SEEPROM3_CS);
+ spi_eeprom_register(SPI_BUSNO, SEEPROM1_CS, 128);
+ spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM2_CS, 128);
+ spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM3_CS, 128);
gpio_request(16 + SRTC_CS, "rtc-rs5c348");
gpio_direction_output(16 + SRTC_CS, 0);
gpio_request(SEEPROM1_CS, "seeprom1");
@@ -290,10 +299,46 @@ static int __init rbtx4938_spi_init(void)
gpio_direction_output(16 + SEEPROM2_CS, 1);
gpio_request(16 + SEEPROM3_CS, "seeprom3");
gpio_direction_output(16 + SEEPROM3_CS, 1);
- tx4938_spi_init(0);
+ tx4938_spi_init(SPI_BUSNO);
return 0;
}
+static void __init rbtx4938_mtd_init(void)
+{
+ struct physmap_flash_data pdata = {
+ .width = 4,
+ };
+
+ switch (readb(rbtx4938_bdipsw_addr) & 7) {
+ case 0:
+ /* Boot */
+ txx9_physmap_flash_init(0, 0x1fc00000, 0x400000, &pdata);
+ /* System */
+ txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
+ break;
+ case 1:
+ /* System */
+ txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
+ /* Boot */
+ txx9_physmap_flash_init(1, 0x1ec00000, 0x400000, &pdata);
+ break;
+ case 2:
+ /* Ext */
+ txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata);
+ /* System */
+ txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata);
+ /* Boot */
+ txx9_physmap_flash_init(2, 0x1dc00000, 0x400000, &pdata);
+ break;
+ case 3:
+ /* Boot */
+ txx9_physmap_flash_init(1, 0x1bc00000, 0x400000, &pdata);
+ /* System */
+ txx9_physmap_flash_init(2, 0x1a000000, 0x1000000, &pdata);
+ break;
+ }
+}
+
static void __init rbtx4938_arch_init(void)
{
gpiochip_add(&rbtx4938_spi_gpio_chip);
@@ -306,6 +351,8 @@ static void __init rbtx4938_device_init(void)
rbtx4938_ethaddr_init();
rbtx4938_ne_init();
tx4938_wdt_init();
+ rbtx4938_mtd_init();
+ txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL);
}
struct txx9_board_vec rbtx4938_vec __initdata = {
diff --git a/trunk/arch/mips/txx9/rbtx4939/Makefile b/trunk/arch/mips/txx9/rbtx4939/Makefile
new file mode 100644
index 000000000000..3232cd03a7d6
--- /dev/null
+++ b/trunk/arch/mips/txx9/rbtx4939/Makefile
@@ -0,0 +1,3 @@
+obj-y += irq.o setup.o prom.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/trunk/arch/mips/txx9/rbtx4939/irq.c b/trunk/arch/mips/txx9/rbtx4939/irq.c
new file mode 100644
index 000000000000..500cc0a908e6
--- /dev/null
+++ b/trunk/arch/mips/txx9/rbtx4939/irq.c
@@ -0,0 +1,96 @@
+/*
+ * Toshiba RBTX4939 interrupt routines
+ * Based on linux/arch/mips/txx9/rbtx4938/irq.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright (C) 2000-2001,2005-2006 Toshiba Corporation
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include
+#include
+#include
+#include
+
+/*
+ * RBTX4939 IOC controller definition
+ */
+
+static void rbtx4939_ioc_irq_unmask(unsigned int irq)
+{
+ int ioc_nr = irq - RBTX4939_IRQ_IOC;
+
+ writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr);
+}
+
+static void rbtx4939_ioc_irq_mask(unsigned int irq)
+{
+ int ioc_nr = irq - RBTX4939_IRQ_IOC;
+
+ writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr);
+ mmiowb();
+}
+
+static struct irq_chip rbtx4939_ioc_irq_chip = {
+ .name = "IOC",
+ .ack = rbtx4939_ioc_irq_mask,
+ .mask = rbtx4939_ioc_irq_mask,
+ .mask_ack = rbtx4939_ioc_irq_mask,
+ .unmask = rbtx4939_ioc_irq_unmask,
+};
+
+
+static inline int rbtx4939_ioc_irqroute(void)
+{
+ unsigned char istat = readb(rbtx4939_ifac2_addr);
+
+ if (unlikely(istat == 0))
+ return -1;
+ return RBTX4939_IRQ_IOC + __fls8(istat);
+}
+
+static int rbtx4939_irq_dispatch(int pending)
+{
+ int irq;
+
+ if (pending & CAUSEF_IP7)
+ return MIPS_CPU_IRQ_BASE + 7;
+ irq = tx4939_irq();
+ if (likely(irq >= 0)) {
+ /* redirect IOC interrupts */
+ switch (irq) {
+ case RBTX4939_IRQ_IOCINT:
+ irq = rbtx4939_ioc_irqroute();
+ break;
+ }
+ } else if (pending & CAUSEF_IP0)
+ irq = MIPS_CPU_IRQ_BASE + 0;
+ else if (pending & CAUSEF_IP1)
+ irq = MIPS_CPU_IRQ_BASE + 1;
+ else
+ irq = -1;
+ return irq;
+}
+
+void __init rbtx4939_irq_setup(void)
+{
+ int i;
+
+ /* mask all IOC interrupts */
+ writeb(0, rbtx4939_ien_addr);
+
+ /* clear SoftInt interrupts */
+ writeb(0, rbtx4939_softint_addr);
+
+ txx9_irq_dispatch = rbtx4939_irq_dispatch;
+
+ tx4939_irq_init();
+ for (i = RBTX4939_IRQ_IOC;
+ i < RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC; i++)
+ set_irq_chip_and_handler(i, &rbtx4939_ioc_irq_chip,
+ handle_level_irq);
+
+ set_irq_chained_handler(RBTX4939_IRQ_IOCINT, handle_simple_irq);
+}
diff --git a/trunk/arch/mips/txx9/rbtx4939/prom.c b/trunk/arch/mips/txx9/rbtx4939/prom.c
new file mode 100644
index 000000000000..bd277ecb4ad6
--- /dev/null
+++ b/trunk/arch/mips/txx9/rbtx4939/prom.c
@@ -0,0 +1,17 @@
+/*
+ * rbtx4939 specific prom routines
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include
+#include
+#include
+
+void __init rbtx4939_prom_init(void)
+{
+ tx4939_add_memory_regions();
+ txx9_sio_putchar_init(TX4939_SIO_REG(0) & 0xfffffffffULL);
+}
diff --git a/trunk/arch/mips/txx9/rbtx4939/setup.c b/trunk/arch/mips/txx9/rbtx4939/setup.c
new file mode 100644
index 000000000000..9855d7bccc20
--- /dev/null
+++ b/trunk/arch/mips/txx9/rbtx4939/setup.c
@@ -0,0 +1,307 @@
+/*
+ * Toshiba RBTX4939 setup routines.
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static void rbtx4939_machine_restart(char *command)
+{
+ local_irq_disable();
+ writeb(1, rbtx4939_reseten_addr);
+ writeb(1, rbtx4939_softreset_addr);
+ while (1)
+ ;
+}
+
+static void __init rbtx4939_time_init(void)
+{
+ tx4939_time_init(0);
+}
+
+static void __init rbtx4939_pci_setup(void)
+{
+#ifdef CONFIG_PCI
+ int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ tx4939_report_pciclk();
+ tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
+ if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
+ (__raw_readq(&tx4939_ccfgptr->pcfg) &
+ (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
+ tx4939_report_pci1clk();
+
+ /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
+ c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
+ register_pci_controller(c);
+ tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
+ }
+
+ tx4939_setup_pcierr_irq();
+#endif /* CONFIG_PCI */
+}
+
+static unsigned long long default_ebccr[] __initdata = {
+ 0x01c0000000007608ULL, /* 64M ROM */
+ 0x017f000000007049ULL, /* 1M IOC */
+ 0x0180000000408608ULL, /* ISA */
+ 0,
+};
+
+static void __init rbtx4939_ebusc_setup(void)
+{
+ int i;
+ unsigned int sp;
+
+ /* use user-configured speed */
+ sp = TX4939_EBUSC_CR(0) & 0x30;
+ default_ebccr[0] |= sp;
+ default_ebccr[1] |= sp;
+ default_ebccr[2] |= sp;
+ /* initialise by myself */
+ for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
+ if (default_ebccr[i])
+ ____raw_writeq(default_ebccr[i],
+ &tx4939_ebuscptr->cr[i]);
+ else
+ ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
+ & ~8,
+ &tx4939_ebuscptr->cr[i]);
+ }
+}
+
+static void __init rbtx4939_update_ioc_pen(void)
+{
+ __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
+ __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
+ __u8 pe1 = readb(rbtx4939_pe1_addr);
+ __u8 pe2 = readb(rbtx4939_pe2_addr);
+ __u8 pe3 = readb(rbtx4939_pe3_addr);
+ if (pcfg & TX4939_PCFG_ATA0MODE)
+ pe1 |= RBTX4939_PE1_ATA(0);
+ else
+ pe1 &= ~RBTX4939_PE1_ATA(0);
+ if (pcfg & TX4939_PCFG_ATA1MODE) {
+ pe1 |= RBTX4939_PE1_ATA(1);
+ pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
+ } else {
+ pe1 &= ~RBTX4939_PE1_ATA(1);
+ if (pcfg & TX4939_PCFG_ET0MODE)
+ pe1 |= RBTX4939_PE1_RMII(0);
+ else
+ pe1 &= ~RBTX4939_PE1_RMII(0);
+ if (pcfg & TX4939_PCFG_ET1MODE)
+ pe1 |= RBTX4939_PE1_RMII(1);
+ else
+ pe1 &= ~RBTX4939_PE1_RMII(1);
+ }
+ if (ccfg & TX4939_CCFG_PTSEL)
+ pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
+ RBTX4939_PE3_VP_S);
+ else {
+ __u64 vmode = pcfg &
+ (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
+ if (vmode == 0)
+ pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
+ RBTX4939_PE3_VP_S);
+ else if (vmode == TX4939_PCFG_VPSMODE) {
+ pe3 |= RBTX4939_PE3_VP_P;
+ pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
+ } else if (vmode == TX4939_PCFG_VSSMODE) {
+ pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
+ pe3 &= ~RBTX4939_PE3_VP_P;
+ } else {
+ pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
+ pe3 &= ~RBTX4939_PE3_VP_S;
+ }
+ }
+ if (pcfg & TX4939_PCFG_SPIMODE) {
+ if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
+ pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
+ else {
+ if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
+ pe2 |= RBTX4939_PE2_SIO2;
+ pe2 &= ~RBTX4939_PE2_SIO0;
+ } else {
+ pe2 |= RBTX4939_PE2_SIO0;
+ pe2 &= ~RBTX4939_PE2_SIO2;
+ }
+ }
+ if (pcfg & TX4939_PCFG_SIO3MODE)
+ pe2 |= RBTX4939_PE2_SIO3;
+ else
+ pe2 &= ~RBTX4939_PE2_SIO3;
+ pe2 &= ~RBTX4939_PE2_SPI;
+ } else {
+ pe2 |= RBTX4939_PE2_SPI;
+ pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
+ RBTX4939_PE2_SIO0);
+ }
+ if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
+ pe2 |= RBTX4939_PE2_GPIO;
+ else
+ pe2 &= ~RBTX4939_PE2_GPIO;
+ writeb(pe1, rbtx4939_pe1_addr);
+ writeb(pe2, rbtx4939_pe2_addr);
+ writeb(pe3, rbtx4939_pe3_addr);
+}
+
+#define RBTX4939_MAX_7SEGLEDS 8
+
+#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
+static u8 led_val[RBTX4939_MAX_7SEGLEDS];
+struct rbtx4939_led_data {
+ struct led_classdev cdev;
+ char name[32];
+ unsigned int num;
+};
+
+/* Use "dot" in 7seg LEDs */
+static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct rbtx4939_led_data *led_dat =
+ container_of(led_cdev, struct rbtx4939_led_data, cdev);
+ unsigned int num = led_dat->num;
+ unsigned long flags;
+
+ local_irq_save(flags);
+ led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
+ writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
+ local_irq_restore(flags);
+}
+
+static int __init rbtx4939_led_probe(struct platform_device *pdev)
+{
+ struct rbtx4939_led_data *leds_data;
+ int i;
+ static char *default_triggers[] __initdata = {
+ "heartbeat",
+ "ide-disk",
+ "nand-disk",
+ };
+
+ leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
+ GFP_KERNEL);
+ if (!leds_data)
+ return -ENOMEM;
+ for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
+ int rc;
+ struct rbtx4939_led_data *led_dat = &leds_data[i];
+
+ led_dat->num = i;
+ led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
+ sprintf(led_dat->name, "rbtx4939:amber:%u", i);
+ led_dat->cdev.name = led_dat->name;
+ if (i < ARRAY_SIZE(default_triggers))
+ led_dat->cdev.default_trigger = default_triggers[i];
+ rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
+ if (rc < 0)
+ return rc;
+ led_dat->cdev.brightness_set(&led_dat->cdev, 0);
+ }
+ return 0;
+
+}
+
+static struct platform_driver rbtx4939_led_driver = {
+ .driver = {
+ .name = "rbtx4939-led",
+ .owner = THIS_MODULE,
+ },
+};
+
+static void __init rbtx4939_led_setup(void)
+{
+ platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
+ platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
+}
+#else
+static inline void rbtx4939_led_setup(void)
+{
+}
+#endif
+
+static void __init rbtx4939_arch_init(void)
+{
+ rbtx4939_pci_setup();
+}
+
+static void __init rbtx4939_device_init(void)
+{
+#if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
+ int i, j;
+ unsigned char ethaddr[2][6];
+ for (i = 0; i < 2; i++) {
+ unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
+ if (readb(rbtx4939_bdipsw_addr) & 8) {
+ u16 buf[3];
+ area -= 0x03000000;
+ for (j = 0; j < 3; j++)
+ buf[j] = le16_to_cpup((u16 *)(area + j * 2));
+ memcpy(ethaddr[i], buf, 6);
+ } else
+ memcpy(ethaddr[i], (void *)area, 6);
+ }
+ tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
+#endif
+ rbtx4939_led_setup();
+ tx4939_wdt_init();
+ tx4939_ata_init();
+}
+
+static void __init rbtx4939_setup(void)
+{
+ rbtx4939_ebusc_setup();
+ /* always enable ATA0 */
+ txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
+ rbtx4939_update_ioc_pen();
+ if (txx9_master_clock == 0)
+ txx9_master_clock = 20000000;
+ tx4939_setup();
+
+ _machine_restart = rbtx4939_machine_restart;
+
+ pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
+ readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
+ readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
+
+#ifdef CONFIG_PCI
+ txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
+ txx9_board_pcibios_setup = tx4927_pcibios_setup;
+#else
+ set_io_port_base(RBTX4939_ETHER_BASE);
+#endif
+
+ tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
+}
+
+struct txx9_board_vec rbtx4939_vec __initdata = {
+ .system = "Tothiba RBTX4939",
+ .prom_init = rbtx4939_prom_init,
+ .mem_setup = rbtx4939_setup,
+ .irq_setup = rbtx4939_irq_setup,
+ .time_init = rbtx4939_time_init,
+ .device_init = rbtx4939_device_init,
+ .arch_init = rbtx4939_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = tx4939_pci_map_irq,
+#endif
+};
diff --git a/trunk/arch/powerpc/kernel/smp.c b/trunk/arch/powerpc/kernel/smp.c
index 5337ca7bb649..c27b10a1bd79 100644
--- a/trunk/arch/powerpc/kernel/smp.c
+++ b/trunk/arch/powerpc/kernel/smp.c
@@ -453,6 +453,7 @@ int __devinit start_secondary(void *unused)
secondary_cpu_time_init();
ipi_call_lock();
+ notify_cpu_starting(cpu);
cpu_set(cpu, cpu_online_map);
/* Update sibling maps */
base = cpu_first_thread_in_core(cpu);
diff --git a/trunk/arch/s390/Kconfig b/trunk/arch/s390/Kconfig
index 8d41908e2513..4c03049e7db9 100644
--- a/trunk/arch/s390/Kconfig
+++ b/trunk/arch/s390/Kconfig
@@ -74,6 +74,7 @@ config S390
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_KVM if 64BIT
+ select HAVE_ARCH_TRACEHOOK
source "init/Kconfig"
diff --git a/trunk/arch/s390/include/asm/dasd.h b/trunk/arch/s390/include/asm/dasd.h
index 3f002e13d024..55b2b80cdf6e 100644
--- a/trunk/arch/s390/include/asm/dasd.h
+++ b/trunk/arch/s390/include/asm/dasd.h
@@ -3,6 +3,8 @@
* Author(s)......: Holger Smolinski
* Bugreports.to..:
* (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
+ * EMC Symmetrix ioctl Copyright EMC Corporation, 2008
+ * Author.........: Nigel Hislop
*
* This file is the interface of the DASD device driver, which is exported to user space
* any future changes wrt the API will result in a change of the APIVERSION reported
@@ -202,6 +204,16 @@ typedef struct attrib_data_t {
#define DASD_SEQ_PRESTAGE 0x4
#define DASD_REC_ACCESS 0x5
+/*
+ * Perform EMC Symmetrix I/O
+ */
+typedef struct dasd_symmio_parms {
+ unsigned char reserved[8]; /* compat with older releases */
+ unsigned long long psf_data; /* char * cast to u64 */
+ unsigned long long rssd_result; /* char * cast to u64 */
+ int psf_data_len;
+ int rssd_result_len;
+} __attribute__ ((packed)) dasd_symmio_parms_t;
/********************************************************************************
* SECTION: Definition of IOCTLs
@@ -247,6 +259,7 @@ typedef struct attrib_data_t {
/* Set Attributes (cache operations) */
#define BIODASDSATTR _IOW(DASD_IOCTL_LETTER,2,attrib_data_t)
+#define BIODASDSYMMIO _IOWR(DASD_IOCTL_LETTER, 240, dasd_symmio_parms_t)
#endif /* DASD_H */
diff --git a/trunk/arch/s390/include/asm/delay.h b/trunk/arch/s390/include/asm/delay.h
index 78357314c450..a356c958e260 100644
--- a/trunk/arch/s390/include/asm/delay.h
+++ b/trunk/arch/s390/include/asm/delay.h
@@ -15,6 +15,7 @@
#define _S390_DELAY_H
extern void __udelay(unsigned long usecs);
+extern void udelay_simple(unsigned long usecs);
extern void __delay(unsigned long loops);
#define udelay(n) __udelay(n)
diff --git a/trunk/arch/s390/include/asm/pgtable.h b/trunk/arch/s390/include/asm/pgtable.h
index 0bdb704ae051..1a928f84afd6 100644
--- a/trunk/arch/s390/include/asm/pgtable.h
+++ b/trunk/arch/s390/include/asm/pgtable.h
@@ -281,6 +281,9 @@ extern char empty_zero_page[PAGE_SIZE];
#define RCP_GR_BIT 50
#define RCP_GC_BIT 49
+/* User dirty bit for KVM's migration feature */
+#define KVM_UD_BIT 47
+
#ifndef __s390x__
/* Bits in the segment table address-space-control-element */
@@ -575,12 +578,16 @@ static inline void ptep_rcp_copy(pte_t *ptep)
unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
skey = page_get_storage_key(page_to_phys(page));
- if (skey & _PAGE_CHANGED)
+ if (skey & _PAGE_CHANGED) {
set_bit_simple(RCP_GC_BIT, pgste);
+ set_bit_simple(KVM_UD_BIT, pgste);
+ }
if (skey & _PAGE_REFERENCED)
set_bit_simple(RCP_GR_BIT, pgste);
- if (test_and_clear_bit_simple(RCP_HC_BIT, pgste))
+ if (test_and_clear_bit_simple(RCP_HC_BIT, pgste)) {
SetPageDirty(page);
+ set_bit_simple(KVM_UD_BIT, pgste);
+ }
if (test_and_clear_bit_simple(RCP_HR_BIT, pgste))
SetPageReferenced(page);
#endif
@@ -744,6 +751,40 @@ static inline pte_t pte_mkspecial(pte_t pte)
return pte;
}
+#ifdef CONFIG_PGSTE
+/*
+ * Get (and clear) the user dirty bit for a PTE.
+ */
+static inline int kvm_s390_test_and_clear_page_dirty(struct mm_struct *mm,
+ pte_t *ptep)
+{
+ int dirty;
+ unsigned long *pgste;
+ struct page *page;
+ unsigned int skey;
+
+ if (!mm->context.pgstes)
+ return -EINVAL;
+ rcp_lock(ptep);
+ pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
+ page = virt_to_page(pte_val(*ptep));
+ skey = page_get_storage_key(page_to_phys(page));
+ if (skey & _PAGE_CHANGED) {
+ set_bit_simple(RCP_GC_BIT, pgste);
+ set_bit_simple(KVM_UD_BIT, pgste);
+ }
+ if (test_and_clear_bit_simple(RCP_HC_BIT, pgste)) {
+ SetPageDirty(page);
+ set_bit_simple(KVM_UD_BIT, pgste);
+ }
+ dirty = test_and_clear_bit_simple(KVM_UD_BIT, pgste);
+ if (skey & _PAGE_CHANGED)
+ page_clear_dirty(page);
+ rcp_unlock(ptep);
+ return dirty;
+}
+#endif
+
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
unsigned long addr, pte_t *ptep)
diff --git a/trunk/arch/s390/include/asm/ptrace.h b/trunk/arch/s390/include/asm/ptrace.h
index af2c9ac28a07..a7226f8143fb 100644
--- a/trunk/arch/s390/include/asm/ptrace.h
+++ b/trunk/arch/s390/include/asm/ptrace.h
@@ -490,6 +490,7 @@ extern void user_disable_single_step(struct task_struct *);
#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
+#define user_stack_pointer(regs)((regs)->gprs[15])
#define regs_return_value(regs)((regs)->gprs[2])
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs * regs);
diff --git a/trunk/arch/s390/include/asm/qdio.h b/trunk/arch/s390/include/asm/qdio.h
index 6813772171f2..4734c3f05354 100644
--- a/trunk/arch/s390/include/asm/qdio.h
+++ b/trunk/arch/s390/include/asm/qdio.h
@@ -299,7 +299,13 @@ struct qdio_ssqd_desc {
u8 mbccnt;
u16 qdioac2;
u64 sch_token;
- u64:64;
+ u8 mro;
+ u8 mri;
+ u8:8;
+ u8 sbalic;
+ u16:16;
+ u8:8;
+ u8 mmwc;
} __attribute__ ((packed));
/* params are: ccw_device, qdio_error, queue_number,
diff --git a/trunk/arch/s390/include/asm/syscall.h b/trunk/arch/s390/include/asm/syscall.h
new file mode 100644
index 000000000000..6e623971fbb9
--- /dev/null
+++ b/trunk/arch/s390/include/asm/syscall.h
@@ -0,0 +1,80 @@
+/*
+ * Access to user system call parameters and results
+ *
+ * Copyright IBM Corp. 2008
+ * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License (version 2 only)
+ * as published by the Free Software Foundation.
+ */
+
+#ifndef _ASM_SYSCALL_H
+#define _ASM_SYSCALL_H 1
+
+#include
+
+static inline long syscall_get_nr(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ if (regs->trap != __LC_SVC_OLD_PSW)
+ return -1;
+ return regs->gprs[2];
+}
+
+static inline void syscall_rollback(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ regs->gprs[2] = regs->orig_gpr2;
+}
+
+static inline long syscall_get_error(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ return (regs->gprs[2] >= -4096UL) ? -regs->gprs[2] : 0;
+}
+
+static inline long syscall_get_return_value(struct task_struct *task,
+ struct pt_regs *regs)
+{
+ return regs->gprs[2];
+}
+
+static inline void syscall_set_return_value(struct task_struct *task,
+ struct pt_regs *regs,
+ int error, long val)
+{
+ regs->gprs[2] = error ? -error : val;
+}
+
+static inline void syscall_get_arguments(struct task_struct *task,
+ struct pt_regs *regs,
+ unsigned int i, unsigned int n,
+ unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+#ifdef CONFIG_COMPAT
+ if (test_tsk_thread_flag(task, TIF_31BIT)) {
+ if (i + n == 6)
+ args[--n] = (u32) regs->args[0];
+ while (n-- > 0)
+ args[n] = (u32) regs->gprs[2 + i + n];
+ }
+#endif
+ if (i + n == 6)
+ args[--n] = regs->args[0];
+ memcpy(args, ®s->gprs[2 + i], n * sizeof(args[0]));
+}
+
+static inline void syscall_set_arguments(struct task_struct *task,
+ struct pt_regs *regs,
+ unsigned int i, unsigned int n,
+ const unsigned long *args)
+{
+ BUG_ON(i + n > 6);
+ if (i + n == 6)
+ regs->args[0] = args[--n];
+ memcpy(®s->gprs[2 + i], args, n * sizeof(args[0]));
+}
+
+#endif /* _ASM_SYSCALL_H */
diff --git a/trunk/arch/s390/include/asm/thread_info.h b/trunk/arch/s390/include/asm/thread_info.h
index 91a8f93ad355..ea40a9d690fc 100644
--- a/trunk/arch/s390/include/asm/thread_info.h
+++ b/trunk/arch/s390/include/asm/thread_info.h
@@ -86,6 +86,7 @@ static inline struct thread_info *current_thread_info(void)
* thread information flags bit numbers
*/
#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
+#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
#define TIF_SIGPENDING 2 /* signal pending */
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
#define TIF_RESTART_SVC 4 /* restart svc with new svc number */
@@ -100,6 +101,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_RESTORE_SIGMASK 20 /* restore signal mask in do_signal() */
#define _TIF_SYSCALL_TRACE (1<state = TASK_INTERRUPTIBLE;
- schedule();
- return -ERESTARTNOHAND;
-}
-
asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf,
size_t count, u32 poshi, u32 poslo)
{
diff --git a/trunk/arch/s390/kernel/compat_linux.h b/trunk/arch/s390/kernel/compat_linux.h
index 20723a062017..05f8516366ab 100644
--- a/trunk/arch/s390/kernel/compat_linux.h
+++ b/trunk/arch/s390/kernel/compat_linux.h
@@ -206,7 +206,6 @@ long sys32_gettimeofday(struct compat_timeval __user *tv,
struct timezone __user *tz);
long sys32_settimeofday(struct compat_timeval __user *tv,
struct timezone __user *tz);
-long sys32_pause(void);
long sys32_pread64(unsigned int fd, char __user *ubuf, size_t count,
u32 poshi, u32 poslo);
long sys32_pwrite64(unsigned int fd, const char __user *ubuf,
diff --git a/trunk/arch/s390/kernel/compat_wrapper.S b/trunk/arch/s390/kernel/compat_wrapper.S
index 328a20e880b5..ee51ca9e23b5 100644
--- a/trunk/arch/s390/kernel/compat_wrapper.S
+++ b/trunk/arch/s390/kernel/compat_wrapper.S
@@ -128,8 +128,6 @@ sys32_alarm_wrapper:
llgfr %r2,%r2 # unsigned int
jg sys_alarm # branch to system call
-#sys32_pause_wrapper # void
-
.globl compat_sys_utime_wrapper
compat_sys_utime_wrapper:
llgtr %r2,%r2 # char *
diff --git a/trunk/arch/s390/kernel/entry.S b/trunk/arch/s390/kernel/entry.S
index 708cf9cf9a35..ed500ef799b7 100644
--- a/trunk/arch/s390/kernel/entry.S
+++ b/trunk/arch/s390/kernel/entry.S
@@ -49,9 +49,9 @@ SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
-_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
_TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
-_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
_TIF_MCCK_PENDING)
STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
@@ -318,6 +318,8 @@ sysc_work:
bo BASED(sysc_reschedule)
tm __TI_flags+3(%r9),_TIF_SIGPENDING
bnz BASED(sysc_sigpending)
+ tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
+ bnz BASED(sysc_notify_resume)
tm __TI_flags+3(%r9),_TIF_RESTART_SVC
bo BASED(sysc_restart)
tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
@@ -355,6 +357,16 @@ sysc_sigpending:
bo BASED(sysc_singlestep)
b BASED(sysc_work_loop)
+#
+# _TIF_NOTIFY_RESUME is set, call do_notify_resume
+#
+sysc_notify_resume:
+ la %r2,SP_PTREGS(%r15) # load pt_regs
+ l %r1,BASED(.Ldo_notify_resume)
+ la %r14,BASED(sysc_work_loop)
+ br %r1 # call do_notify_resume
+
+
#
# _TIF_RESTART_SVC is set, set up registers and restart svc
#
@@ -378,20 +390,21 @@ sysc_singlestep:
br %r1 # branch to do_single_step
#
-# call trace before and after sys_call
+# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
+# and after the system call
#
sysc_tracesys:
- l %r1,BASED(.Ltrace)
+ l %r1,BASED(.Ltrace_entry)
la %r2,SP_PTREGS(%r15) # load pt_regs
la %r3,0
srl %r7,2
st %r7,SP_R2(%r15)
basr %r14,%r1
- clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
+ cl %r2,BASED(.Lnr_syscalls)
bnl BASED(sysc_tracenogo)
l %r8,BASED(.Lsysc_table)
- l %r7,SP_R2(%r15) # strace might have changed the
- sll %r7,2 # system call
+ lr %r7,%r2
+ sll %r7,2 # *4
l %r8,0(%r7,%r8)
sysc_tracego:
lm %r3,%r6,SP_R3(%r15)
@@ -401,9 +414,8 @@ sysc_tracego:
sysc_tracenogo:
tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
bz BASED(sysc_return)
- l %r1,BASED(.Ltrace)
+ l %r1,BASED(.Ltrace_exit)
la %r2,SP_PTREGS(%r15) # load pt_regs
- la %r3,1
la %r14,BASED(sysc_return)
br %r1
@@ -666,6 +678,8 @@ io_work_loop:
bo BASED(io_reschedule)
tm __TI_flags+3(%r9),_TIF_SIGPENDING
bnz BASED(io_sigpending)
+ tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
+ bnz BASED(io_notify_resume)
b BASED(io_restore)
io_work_done:
@@ -704,6 +718,19 @@ io_sigpending:
TRACE_IRQS_OFF
b BASED(io_work_loop)
+#
+# _TIF_SIGPENDING is set, call do_signal
+#
+io_notify_resume:
+ TRACE_IRQS_ON
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
+ la %r2,SP_PTREGS(%r15) # load pt_regs
+ l %r1,BASED(.Ldo_notify_resume)
+ basr %r14,%r1 # call do_signal
+ stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
+ TRACE_IRQS_OFF
+ b BASED(io_work_loop)
+
/*
* External interrupt handler routine
*/
@@ -1070,6 +1097,8 @@ cleanup_io_leave_insn:
.Ldo_IRQ: .long do_IRQ
.Ldo_extint: .long do_extint
.Ldo_signal: .long do_signal
+.Ldo_notify_resume:
+ .long do_notify_resume
.Lhandle_per: .long do_single_step
.Ldo_execve: .long do_execve
.Lexecve_tail: .long execve_tail
@@ -1079,7 +1108,8 @@ cleanup_io_leave_insn:
.Lpreempt_schedule_irq:
.long preempt_schedule_irq
#endif
-.Ltrace: .long syscall_trace
+.Ltrace_entry: .long do_syscall_trace_enter
+.Ltrace_exit: .long do_syscall_trace_exit
.Lschedtail: .long schedule_tail
.Lsysc_table: .long sys_call_table
#ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/trunk/arch/s390/kernel/entry64.S b/trunk/arch/s390/kernel/entry64.S
index fee10177dbfc..d7ce150453f2 100644
--- a/trunk/arch/s390/kernel/entry64.S
+++ b/trunk/arch/s390/kernel/entry64.S
@@ -52,9 +52,9 @@ SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
STACK_SIZE = 1 << STACK_SHIFT
-_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
_TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
-_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
_TIF_MCCK_PENDING)
#define BASED(name) name-system_call(%r13)
@@ -310,6 +310,8 @@ sysc_work:
jo sysc_reschedule
tm __TI_flags+7(%r9),_TIF_SIGPENDING
jnz sysc_sigpending
+ tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
+ jnz sysc_notify_resume
tm __TI_flags+7(%r9),_TIF_RESTART_SVC
jo sysc_restart
tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
@@ -344,6 +346,14 @@ sysc_sigpending:
jo sysc_singlestep
j sysc_work_loop
+#
+# _TIF_NOTIFY_RESUME is set, call do_notify_resume
+#
+sysc_notify_resume:
+ la %r2,SP_PTREGS(%r15) # load pt_regs
+ larl %r14,sysc_work_loop
+ jg do_notify_resume # call do_notify_resume
+
#
# _TIF_RESTART_SVC is set, set up registers and restart svc
#
@@ -367,20 +377,19 @@ sysc_singlestep:
jg do_single_step # branch to do_sigtrap
#
-# call syscall_trace before and after system call
-# special linkage: %r12 contains the return address for trace_svc
+# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
+# and after the system call
#
sysc_tracesys:
la %r2,SP_PTREGS(%r15) # load pt_regs
la %r3,0
srl %r7,2
stg %r7,SP_R2(%r15)
- brasl %r14,syscall_trace
+ brasl %r14,do_syscall_trace_enter
lghi %r0,NR_syscalls
- clg %r0,SP_R2(%r15)
+ clgr %r0,%r2
jnh sysc_tracenogo
- lg %r7,SP_R2(%r15) # strace might have changed the
- sll %r7,2 # system call
+ slag %r7,%r2,2 # *4
lgf %r8,0(%r7,%r10)
sysc_tracego:
lmg %r3,%r6,SP_R3(%r15)
@@ -391,9 +400,8 @@ sysc_tracenogo:
tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
jz sysc_return
la %r2,SP_PTREGS(%r15) # load pt_regs
- la %r3,1
larl %r14,sysc_return # return point is sysc_return
- jg syscall_trace
+ jg do_syscall_trace_exit
#
# a new process exits the kernel with ret_from_fork
@@ -672,6 +680,8 @@ io_work_loop:
jo io_reschedule
tm __TI_flags+7(%r9),_TIF_SIGPENDING
jnz io_sigpending
+ tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
+ jnz io_notify_resume
j io_restore
io_work_done:
@@ -712,6 +722,18 @@ io_sigpending:
TRACE_IRQS_OFF
j io_work_loop
+#
+# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
+#
+io_notify_resume:
+ TRACE_IRQS_ON
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
+ la %r2,SP_PTREGS(%r15) # load pt_regs
+ brasl %r14,do_notify_resume # call do_notify_resume
+ stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
+ TRACE_IRQS_OFF
+ j io_work_loop
+
/*
* External interrupt handler routine
*/
diff --git a/trunk/arch/s390/kernel/ptrace.c b/trunk/arch/s390/kernel/ptrace.c
index c8b08289eb87..1f31be1ecc4b 100644
--- a/trunk/arch/s390/kernel/ptrace.c
+++ b/trunk/arch/s390/kernel/ptrace.c
@@ -35,6 +35,7 @@
#include
#include
#include
+#include
#include
#include
@@ -639,40 +640,44 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
}
#endif
-asmlinkage void
-syscall_trace(struct pt_regs *regs, int entryexit)
+asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
{
- if (unlikely(current->audit_context) && entryexit)
- audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]), regs->gprs[2]);
-
- if (!test_thread_flag(TIF_SYSCALL_TRACE))
- goto out;
- if (!(current->ptrace & PT_PTRACED))
- goto out;
- ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
- ? 0x80 : 0));
+ long ret;
/*
- * If the debuffer has set an invalid system call number,
- * we prepare to skip the system call restart handling.
+ * The sysc_tracesys code in entry.S stored the system
+ * call number to gprs[2].
*/
- if (!entryexit && regs->gprs[2] >= NR_syscalls)
+ ret = regs->gprs[2];
+ if (test_thread_flag(TIF_SYSCALL_TRACE) &&
+ (tracehook_report_syscall_entry(regs) ||
+ regs->gprs[2] >= NR_syscalls)) {
+ /*
+ * Tracing decided this syscall should not happen or the
+ * debugger stored an invalid system call number. Skip
+ * the system call and the system call restart handling.
+ */
regs->trap = -1;
-
- /*
- * this isn't the same as continuing with a signal, but it will do
- * for normal use. strace only continues with a signal if the
- * stopping signal is not SIGTRAP. -brl
- */
- if (current->exit_code) {
- send_sig(current->exit_code, current, 1);
- current->exit_code = 0;
+ ret = -1;
}
- out:
- if (unlikely(current->audit_context) && !entryexit)
- audit_syscall_entry(test_thread_flag(TIF_31BIT)?AUDIT_ARCH_S390:AUDIT_ARCH_S390X,
- regs->gprs[2], regs->orig_gpr2, regs->gprs[3],
- regs->gprs[4], regs->gprs[5]);
+
+ if (unlikely(current->audit_context))
+ audit_syscall_entry(test_thread_flag(TIF_31BIT) ?
+ AUDIT_ARCH_S390 : AUDIT_ARCH_S390X,
+ regs->gprs[2], regs->orig_gpr2,
+ regs->gprs[3], regs->gprs[4],
+ regs->gprs[5]);
+ return ret;
+}
+
+asmlinkage void do_syscall_trace_exit(struct pt_regs *regs)
+{
+ if (unlikely(current->audit_context))
+ audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]),
+ regs->gprs[2]);
+
+ if (test_thread_flag(TIF_SYSCALL_TRACE))
+ tracehook_report_syscall_exit(regs, 0);
}
/*
diff --git a/trunk/arch/s390/kernel/signal.c b/trunk/arch/s390/kernel/signal.c
index b97682040215..4f7fc3059a8e 100644
--- a/trunk/arch/s390/kernel/signal.c
+++ b/trunk/arch/s390/kernel/signal.c
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -507,6 +508,12 @@ void do_signal(struct pt_regs *regs)
*/
if (current->thread.per_info.single_step)
set_thread_flag(TIF_SINGLE_STEP);
+
+ /*
+ * Let tracing know that we've done the handler setup.
+ */
+ tracehook_signal_handler(signr, &info, &ka, regs,
+ test_thread_flag(TIF_SINGLE_STEP));
}
return;
}
@@ -526,3 +533,9 @@ void do_signal(struct pt_regs *regs)
set_thread_flag(TIF_RESTART_SVC);
}
}
+
+void do_notify_resume(struct pt_regs *regs)
+{
+ clear_thread_flag(TIF_NOTIFY_RESUME);
+ tracehook_notify_resume(regs);
+}
diff --git a/trunk/arch/s390/kernel/smp.c b/trunk/arch/s390/kernel/smp.c
index 00b9b4dec5eb..9e8b1f9b8f4d 100644
--- a/trunk/arch/s390/kernel/smp.c
+++ b/trunk/arch/s390/kernel/smp.c
@@ -585,6 +585,8 @@ int __cpuinit start_secondary(void *cpuvoid)
/* Enable pfault pseudo page faults on this cpu. */
pfault_init();
+ /* call cpu notifiers */
+ notify_cpu_starting(smp_processor_id());
/* Mark this cpu as online */
spin_lock(&call_lock);
cpu_set(smp_processor_id(), cpu_online_map);
diff --git a/trunk/arch/s390/kernel/syscalls.S b/trunk/arch/s390/kernel/syscalls.S
index c66d35e55142..3ae303914b42 100644
--- a/trunk/arch/s390/kernel/syscalls.S
+++ b/trunk/arch/s390/kernel/syscalls.S
@@ -37,7 +37,7 @@ SYSCALL(sys_stime,sys_ni_syscall,sys32_stime_wrapper) /* 25 old stime syscall *
SYSCALL(sys_ptrace,sys_ptrace,sys32_ptrace_wrapper)
SYSCALL(sys_alarm,sys_alarm,sys32_alarm_wrapper)
NI_SYSCALL /* old fstat syscall */
-SYSCALL(sys_pause,sys_pause,sys32_pause)
+SYSCALL(sys_pause,sys_pause,sys_pause)
SYSCALL(sys_utime,sys_utime,compat_sys_utime_wrapper) /* 30 */
NI_SYSCALL /* old stty syscall */
NI_SYSCALL /* old gtty syscall */
diff --git a/trunk/arch/s390/kernel/time.c b/trunk/arch/s390/kernel/time.c
index 06acb1a18bbc..b94e9e3b694a 100644
--- a/trunk/arch/s390/kernel/time.c
+++ b/trunk/arch/s390/kernel/time.c
@@ -1356,7 +1356,7 @@ static void __init stp_reset(void)
stp_page = alloc_bootmem_pages(PAGE_SIZE);
rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
- if (rc == 1)
+ if (rc == 0)
set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
else if (stp_online) {
printk(KERN_WARNING "Running on non STP capable machine.\n");
diff --git a/trunk/arch/s390/lib/delay.c b/trunk/arch/s390/lib/delay.c
index 0953cee05efc..6ccb9fab055a 100644
--- a/trunk/arch/s390/lib/delay.c
+++ b/trunk/arch/s390/lib/delay.c
@@ -92,3 +92,16 @@ void __udelay(unsigned long usecs)
local_irq_restore(flags);
preempt_enable();
}
+
+/*
+ * Simple udelay variant. To be used on startup and reboot
+ * when the interrupt handler isn't working.
+ */
+void udelay_simple(unsigned long usecs)
+{
+ u64 end;
+
+ end = get_clock() + ((u64) usecs << 12);
+ while (get_clock() < end)
+ cpu_relax();
+}
diff --git a/trunk/arch/s390/mm/extmem.c b/trunk/arch/s390/mm/extmem.c
index f231f5ec74b6..580fc64cc735 100644
--- a/trunk/arch/s390/mm/extmem.c
+++ b/trunk/arch/s390/mm/extmem.c
@@ -43,20 +43,40 @@
#define DCSS_FINDSEG 0x0c
#define DCSS_LOADNOLY 0x10
#define DCSS_SEGEXT 0x18
+#define DCSS_LOADSHRX 0x20
+#define DCSS_LOADNSRX 0x24
+#define DCSS_FINDSEGX 0x2c
+#define DCSS_SEGEXTX 0x38
#define DCSS_FINDSEGA 0x0c
struct qrange {
- unsigned int start; // 3byte start address, 1 byte type
- unsigned int end; // 3byte end address, 1 byte reserved
+ unsigned long start; /* last byte type */
+ unsigned long end; /* last byte reserved */
};
struct qout64 {
+ unsigned long segstart;
+ unsigned long segend;
+ int segcnt;
+ int segrcnt;
+ struct qrange range[6];
+};
+
+#ifdef CONFIG_64BIT
+struct qrange_old {
+ unsigned int start; /* last byte type */
+ unsigned int end; /* last byte reserved */
+};
+
+/* output area format for the Diag x'64' old subcode x'18' */
+struct qout64_old {
int segstart;
int segend;
int segcnt;
int segrcnt;
- struct qrange range[6];
+ struct qrange_old range[6];
};
+#endif
struct qin64 {
char qopcode;
@@ -86,6 +106,55 @@ static DEFINE_MUTEX(dcss_lock);
static LIST_HEAD(dcss_list);
static char *segtype_string[] = { "SW", "EW", "SR", "ER", "SN", "EN", "SC",
"EW/EN-MIXED" };
+static int loadshr_scode, loadnsr_scode, findseg_scode;
+static int segext_scode, purgeseg_scode;
+static int scode_set;
+
+/* set correct Diag x'64' subcodes. */
+static int
+dcss_set_subcodes(void)
+{
+#ifdef CONFIG_64BIT
+ char *name = kmalloc(8 * sizeof(char), GFP_DMA);
+ unsigned long rx, ry;
+ int rc;
+
+ if (name == NULL)
+ return -ENOMEM;
+
+ rx = (unsigned long) name;
+ ry = DCSS_FINDSEGX;
+
+ strcpy(name, "dummy");
+ asm volatile(
+ " diag %0,%1,0x64\n"
+ "0: ipm %2\n"
+ " srl %2,28\n"
+ " j 2f\n"
+ "1: la %2,3\n"
+ "2:\n"
+ EX_TABLE(0b, 1b)
+ : "+d" (rx), "+d" (ry), "=d" (rc) : : "cc");
+
+ kfree(name);
+ /* Diag x'64' new subcodes are supported, set to new subcodes */
+ if (rc != 3) {
+ loadshr_scode = DCSS_LOADSHRX;
+ loadnsr_scode = DCSS_LOADNSRX;
+ purgeseg_scode = DCSS_PURGESEG;
+ findseg_scode = DCSS_FINDSEGX;
+ segext_scode = DCSS_SEGEXTX;
+ return 0;
+ }
+#endif
+ /* Diag x'64' new subcodes are not supported, set to old subcodes */
+ loadshr_scode = DCSS_LOADNOLY;
+ loadnsr_scode = DCSS_LOADNSR;
+ purgeseg_scode = DCSS_PURGESEG;
+ findseg_scode = DCSS_FINDSEG;
+ segext_scode = DCSS_SEGEXT;
+ return 0;
+}
/*
* Create the 8 bytes, ebcdic VM segment name from
@@ -135,25 +204,45 @@ segment_by_name (char *name)
* Perform a function on a dcss segment.
*/
static inline int
-dcss_diag (__u8 func, void *parameter,
+dcss_diag(int *func, void *parameter,
unsigned long *ret1, unsigned long *ret2)
{
unsigned long rx, ry;
int rc;
+ if (scode_set == 0) {
+ rc = dcss_set_subcodes();
+ if (rc < 0)
+ return rc;
+ scode_set = 1;
+ }
rx = (unsigned long) parameter;
- ry = (unsigned long) func;
- asm volatile(
+ ry = (unsigned long) *func;
+
#ifdef CONFIG_64BIT
- " sam31\n"
- " diag %0,%1,0x64\n"
- " sam64\n"
+ /* 64-bit Diag x'64' new subcode, keep in 64-bit addressing mode */
+ if (*func > DCSS_SEGEXT)
+ asm volatile(
+ " diag %0,%1,0x64\n"
+ " ipm %2\n"
+ " srl %2,28\n"
+ : "+d" (rx), "+d" (ry), "=d" (rc) : : "cc");
+ /* 31-bit Diag x'64' old subcode, switch to 31-bit addressing mode */
+ else
+ asm volatile(
+ " sam31\n"
+ " diag %0,%1,0x64\n"
+ " sam64\n"
+ " ipm %2\n"
+ " srl %2,28\n"
+ : "+d" (rx), "+d" (ry), "=d" (rc) : : "cc");
#else
+ asm volatile(
" diag %0,%1,0x64\n"
-#endif
" ipm %2\n"
" srl %2,28\n"
: "+d" (rx), "+d" (ry), "=d" (rc) : : "cc");
+#endif
*ret1 = rx;
*ret2 = ry;
return rc;
@@ -190,14 +279,45 @@ query_segment_type (struct dcss_segment *seg)
qin->qoutlen = sizeof(struct qout64);
memcpy (qin->qname, seg->dcss_name, 8);
- diag_cc = dcss_diag (DCSS_SEGEXT, qin, &dummy, &vmrc);
+ diag_cc = dcss_diag(&segext_scode, qin, &dummy, &vmrc);
+ if (diag_cc < 0) {
+ rc = diag_cc;
+ goto out_free;
+ }
if (diag_cc > 1) {
PRINT_WARN ("segment_type: diag returned error %ld\n", vmrc);
rc = dcss_diag_translate_rc (vmrc);
goto out_free;
}
+#ifdef CONFIG_64BIT
+ /* Only old format of output area of Diagnose x'64' is supported,
+ copy data for the new format. */
+ if (segext_scode == DCSS_SEGEXT) {
+ struct qout64_old *qout_old;
+ qout_old = kzalloc(sizeof(struct qout64_old), GFP_DMA);
+ if (qout_old == NULL) {
+ rc = -ENOMEM;
+ goto out_free;
+ }
+ memcpy(qout_old, qout, sizeof(struct qout64_old));
+ qout->segstart = (unsigned long) qout_old->segstart;
+ qout->segend = (unsigned long) qout_old->segend;
+ qout->segcnt = qout_old->segcnt;
+ qout->segrcnt = qout_old->segrcnt;
+
+ if (qout->segcnt > 6)
+ qout->segrcnt = 6;
+ for (i = 0; i < qout->segrcnt; i++) {
+ qout->range[i].start =
+ (unsigned long) qout_old->range[i].start;
+ qout->range[i].end =
+ (unsigned long) qout_old->range[i].end;
+ }
+ kfree(qout_old);
+ }
+#endif
if (qout->segcnt > 6) {
rc = -ENOTSUPP;
goto out_free;
@@ -268,6 +388,30 @@ segment_type (char* name)
return seg.vm_segtype;
}
+/*
+ * check if segment collides with other segments that are currently loaded
+ * returns 1 if this is the case, 0 if no collision was found
+ */
+static int
+segment_overlaps_others (struct dcss_segment *seg)
+{
+ struct list_head *l;
+ struct dcss_segment *tmp;
+
+ BUG_ON(!mutex_is_locked(&dcss_lock));
+ list_for_each(l, &dcss_list) {
+ tmp = list_entry(l, struct dcss_segment, list);
+ if ((tmp->start_addr >> 20) > (seg->end >> 20))
+ continue;
+ if ((tmp->end >> 20) < (seg->start_addr >> 20))
+ continue;
+ if (seg == tmp)
+ continue;
+ return 1;
+ }
+ return 0;
+}
+
/*
* real segment loading function, called from segment_load
*/
@@ -276,7 +420,8 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
{
struct dcss_segment *seg = kmalloc(sizeof(struct dcss_segment),
GFP_DMA);
- int dcss_command, rc, diag_cc;
+ int rc, diag_cc;
+ unsigned long start_addr, end_addr, dummy;
if (seg == NULL) {
rc = -ENOMEM;
@@ -287,6 +432,13 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
if (rc < 0)
goto out_free;
+ if (loadshr_scode == DCSS_LOADSHRX) {
+ if (segment_overlaps_others(seg)) {
+ rc = -EBUSY;
+ goto out_free;
+ }
+ }
+
rc = vmem_add_mapping(seg->start_addr, seg->end - seg->start_addr + 1);
if (rc)
@@ -316,20 +468,28 @@ __segment_load (char *name, int do_nonshared, unsigned long *addr, unsigned long
}
if (do_nonshared)
- dcss_command = DCSS_LOADNSR;
+ diag_cc = dcss_diag(&loadnsr_scode, seg->dcss_name,
+ &start_addr, &end_addr);
else
- dcss_command = DCSS_LOADNOLY;
-
- diag_cc = dcss_diag(dcss_command, seg->dcss_name,
- &seg->start_addr, &seg->end);
+ diag_cc = dcss_diag(&loadshr_scode, seg->dcss_name,
+ &start_addr, &end_addr);
+ if (diag_cc < 0) {
+ dcss_diag(&purgeseg_scode, seg->dcss_name,
+ &dummy, &dummy);
+ rc = diag_cc;
+ goto out_resource;
+ }
if (diag_cc > 1) {
PRINT_WARN ("segment_load: could not load segment %s - "
- "diag returned error (%ld)\n",name,seg->end);
- rc = dcss_diag_translate_rc (seg->end);
- dcss_diag(DCSS_PURGESEG, seg->dcss_name,
- &seg->start_addr, &seg->end);
+ "diag returned error (%ld)\n",
+ name, end_addr);
+ rc = dcss_diag_translate_rc(end_addr);
+ dcss_diag(&purgeseg_scode, seg->dcss_name,
+ &dummy, &dummy);
goto out_resource;
}
+ seg->start_addr = start_addr;
+ seg->end = end_addr;
seg->do_nonshared = do_nonshared;
atomic_set(&seg->ref_count, 1);
list_add(&seg->list, &dcss_list);
@@ -423,8 +583,8 @@ int
segment_modify_shared (char *name, int do_nonshared)
{
struct dcss_segment *seg;
- unsigned long dummy;
- int dcss_command, rc, diag_cc;
+ unsigned long start_addr, end_addr, dummy;
+ int rc, diag_cc;
mutex_lock(&dcss_lock);
seg = segment_by_name (name);
@@ -445,38 +605,51 @@ segment_modify_shared (char *name, int do_nonshared)
goto out_unlock;
}
release_resource(seg->res);
- if (do_nonshared) {
- dcss_command = DCSS_LOADNSR;
+ if (do_nonshared)
seg->res->flags &= ~IORESOURCE_READONLY;
- } else {
- dcss_command = DCSS_LOADNOLY;
+ else
if (seg->vm_segtype == SEG_TYPE_SR ||
seg->vm_segtype == SEG_TYPE_ER)
seg->res->flags |= IORESOURCE_READONLY;
- }
+
if (request_resource(&iomem_resource, seg->res)) {
PRINT_WARN("segment_modify_shared: could not reload segment %s"
" - overlapping resources\n", name);
rc = -EBUSY;
kfree(seg->res);
- goto out_del;
+ goto out_del_mem;
+ }
+
+ dcss_diag(&purgeseg_scode, seg->dcss_name, &dummy, &dummy);
+ if (do_nonshared)
+ diag_cc = dcss_diag(&loadnsr_scode, seg->dcss_name,
+ &start_addr, &end_addr);
+ else
+ diag_cc = dcss_diag(&loadshr_scode, seg->dcss_name,
+ &start_addr, &end_addr);
+ if (diag_cc < 0) {
+ rc = diag_cc;
+ goto out_del_res;
}
- dcss_diag(DCSS_PURGESEG, seg->dcss_name, &dummy, &dummy);
- diag_cc = dcss_diag(dcss_command, seg->dcss_name,
- &seg->start_addr, &seg->end);
if (diag_cc > 1) {
PRINT_WARN ("segment_modify_shared: could not reload segment %s"
- " - diag returned error (%ld)\n",name,seg->end);
- rc = dcss_diag_translate_rc (seg->end);
- goto out_del;
+ " - diag returned error (%ld)\n",
+ name, end_addr);
+ rc = dcss_diag_translate_rc(end_addr);
+ goto out_del_res;
}
+ seg->start_addr = start_addr;
+ seg->end = end_addr;
seg->do_nonshared = do_nonshared;
rc = 0;
goto out_unlock;
- out_del:
+ out_del_res:
+ release_resource(seg->res);
+ kfree(seg->res);
+ out_del_mem:
vmem_remove_mapping(seg->start_addr, seg->end - seg->start_addr + 1);
list_del(&seg->list);
- dcss_diag(DCSS_PURGESEG, seg->dcss_name, &dummy, &dummy);
+ dcss_diag(&purgeseg_scode, seg->dcss_name, &dummy, &dummy);
kfree(seg);
out_unlock:
mutex_unlock(&dcss_lock);
@@ -510,7 +683,7 @@ segment_unload(char *name)
kfree(seg->res);
vmem_remove_mapping(seg->start_addr, seg->end - seg->start_addr + 1);
list_del(&seg->list);
- dcss_diag(DCSS_PURGESEG, seg->dcss_name, &dummy, &dummy);
+ dcss_diag(&purgeseg_scode, seg->dcss_name, &dummy, &dummy);
kfree(seg);
out_unlock:
mutex_unlock(&dcss_lock);
@@ -545,7 +718,7 @@ segment_save(char *name)
endpfn = (seg->end) >> PAGE_SHIFT;
sprintf(cmd1, "DEFSEG %s", name);
for (i=0; isegcnt; i++) {
- sprintf(cmd1+strlen(cmd1), " %X-%X %s",
+ sprintf(cmd1+strlen(cmd1), " %lX-%lX %s",
seg->range[i].start >> PAGE_SHIFT,
seg->range[i].end >> PAGE_SHIFT,
segtype_string[seg->range[i].start & 0xff]);
diff --git a/trunk/arch/sh/kernel/smp.c b/trunk/arch/sh/kernel/smp.c
index 60c50841143e..001778f9adaf 100644
--- a/trunk/arch/sh/kernel/smp.c
+++ b/trunk/arch/sh/kernel/smp.c
@@ -82,6 +82,8 @@ asmlinkage void __cpuinit start_secondary(void)
preempt_disable();
+ notify_cpu_starting(smp_processor_id());
+
local_irq_enable();
calibrate_delay();
diff --git a/trunk/arch/sparc/kernel/sun4d_smp.c b/trunk/arch/sparc/kernel/sun4d_smp.c
index 69596402a500..446767e8f569 100644
--- a/trunk/arch/sparc/kernel/sun4d_smp.c
+++ b/trunk/arch/sparc/kernel/sun4d_smp.c
@@ -88,6 +88,7 @@ void __init smp4d_callin(void)
local_flush_cache_all();
local_flush_tlb_all();
+ notify_cpu_starting(cpuid);
/*
* Unblock the master CPU _only_ when the scheduler state
* of all secondary CPUs will be up-to-date, so after
diff --git a/trunk/arch/sparc/kernel/sun4m_smp.c b/trunk/arch/sparc/kernel/sun4m_smp.c
index a14a76ac7f36..9964890dc1db 100644
--- a/trunk/arch/sparc/kernel/sun4m_smp.c
+++ b/trunk/arch/sparc/kernel/sun4m_smp.c
@@ -71,6 +71,8 @@ void __cpuinit smp4m_callin(void)
local_flush_cache_all();
local_flush_tlb_all();
+ notify_cpu_starting(cpuid);
+
/* Get our local ticker going. */
smp_setup_percpu_timer();
diff --git a/trunk/arch/um/Kconfig.char b/trunk/arch/um/Kconfig.char
index 1b238ebae6b3..70dabd1e0652 100644
--- a/trunk/arch/um/Kconfig.char
+++ b/trunk/arch/um/Kconfig.char
@@ -203,6 +203,10 @@ config SOUND
tristate
default UML_SOUND
+config SOUND_OSS_CORE
+ bool
+ default UML_SOUND
+
config HOSTAUDIO
tristate
default UML_SOUND
diff --git a/trunk/arch/um/kernel/smp.c b/trunk/arch/um/kernel/smp.c
index be2d50c3aa95..045772142844 100644
--- a/trunk/arch/um/kernel/smp.c
+++ b/trunk/arch/um/kernel/smp.c
@@ -85,6 +85,7 @@ static int idle_proc(void *cpup)
while (!cpu_isset(cpu, smp_commenced_mask))
cpu_relax();
+ notify_cpu_starting(cpu);
cpu_set(cpu, cpu_online_map);
default_idle();
return 0;
diff --git a/trunk/arch/x86/Kconfig b/trunk/arch/x86/Kconfig
index ed92864d1325..97f0d2b6dc0c 100644
--- a/trunk/arch/x86/Kconfig
+++ b/trunk/arch/x86/Kconfig
@@ -29,6 +29,7 @@ config X86
select HAVE_FTRACE
select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64)
select HAVE_ARCH_KGDB if !X86_VOYAGER
+ select HAVE_ARCH_TRACEHOOK
select HAVE_GENERIC_DMA_COHERENT if X86_32
select HAVE_EFFICIENT_UNALIGNED_ACCESS
@@ -1020,7 +1021,7 @@ config HAVE_ARCH_ALLOC_REMAP
config ARCH_FLATMEM_ENABLE
def_bool y
- depends on X86_32 && ARCH_SELECT_MEMORY_MODEL && X86_PC && !NUMA
+ depends on X86_32 && ARCH_SELECT_MEMORY_MODEL && !NUMA
config ARCH_DISCONTIGMEM_ENABLE
def_bool y
@@ -1036,7 +1037,7 @@ config ARCH_SPARSEMEM_DEFAULT
config ARCH_SPARSEMEM_ENABLE
def_bool y
- depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC)
+ depends on X86_64 || NUMA || (EXPERIMENTAL && X86_PC) || X86_GENERICARCH
select SPARSEMEM_STATIC if X86_32
select SPARSEMEM_VMEMMAP_ENABLE if X86_64
@@ -1117,10 +1118,10 @@ config MTRR
You can safely say Y even if your machine doesn't have MTRRs, you'll
just add about 9 KB to your kernel.
- See for more information.
+ See for more information.
config MTRR_SANITIZER
- bool
+ def_bool y
prompt "MTRR cleanup support"
depends on MTRR
help
@@ -1131,7 +1132,7 @@ config MTRR_SANITIZER
The largest mtrr entry size for a continous block can be set with
mtrr_chunk_size.
- If unsure, say N.
+ If unsure, say Y.
config MTRR_SANITIZER_ENABLE_DEFAULT
int "MTRR cleanup enable value (0-1)"
@@ -1191,7 +1192,6 @@ config IRQBALANCE
config SECCOMP
def_bool y
prompt "Enable seccomp to safely compute untrusted bytecode"
- depends on PROC_FS
help
This kernel feature is useful for number crunching applications
that may need to compute untrusted bytecode during their
@@ -1199,7 +1199,7 @@ config SECCOMP
the process as file descriptors supporting the read/write
syscalls, it's possible to isolate those applications in
their own address space using seccomp. Once seccomp is
- enabled via /proc//seccomp, it cannot be disabled
+ enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
@@ -1356,14 +1356,14 @@ config PHYSICAL_ALIGN
Don't change this unless you know what you are doing.
config HOTPLUG_CPU
- bool "Support for suspend on SMP and hot-pluggable CPUs (EXPERIMENTAL)"
- depends on SMP && HOTPLUG && EXPERIMENTAL && !X86_VOYAGER
+ bool "Support for hot-pluggable CPUs"
+ depends on SMP && HOTPLUG && !X86_VOYAGER
---help---
- Say Y here to experiment with turning CPUs off and on, and to
- enable suspend on SMP systems. CPUs can be controlled through
- /sys/devices/system/cpu.
- Say N if you want to disable CPU hotplug and don't need to
- suspend.
+ Say Y here to allow turning CPUs off and on. CPUs can be
+ controlled through /sys/devices/system/cpu.
+ ( Note: power management support will enable this option
+ automatically on SMP systems. )
+ Say N if you want to disable CPU hotplug.
config COMPAT_VDSO
def_bool y
@@ -1378,6 +1378,51 @@ config COMPAT_VDSO
If unsure, say Y.
+config CMDLINE_BOOL
+ bool "Built-in kernel command line"
+ default n
+ help
+ Allow for specifying boot arguments to the kernel at
+ build time. On some systems (e.g. embedded ones), it is
+ necessary or convenient to provide some or all of the
+ kernel boot arguments with the kernel itself (that is,
+ to not rely on the boot loader to provide them.)
+
+ To compile command line arguments into the kernel,
+ set this option to 'Y', then fill in the
+ the boot arguments in CONFIG_CMDLINE.
+
+ Systems with fully functional boot loaders (i.e. non-embedded)
+ should leave this option set to 'N'.
+
+config CMDLINE
+ string "Built-in kernel command string"
+ depends on CMDLINE_BOOL
+ default ""
+ help
+ Enter arguments here that should be compiled into the kernel
+ image and used at boot time. If the boot loader provides a
+ command line at boot time, it is appended to this string to
+ form the full kernel command line, when the system boots.
+
+ However, you can use the CONFIG_CMDLINE_OVERRIDE option to
+ change this behavior.
+
+ In most cases, the command line (whether built-in or provided
+ by the boot loader) should specify the device for the root
+ file system.
+
+config CMDLINE_OVERRIDE
+ bool "Built-in command line overrides boot loader arguments"
+ default n
+ depends on CMDLINE_BOOL
+ help
+ Set this option to 'Y' to have the kernel ignore the boot loader
+ command line, and use ONLY the built-in command line.
+
+ This is used to work around broken boot loaders. This should
+ be set to 'N' under normal conditions.
+
endmenu
config ARCH_ENABLE_MEMORY_HOTPLUG
@@ -1773,7 +1818,7 @@ config COMPAT_FOR_U64_ALIGNMENT
config SYSVIPC_COMPAT
def_bool y
- depends on X86_64 && COMPAT && SYSVIPC
+ depends on COMPAT && SYSVIPC
endmenu
diff --git a/trunk/arch/x86/Kconfig.cpu b/trunk/arch/x86/Kconfig.cpu
index b225219c448c..60a85768cfcb 100644
--- a/trunk/arch/x86/Kconfig.cpu
+++ b/trunk/arch/x86/Kconfig.cpu
@@ -418,3 +418,21 @@ config X86_MINIMUM_CPU_FAMILY
config X86_DEBUGCTLMSR
def_bool y
depends on !(MK6 || MWINCHIPC6 || MWINCHIP2 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386)
+
+config X86_DS
+ bool "Debug Store support"
+ default y
+ help
+ Add support for Debug Store.
+ This allows the kernel to provide a memory buffer to the hardware
+ to store various profiling and tracing events.
+
+config X86_PTRACE_BTS
+ bool "ptrace interface to Branch Trace Store"
+ default y
+ depends on (X86_DS && X86_DEBUGCTLMSR)
+ help
+ Add a ptrace interface to allow collecting an execution trace
+ of the traced task.
+ This collects control flow changes in a (cyclic) buffer and allows
+ debuggers to fill in the gaps and show an execution trace of the debuggee.
diff --git a/trunk/arch/x86/boot/compressed/head_32.S b/trunk/arch/x86/boot/compressed/head_32.S
index ba7736cf2ec7..29c5fbf08392 100644
--- a/trunk/arch/x86/boot/compressed/head_32.S
+++ b/trunk/arch/x86/boot/compressed/head_32.S
@@ -137,14 +137,15 @@ relocated:
*/
movl output_len(%ebx), %eax
pushl %eax
+ # push arguments for decompress_kernel:
pushl %ebp # output address
movl input_len(%ebx), %eax
pushl %eax # input_len
leal input_data(%ebx), %eax
pushl %eax # input_data
leal boot_heap(%ebx), %eax
- pushl %eax # heap area as third argument
- pushl %esi # real mode pointer as second arg
+ pushl %eax # heap area
+ pushl %esi # real mode pointer
call decompress_kernel
addl $20, %esp
popl %ecx
diff --git a/trunk/arch/x86/boot/compressed/misc.c b/trunk/arch/x86/boot/compressed/misc.c
index 9fea73706479..5780d361105b 100644
--- a/trunk/arch/x86/boot/compressed/misc.c
+++ b/trunk/arch/x86/boot/compressed/misc.c
@@ -16,7 +16,7 @@
*/
#undef CONFIG_PARAVIRT
#ifdef CONFIG_X86_32
-#define _ASM_DESC_H_ 1
+#define ASM_X86__DESC_H 1
#endif
#ifdef CONFIG_X86_64
@@ -27,7 +27,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
@@ -251,7 +251,7 @@ static void __putstr(int error, const char *s)
y--;
}
} else {
- vidmem [(x + cols * y) * 2] = c;
+ vidmem[(x + cols * y) * 2] = c;
if (++x >= cols) {
x = 0;
if (++y >= lines) {
@@ -277,7 +277,8 @@ static void *memset(void *s, int c, unsigned n)
int i;
char *ss = s;
- for (i = 0; i < n; i++) ss[i] = c;
+ for (i = 0; i < n; i++)
+ ss[i] = c;
return s;
}
@@ -287,7 +288,8 @@ static void *memcpy(void *dest, const void *src, unsigned n)
const char *s = src;
char *d = dest;
- for (i = 0; i < n; i++) d[i] = s[i];
+ for (i = 0; i < n; i++)
+ d[i] = s[i];
return dest;
}
diff --git a/trunk/arch/x86/boot/header.S b/trunk/arch/x86/boot/header.S
index af86e431acfa..b993062e9a5f 100644
--- a/trunk/arch/x86/boot/header.S
+++ b/trunk/arch/x86/boot/header.S
@@ -30,7 +30,6 @@ SYSSEG = DEF_SYSSEG /* system loaded at 0x10000 (65536) */
SYSSIZE = DEF_SYSSIZE /* system size: # of 16-byte clicks */
/* to be loaded */
ROOT_DEV = 0 /* ROOT_DEV is now written by "build" */
-SWAP_DEV = 0 /* SWAP_DEV is now written by "build" */
#ifndef SVGA_MODE
#define SVGA_MODE ASK_VGA
diff --git a/trunk/arch/x86/configs/i386_defconfig b/trunk/arch/x86/configs/i386_defconfig
index 104275e191a8..ef9a52005ec9 100644
--- a/trunk/arch/x86/configs/i386_defconfig
+++ b/trunk/arch/x86/configs/i386_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc4
-# Mon Aug 25 15:04:00 2008
+# Linux kernel version: 2.6.27-rc5
+# Wed Sep 3 17:23:09 2008
#
# CONFIG_64BIT is not set
CONFIG_X86_32=y
@@ -202,7 +202,7 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_M586 is not set
# CONFIG_M586TSC is not set
# CONFIG_M586MMX is not set
-# CONFIG_M686 is not set
+CONFIG_M686=y
# CONFIG_MPENTIUMII is not set
# CONFIG_MPENTIUMIII is not set
# CONFIG_MPENTIUMM is not set
@@ -221,13 +221,14 @@ CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_MVIAC3_2 is not set
# CONFIG_MVIAC7 is not set
# CONFIG_MPSC is not set
-CONFIG_MCORE2=y
+# CONFIG_MCORE2 is not set
# CONFIG_GENERIC_CPU is not set
CONFIG_X86_GENERIC=y
CONFIG_X86_CPU=y
CONFIG_X86_CMPXCHG=y
CONFIG_X86_L1_CACHE_SHIFT=7
CONFIG_X86_XADD=y
+# CONFIG_X86_PPRO_FENCE is not set
CONFIG_X86_WP_WORKS_OK=y
CONFIG_X86_INVLPG=y
CONFIG_X86_BSWAP=y
@@ -235,14 +236,15 @@ CONFIG_X86_POPAD_OK=y
CONFIG_X86_INTEL_USERCOPY=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_TSC=y
+CONFIG_X86_CMOV=y
CONFIG_X86_MINIMUM_CPU_FAMILY=4
CONFIG_X86_DEBUGCTLMSR=y
CONFIG_HPET_TIMER=y
CONFIG_HPET_EMULATE_RTC=y
CONFIG_DMI=y
# CONFIG_IOMMU_HELPER is not set
-CONFIG_NR_CPUS=4
-# CONFIG_SCHED_SMT is not set
+CONFIG_NR_CPUS=64
+CONFIG_SCHED_SMT=y
CONFIG_SCHED_MC=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
@@ -254,7 +256,8 @@ CONFIG_VM86=y
# CONFIG_TOSHIBA is not set
# CONFIG_I8K is not set
CONFIG_X86_REBOOTFIXUPS=y
-# CONFIG_MICROCODE is not set
+CONFIG_MICROCODE=y
+CONFIG_MICROCODE_OLD_INTERFACE=y
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
# CONFIG_NOHIGHMEM is not set
@@ -2115,7 +2118,7 @@ CONFIG_IO_DELAY_0X80=y
CONFIG_DEFAULT_IO_DELAY_TYPE=0
CONFIG_DEBUG_BOOT_PARAMS=y
# CONFIG_CPA_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_OPTIMIZE_INLINING=y
#
# Security options
diff --git a/trunk/arch/x86/configs/x86_64_defconfig b/trunk/arch/x86/configs/x86_64_defconfig
index 678c8acefe04..e620ea6e2a7a 100644
--- a/trunk/arch/x86/configs/x86_64_defconfig
+++ b/trunk/arch/x86/configs/x86_64_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc4
-# Mon Aug 25 14:40:46 2008
+# Linux kernel version: 2.6.27-rc5
+# Wed Sep 3 17:13:39 2008
#
CONFIG_64BIT=y
# CONFIG_X86_32 is not set
@@ -218,17 +218,14 @@ CONFIG_X86_PC=y
# CONFIG_MVIAC3_2 is not set
# CONFIG_MVIAC7 is not set
# CONFIG_MPSC is not set
-CONFIG_MCORE2=y
-# CONFIG_GENERIC_CPU is not set
+# CONFIG_MCORE2 is not set
+CONFIG_GENERIC_CPU=y
CONFIG_X86_CPU=y
-CONFIG_X86_L1_CACHE_BYTES=64
-CONFIG_X86_INTERNODE_CACHE_BYTES=64
+CONFIG_X86_L1_CACHE_BYTES=128
+CONFIG_X86_INTERNODE_CACHE_BYTES=128
CONFIG_X86_CMPXCHG=y
-CONFIG_X86_L1_CACHE_SHIFT=6
+CONFIG_X86_L1_CACHE_SHIFT=7
CONFIG_X86_WP_WORKS_OK=y
-CONFIG_X86_INTEL_USERCOPY=y
-CONFIG_X86_USE_PPRO_CHECKSUM=y
-CONFIG_X86_P6_NOP=y
CONFIG_X86_TSC=y
CONFIG_X86_CMPXCHG64=y
CONFIG_X86_CMOV=y
@@ -243,9 +240,8 @@ CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y
CONFIG_AMD_IOMMU=y
CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
-# CONFIG_MAXSMP is not set
-CONFIG_NR_CPUS=4
-# CONFIG_SCHED_SMT is not set
+CONFIG_NR_CPUS=64
+CONFIG_SCHED_SMT=y
CONFIG_SCHED_MC=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
@@ -254,7 +250,8 @@ CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y
# CONFIG_X86_MCE is not set
# CONFIG_I8K is not set
-# CONFIG_MICROCODE is not set
+CONFIG_MICROCODE=y
+CONFIG_MICROCODE_OLD_INTERFACE=y
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
CONFIG_NUMA=y
@@ -290,7 +287,7 @@ CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_MTRR=y
# CONFIG_MTRR_SANITIZER is not set
-# CONFIG_X86_PAT is not set
+CONFIG_X86_PAT=y
CONFIG_EFI=y
CONFIG_SECCOMP=y
# CONFIG_HZ_100 is not set
@@ -2089,7 +2086,7 @@ CONFIG_IO_DELAY_0X80=y
CONFIG_DEFAULT_IO_DELAY_TYPE=0
CONFIG_DEBUG_BOOT_PARAMS=y
# CONFIG_CPA_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_OPTIMIZE_INLINING=y
#
# Security options
diff --git a/trunk/arch/x86/crypto/Makefile b/trunk/arch/x86/crypto/Makefile
index 3874c2de5403..903de4aa5094 100644
--- a/trunk/arch/x86/crypto/Makefile
+++ b/trunk/arch/x86/crypto/Makefile
@@ -10,6 +10,8 @@ obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o
+obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
+
aes-i586-y := aes-i586-asm_32.o aes_glue.o
twofish-i586-y := twofish-i586-asm_32.o twofish_glue.o
salsa20-i586-y := salsa20-i586-asm_32.o salsa20_glue.o
diff --git a/trunk/arch/x86/crypto/crc32c-intel.c b/trunk/arch/x86/crypto/crc32c-intel.c
new file mode 100644
index 000000000000..070afc5b6c94
--- /dev/null
+++ b/trunk/arch/x86/crypto/crc32c-intel.c
@@ -0,0 +1,197 @@
+/*
+ * Using hardware provided CRC32 instruction to accelerate the CRC32 disposal.
+ * CRC32C polynomial:0x1EDC6F41(BE)/0x82F63B78(LE)
+ * CRC32 is a new instruction in Intel SSE4.2, the reference can be found at:
+ * http://www.intel.com/products/processor/manuals/
+ * Intel(R) 64 and IA-32 Architectures Software Developer's Manual
+ * Volume 2A: Instruction Set Reference, A-M
+ *
+ * Copyright (c) 2008 Austin Zhang
+ * Copyright (c) 2008 Kent Liu
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#define CHKSUM_BLOCK_SIZE 1
+#define CHKSUM_DIGEST_SIZE 4
+
+#define SCALE_F sizeof(unsigned long)
+
+#ifdef CONFIG_X86_64
+#define REX_PRE "0x48, "
+#else
+#define REX_PRE
+#endif
+
+static u32 crc32c_intel_le_hw_byte(u32 crc, unsigned char const *data, size_t length)
+{
+ while (length--) {
+ __asm__ __volatile__(
+ ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
+ :"=S"(crc)
+ :"0"(crc), "c"(*data)
+ );
+ data++;
+ }
+
+ return crc;
+}
+
+static u32 __pure crc32c_intel_le_hw(u32 crc, unsigned char const *p, size_t len)
+{
+ unsigned int iquotient = len / SCALE_F;
+ unsigned int iremainder = len % SCALE_F;
+ unsigned long *ptmp = (unsigned long *)p;
+
+ while (iquotient--) {
+ __asm__ __volatile__(
+ ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
+ :"=S"(crc)
+ :"0"(crc), "c"(*ptmp)
+ );
+ ptmp++;
+ }
+
+ if (iremainder)
+ crc = crc32c_intel_le_hw_byte(crc, (unsigned char *)ptmp,
+ iremainder);
+
+ return crc;
+}
+
+/*
+ * Setting the seed allows arbitrary accumulators and flexible XOR policy
+ * If your algorithm starts with ~0, then XOR with ~0 before you set
+ * the seed.
+ */
+static int crc32c_intel_setkey(struct crypto_ahash *hash, const u8 *key,
+ unsigned int keylen)
+{
+ u32 *mctx = crypto_ahash_ctx(hash);
+
+ if (keylen != sizeof(u32)) {
+ crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
+ return -EINVAL;
+ }
+ *mctx = le32_to_cpup((__le32 *)key);
+ return 0;
+}
+
+static int crc32c_intel_init(struct ahash_request *req)
+{
+ u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
+ u32 *crcp = ahash_request_ctx(req);
+
+ *crcp = *mctx;
+
+ return 0;
+}
+
+static int crc32c_intel_update(struct ahash_request *req)
+{
+ struct crypto_hash_walk walk;
+ u32 *crcp = ahash_request_ctx(req);
+ u32 crc = *crcp;
+ int nbytes;
+
+ for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
+ nbytes = crypto_hash_walk_done(&walk, 0))
+ crc = crc32c_intel_le_hw(crc, walk.data, nbytes);
+
+ *crcp = crc;
+ return 0;
+}
+
+static int crc32c_intel_final(struct ahash_request *req)
+{
+ u32 *crcp = ahash_request_ctx(req);
+
+ *(__le32 *)req->result = ~cpu_to_le32p(crcp);
+ return 0;
+}
+
+static int crc32c_intel_digest(struct ahash_request *req)
+{
+ struct crypto_hash_walk walk;
+ u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
+ u32 crc = *mctx;
+ int nbytes;
+
+ for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
+ nbytes = crypto_hash_walk_done(&walk, 0))
+ crc = crc32c_intel_le_hw(crc, walk.data, nbytes);
+
+ *(__le32 *)req->result = ~cpu_to_le32(crc);
+ return 0;
+}
+
+static int crc32c_intel_cra_init(struct crypto_tfm *tfm)
+{
+ u32 *key = crypto_tfm_ctx(tfm);
+
+ *key = ~0;
+
+ tfm->crt_ahash.reqsize = sizeof(u32);
+
+ return 0;
+}
+
+static struct crypto_alg alg = {
+ .cra_name = "crc32c",
+ .cra_driver_name = "crc32c-intel",
+ .cra_priority = 200,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH,
+ .cra_blocksize = CHKSUM_BLOCK_SIZE,
+ .cra_alignmask = 3,
+ .cra_ctxsize = sizeof(u32),
+ .cra_module = THIS_MODULE,
+ .cra_list = LIST_HEAD_INIT(alg.cra_list),
+ .cra_init = crc32c_intel_cra_init,
+ .cra_type = &crypto_ahash_type,
+ .cra_u = {
+ .ahash = {
+ .digestsize = CHKSUM_DIGEST_SIZE,
+ .setkey = crc32c_intel_setkey,
+ .init = crc32c_intel_init,
+ .update = crc32c_intel_update,
+ .final = crc32c_intel_final,
+ .digest = crc32c_intel_digest,
+ }
+ }
+};
+
+
+static int __init crc32c_intel_mod_init(void)
+{
+ if (cpu_has_xmm4_2)
+ return crypto_register_alg(&alg);
+ else
+ return -ENODEV;
+}
+
+static void __exit crc32c_intel_mod_fini(void)
+{
+ crypto_unregister_alg(&alg);
+}
+
+module_init(crc32c_intel_mod_init);
+module_exit(crc32c_intel_mod_fini);
+
+MODULE_AUTHOR("Austin Zhang , Kent Liu ");
+MODULE_DESCRIPTION("CRC32c (Castagnoli) optimization using Intel Hardware.");
+MODULE_LICENSE("GPL");
+
+MODULE_ALIAS("crc32c");
+MODULE_ALIAS("crc32c-intel");
+
diff --git a/trunk/arch/x86/ia32/ia32_aout.c b/trunk/arch/x86/ia32/ia32_aout.c
index a0e1dbe67dc1..127ec3f07214 100644
--- a/trunk/arch/x86/ia32/ia32_aout.c
+++ b/trunk/arch/x86/ia32/ia32_aout.c
@@ -85,8 +85,10 @@ static void dump_thread32(struct pt_regs *regs, struct user32 *dump)
dump->regs.ax = regs->ax;
dump->regs.ds = current->thread.ds;
dump->regs.es = current->thread.es;
- asm("movl %%fs,%0" : "=r" (fs)); dump->regs.fs = fs;
- asm("movl %%gs,%0" : "=r" (gs)); dump->regs.gs = gs;
+ savesegment(fs, fs);
+ dump->regs.fs = fs;
+ savesegment(gs, gs);
+ dump->regs.gs = gs;
dump->regs.orig_ax = regs->orig_ax;
dump->regs.ip = regs->ip;
dump->regs.cs = regs->cs;
@@ -430,8 +432,9 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
current->mm->start_stack =
(unsigned long)create_aout_tables((char __user *)bprm->p, bprm);
/* start thread */
- asm volatile("movl %0,%%fs" :: "r" (0)); \
- asm volatile("movl %0,%%es; movl %0,%%ds": :"r" (__USER32_DS));
+ loadsegment(fs, 0);
+ loadsegment(ds, __USER32_DS);
+ loadsegment(es, __USER32_DS);
load_gs_index(0);
(regs)->ip = ex.a_entry;
(regs)->sp = current->mm->start_stack;
diff --git a/trunk/arch/x86/ia32/ia32_signal.c b/trunk/arch/x86/ia32/ia32_signal.c
index 20af4c79579a..f1a2ac777faf 100644
--- a/trunk/arch/x86/ia32/ia32_signal.c
+++ b/trunk/arch/x86/ia32/ia32_signal.c
@@ -206,7 +206,7 @@ struct rt_sigframe
{ unsigned int cur; \
unsigned short pre; \
err |= __get_user(pre, &sc->seg); \
- asm volatile("movl %%" #seg ",%0" : "=r" (cur)); \
+ savesegment(seg, cur); \
pre |= mask; \
if (pre != cur) loadsegment(seg, pre); }
@@ -235,7 +235,7 @@ static int ia32_restore_sigcontext(struct pt_regs *regs,
*/
err |= __get_user(gs, &sc->gs);
gs |= 3;
- asm("movl %%gs,%0" : "=r" (oldgs));
+ savesegment(gs, oldgs);
if (gs != oldgs)
load_gs_index(gs);
@@ -355,14 +355,13 @@ static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
{
int tmp, err = 0;
- tmp = 0;
- __asm__("movl %%gs,%0" : "=r"(tmp): "0"(tmp));
+ savesegment(gs, tmp);
err |= __put_user(tmp, (unsigned int __user *)&sc->gs);
- __asm__("movl %%fs,%0" : "=r"(tmp): "0"(tmp));
+ savesegment(fs, tmp);
err |= __put_user(tmp, (unsigned int __user *)&sc->fs);
- __asm__("movl %%ds,%0" : "=r"(tmp): "0"(tmp));
+ savesegment(ds, tmp);
err |= __put_user(tmp, (unsigned int __user *)&sc->ds);
- __asm__("movl %%es,%0" : "=r"(tmp): "0"(tmp));
+ savesegment(es, tmp);
err |= __put_user(tmp, (unsigned int __user *)&sc->es);
err |= __put_user((u32)regs->di, &sc->di);
@@ -498,8 +497,8 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
regs->dx = 0;
regs->cx = 0;
- asm volatile("movl %0,%%ds" :: "r" (__USER32_DS));
- asm volatile("movl %0,%%es" :: "r" (__USER32_DS));
+ loadsegment(ds, __USER32_DS);
+ loadsegment(es, __USER32_DS);
regs->cs = __USER32_CS;
regs->ss = __USER32_DS;
@@ -591,8 +590,8 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
regs->dx = (unsigned long) &frame->info;
regs->cx = (unsigned long) &frame->uc;
- asm volatile("movl %0,%%ds" :: "r" (__USER32_DS));
- asm volatile("movl %0,%%es" :: "r" (__USER32_DS));
+ loadsegment(ds, __USER32_DS);
+ loadsegment(es, __USER32_DS);
regs->cs = __USER32_CS;
regs->ss = __USER32_DS;
diff --git a/trunk/arch/x86/ia32/sys_ia32.c b/trunk/arch/x86/ia32/sys_ia32.c
index d3c64088b981..beda4232ce69 100644
--- a/trunk/arch/x86/ia32/sys_ia32.c
+++ b/trunk/arch/x86/ia32/sys_ia32.c
@@ -556,15 +556,6 @@ asmlinkage long sys32_rt_sigqueueinfo(int pid, int sig,
return ret;
}
-/* These are here just in case some old ia32 binary calls it. */
-asmlinkage long sys32_pause(void)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- return -ERESTARTNOHAND;
-}
-
-
#ifdef CONFIG_SYSCTL_SYSCALL
struct sysctl_ia32 {
unsigned int name;
diff --git a/trunk/arch/x86/kernel/acpi/boot.c b/trunk/arch/x86/kernel/acpi/boot.c
index c102af85df9c..7d40ef7b36e3 100644
--- a/trunk/arch/x86/kernel/acpi/boot.c
+++ b/trunk/arch/x86/kernel/acpi/boot.c
@@ -58,7 +58,6 @@ EXPORT_SYMBOL(acpi_disabled);
#ifdef CONFIG_X86_64
#include
-#include
#else /* X86 */
@@ -97,8 +96,6 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
#warning ACPI uses CMPXCHG, i486 and later hardware
#endif
-static int acpi_mcfg_64bit_base_addr __initdata = FALSE;
-
/* --------------------------------------------------------------------------
Boot-time Configuration
-------------------------------------------------------------------------- */
@@ -160,6 +157,8 @@ char *__init __acpi_map_table(unsigned long phys, unsigned long size)
struct acpi_mcfg_allocation *pci_mmcfg_config;
int pci_mmcfg_config_num;
+static int acpi_mcfg_64bit_base_addr __initdata = FALSE;
+
static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg)
{
if (!strcmp(mcfg->header.oem_id, "SGI"))
diff --git a/trunk/arch/x86/kernel/alternative.c b/trunk/arch/x86/kernel/alternative.c
index 65a0c1b48696..fb04e49776ba 100644
--- a/trunk/arch/x86/kernel/alternative.c
+++ b/trunk/arch/x86/kernel/alternative.c
@@ -231,25 +231,25 @@ static void alternatives_smp_lock(u8 **start, u8 **end, u8 *text, u8 *text_end)
continue;
if (*ptr > text_end)
continue;
- text_poke(*ptr, ((unsigned char []){0xf0}), 1); /* add lock prefix */
+ /* turn DS segment override prefix into lock prefix */
+ text_poke(*ptr, ((unsigned char []){0xf0}), 1);
};
}
static void alternatives_smp_unlock(u8 **start, u8 **end, u8 *text, u8 *text_end)
{
u8 **ptr;
- char insn[1];
if (noreplace_smp)
return;
- add_nops(insn, 1);
for (ptr = start; ptr < end; ptr++) {
if (*ptr < text)
continue;
if (*ptr > text_end)
continue;
- text_poke(*ptr, insn, 1);
+ /* turn lock prefix into DS segment override prefix */
+ text_poke(*ptr, ((unsigned char []){0x3E}), 1);
};
}
diff --git a/trunk/arch/x86/kernel/aperture_64.c b/trunk/arch/x86/kernel/aperture_64.c
index 44e21826db11..9a32b37ee2ee 100644
--- a/trunk/arch/x86/kernel/aperture_64.c
+++ b/trunk/arch/x86/kernel/aperture_64.c
@@ -455,11 +455,11 @@ void __init gart_iommu_hole_init(void)
force_iommu ||
valid_agp ||
fallback_aper_force) {
- printk(KERN_ERR
+ printk(KERN_INFO
"Your BIOS doesn't leave a aperture memory hole\n");
- printk(KERN_ERR
+ printk(KERN_INFO
"Please enable the IOMMU option in the BIOS setup\n");
- printk(KERN_ERR
+ printk(KERN_INFO
"This costs you %d MB of RAM\n",
32 << fallback_aper_order);
diff --git a/trunk/arch/x86/kernel/apm_32.c b/trunk/arch/x86/kernel/apm_32.c
index 732d1f4e10ee..5145a6e72bbb 100644
--- a/trunk/arch/x86/kernel/apm_32.c
+++ b/trunk/arch/x86/kernel/apm_32.c
@@ -228,7 +228,6 @@
#include
#include
#include
-#include
#include
#include
diff --git a/trunk/arch/x86/kernel/asm-offsets_64.c b/trunk/arch/x86/kernel/asm-offsets_64.c
index aa89387006fe..505543a75a56 100644
--- a/trunk/arch/x86/kernel/asm-offsets_64.c
+++ b/trunk/arch/x86/kernel/asm-offsets_64.c
@@ -22,7 +22,7 @@
#define __NO_STUBS 1
#undef __SYSCALL
-#undef _ASM_X86_64_UNISTD_H_
+#undef ASM_X86__UNISTD_64_H
#define __SYSCALL(nr, sym) [nr] = 1,
static char syscalls[] = {
#include
diff --git a/trunk/arch/x86/kernel/bios_uv.c b/trunk/arch/x86/kernel/bios_uv.c
index c639bd55391c..fdd585f9c53d 100644
--- a/trunk/arch/x86/kernel/bios_uv.c
+++ b/trunk/arch/x86/kernel/bios_uv.c
@@ -25,11 +25,11 @@ x86_bios_strerror(long status)
{
const char *str;
switch (status) {
- case 0: str = "Call completed without error"; break;
- case -1: str = "Not implemented"; break;
- case -2: str = "Invalid argument"; break;
- case -3: str = "Call completed with error"; break;
- default: str = "Unknown BIOS status code"; break;
+ case 0: str = "Call completed without error"; break;
+ case -1: str = "Not implemented"; break;
+ case -2: str = "Invalid argument"; break;
+ case -3: str = "Call completed with error"; break;
+ default: str = "Unknown BIOS status code"; break;
}
return str;
}
diff --git a/trunk/arch/x86/kernel/cpu/common_64.c b/trunk/arch/x86/kernel/cpu/common_64.c
index a11f5d4477cd..305b465889b0 100644
--- a/trunk/arch/x86/kernel/cpu/common_64.c
+++ b/trunk/arch/x86/kernel/cpu/common_64.c
@@ -430,6 +430,49 @@ static __init int setup_noclflush(char *arg)
}
__setup("noclflush", setup_noclflush);
+struct msr_range {
+ unsigned min;
+ unsigned max;
+};
+
+static struct msr_range msr_range_array[] __cpuinitdata = {
+ { 0x00000000, 0x00000418},
+ { 0xc0000000, 0xc000040b},
+ { 0xc0010000, 0xc0010142},
+ { 0xc0011000, 0xc001103b},
+};
+
+static void __cpuinit print_cpu_msr(void)
+{
+ unsigned index;
+ u64 val;
+ int i;
+ unsigned index_min, index_max;
+
+ for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) {
+ index_min = msr_range_array[i].min;
+ index_max = msr_range_array[i].max;
+ for (index = index_min; index < index_max; index++) {
+ if (rdmsrl_amd_safe(index, &val))
+ continue;
+ printk(KERN_INFO " MSR%08x: %016llx\n", index, val);
+ }
+ }
+}
+
+static int show_msr __cpuinitdata;
+static __init int setup_show_msr(char *arg)
+{
+ int num;
+
+ get_option(&arg, &num);
+
+ if (num > 0)
+ show_msr = num;
+ return 1;
+}
+__setup("show_msr=", setup_show_msr);
+
void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
{
if (c->x86_model_id[0])
@@ -439,6 +482,14 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
printk(KERN_CONT " stepping %02x\n", c->x86_mask);
else
printk(KERN_CONT "\n");
+
+#ifdef CONFIG_SMP
+ if (c->cpu_index < show_msr)
+ print_cpu_msr();
+#else
+ if (show_msr)
+ print_cpu_msr();
+#endif
}
static __init int setup_disablecpuid(char *arg)
diff --git a/trunk/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/trunk/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index dd097b835839..c24c4a487b7c 100644
--- a/trunk/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/trunk/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -256,7 +256,8 @@ static u32 get_cur_val(const cpumask_t *mask)
* Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
* no meaning should be associated with absolute values of these MSRs.
*/
-static unsigned int get_measured_perf(unsigned int cpu)
+static unsigned int get_measured_perf(struct cpufreq_policy *policy,
+ unsigned int cpu)
{
union {
struct {
@@ -326,7 +327,7 @@ static unsigned int get_measured_perf(unsigned int cpu)
#endif
- retval = per_cpu(drv_data, cpu)->max_freq * perf_percent / 100;
+ retval = per_cpu(drv_data, policy->cpu)->max_freq * perf_percent / 100;
put_cpu();
set_cpus_allowed_ptr(current, &saved_mask);
@@ -785,7 +786,11 @@ static int __init acpi_cpufreq_init(void)
if (ret)
return ret;
- return cpufreq_register_driver(&acpi_cpufreq_driver);
+ ret = cpufreq_register_driver(&acpi_cpufreq_driver);
+ if (ret)
+ free_percpu(acpi_perf_data);
+
+ return ret;
}
static void __exit acpi_cpufreq_exit(void)
@@ -795,8 +800,6 @@ static void __exit acpi_cpufreq_exit(void)
cpufreq_unregister_driver(&acpi_cpufreq_driver);
free_percpu(acpi_perf_data);
-
- return;
}
module_param(acpi_pstate_strict, uint, 0644);
diff --git a/trunk/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/trunk/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index e4a4bf870e94..fe613c93b366 100644
--- a/trunk/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/trunk/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -25,8 +25,8 @@
#include