From 515885ed857542a2ea6c6bfbb46d82fc440db332 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Erik=20Andr=C3=A9n?= <erik.andren@gmail.com>
Date: Sat, 14 Mar 2009 22:39:32 +0100
Subject: [PATCH] --- yaml --- r: 141239 b: refs/heads/master c:
 20da58ccfd95941988733c7d72113435188696dc h: refs/heads/master i:   141237:
 f5b37b593efceae1da6d788e70a0424ce21f71a4   141235:
 10bf5684836b7494ca5bc8ecd95fa73d046e616b   141231:
 9b96e0208daa7a79a6a827d252146d12e87048ea v: v3

---
 [refs]                          |  2 +-
 trunk/drivers/staging/agnx/rf.c | 21 ++++++++++-----------
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/[refs] b/[refs]
index bdeb41890a2a..f079bf8ab4d5 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 0f31f62d2a303b1074cb10749d599b29367c825b
+refs/heads/master: 20da58ccfd95941988733c7d72113435188696dc
diff --git a/trunk/drivers/staging/agnx/rf.c b/trunk/drivers/staging/agnx/rf.c
index 9e1e9d5ccf9b..42e457a1844f 100644
--- a/trunk/drivers/staging/agnx/rf.c
+++ b/trunk/drivers/staging/agnx/rf.c
@@ -109,12 +109,12 @@ void rf_chips_init(struct agnx_priv *priv)
 	}
 
 	/* Set SPI clock speed to 200NS */
-        reg = agnx_read32(ctl, AGNX_SPI_CFG);
-        reg &= ~0xF;
-        reg |= 0x3;
-        agnx_write32(ctl, AGNX_SPI_CFG, reg);
+	reg = agnx_read32(ctl, AGNX_SPI_CFG);
+	reg &= ~0xF;
+	reg |= 0x3;
+	agnx_write32(ctl, AGNX_SPI_CFG, reg);
 
-        /* Set SPI clock speed to 50NS */
+	/* Set SPI clock speed to 50NS */
 	reg = agnx_read32(ctl, AGNX_SPI_CFG);
 	reg &= ~0xF;
 	reg |= 0x1;
@@ -256,7 +256,7 @@ static void antenna_init(struct agnx_priv *priv, int num_antenna)
 		agnx_write32(ctl, AGNX_GCR_THD0BTFEST, 70);
 		agnx_write32(ctl, AGNX_GCR_SIGHTH, 100);
 		agnx_write32(ctl, AGNX_GCR_SIGLTH, 48);
-//		agnx_write32(ctl, AGNX_GCR_SIGLTH, 16);
+/*		agnx_write32(ctl, AGNX_GCR_SIGLTH, 16); */
 		break;
 	default:
 		printk(KERN_WARNING PFX "Unknow antenna number\n");
@@ -275,8 +275,8 @@ static void chain_update(struct agnx_priv *priv, u32 chain)
 	if (reg == 0x4)
 		spi_rf_write(ctl, RF_CHIP0|RF_CHIP1, reg|0x1000);
 	else if (reg != 0x0)
-     		spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000);
-        else {
+		spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000);
+	else {
 		if (chain == 3 || chain == 6) {
 			spi_rf_write(ctl, RF_CHIP0|RF_CHIP1|RF_CHIP2, reg|0x1000);
 			agnx_write32(ctl, AGNX_GCR_RXOVERIDE, 0x0);
@@ -634,8 +634,7 @@ static void chain_calibrate(struct agnx_priv *priv, struct chains *chains,
 	}
 } /* chain_calibrate */
 
-
-static void inline get_calibrete_value(struct agnx_priv *priv, struct chains *chains,
+static inline void get_calibrete_value(struct agnx_priv *priv, struct chains *chains,
 				       unsigned int num)
 {
 	void __iomem *ctl = priv->ctl;
@@ -652,7 +651,7 @@ static void inline get_calibrete_value(struct agnx_priv *priv, struct chains *ch
 	}
 
 	if (num == 0 || num == 1 || num == 2) {
-		if ( 0 == chains[num].cali)
+		if (0 == chains[num].cali)
 			chains[num].cali = 0xff;
 		else
 			chains[num].cali--;