From 517e1f94d8db1812e1c775b3e36ac4b04b2ae7e9 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 28 Feb 2006 12:51:55 -0500 Subject: [PATCH] --- yaml --- r: 21110 b: refs/heads/master c: afc847b7ddcf636e524cf5b0de644bd3a9419a8c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/CREDITS | 1 + trunk/MAINTAINERS | 3 +- trunk/Makefile | 2 +- trunk/arch/mips/Makefile | 3 +- trunk/arch/mips/arc/misc.c | 19 +++ trunk/arch/mips/au1000/common/reset.c | 10 +- trunk/arch/mips/kernel/time.c | 6 +- trunk/arch/mips/mm/c-r4k.c | 13 +- trunk/arch/mips/mm/c-tx39.c | 1 + trunk/arch/mips/sibyte/sb1250/time.c | 77 +++------ trunk/arch/mips/sibyte/swarm/setup.c | 7 - trunk/drivers/net/tg3.c | 52 ++---- trunk/drivers/net/tg3.h | 1 - trunk/include/asm-mips/cpu-features.h | 3 - trunk/include/asm-mips/cpu-info.h | 1 - trunk/include/asm-mips/hazards.h | 180 +++++++++------------ trunk/include/asm-mips/io.h | 18 +-- trunk/include/asm-mips/r4kcache.h | 3 +- trunk/include/asm-mips/sibyte/sb1250.h | 2 +- trunk/include/asm-mips/sibyte/sb1250_scd.h | 5 +- trunk/include/linux/pci_ids.h | 1 - trunk/include/net/ax25.h | 9 +- trunk/kernel/exit.c | 7 +- trunk/net/ax25/sysctl_net_ax25.c | 2 +- 25 files changed, 153 insertions(+), 275 deletions(-) diff --git a/[refs] b/[refs] index 49afa6932930..7db9572b0045 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7705a8792b0fc82fd7d4dd923724606bbfd9fb20 +refs/heads/master: afc847b7ddcf636e524cf5b0de644bd3a9419a8c diff --git a/trunk/CREDITS b/trunk/CREDITS index 1f171f1033bd..64511e2abc8e 100644 --- a/trunk/CREDITS +++ b/trunk/CREDITS @@ -120,6 +120,7 @@ D: Author of lil (Linux Interrupt Latency benchmark) D: Fixed the shm swap deallocation at swapoff time (try_to_unuse message) D: VM hacker D: Various other kernel hacks +S: Via Cicalini 26 S: Imola 40026 S: Italy diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 8db5c339845d..3d7d30dc5439 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1752,8 +1752,7 @@ P: Ralf Baechle M: ralf@linux-mips.org W: http://www.linux-mips.org/ L: linux-mips@linux-mips.org -T: git www.linux-mips.org:/pub/scm/linux.git -S: Supported +S: Maintained MISCELLANEOUS MCA-SUPPORT P: James Bottomley diff --git a/trunk/Makefile b/trunk/Makefile index cb5790580fca..ac54c03c1b1a 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 16 -EXTRAVERSION = +EXTRAVERSION =-rc6 NAME=Sliding Snow Leopard # *DOCUMENTATION* diff --git a/trunk/arch/mips/Makefile b/trunk/arch/mips/Makefile index 3d8dac681c63..fe9da16f3a40 100644 --- a/trunk/arch/mips/Makefile +++ b/trunk/arch/mips/Makefile @@ -108,8 +108,7 @@ MODFLAGS += -mlong-calls cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB) cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL) -cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ - -fno-omit-frame-pointer +cflags-$(CONFIG_SB1XXX_CORELIS) += -mno-sched-prolog -fno-omit-frame-pointer # # Use: $(call set_gccflags,,,,,) diff --git a/trunk/arch/mips/arc/misc.c b/trunk/arch/mips/arc/misc.c index b2e10b9e9452..84867de22028 100644 --- a/trunk/arch/mips/arc/misc.c +++ b/trunk/arch/mips/arc/misc.c @@ -9,6 +9,7 @@ * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org) * Copyright (C) 1999 Silicon Graphics, Inc. */ +#include #include #include @@ -19,11 +20,17 @@ #include #include +extern void *sgiwd93_host; +extern void reset_wd33c93(void *instance); + VOID ArcHalt(VOID) { bc_disable(); local_irq_disable(); +#ifdef CONFIG_SCSI_SGIWD93 + reset_wd33c93(sgiwd93_host); +#endif ARC_CALL0(halt); never: goto never; } @@ -33,6 +40,9 @@ ArcPowerDown(VOID) { bc_disable(); local_irq_disable(); +#ifdef CONFIG_SCSI_SGIWD93 + reset_wd33c93(sgiwd93_host); +#endif ARC_CALL0(pdown); never: goto never; } @@ -43,6 +53,9 @@ ArcRestart(VOID) { bc_disable(); local_irq_disable(); +#ifdef CONFIG_SCSI_SGIWD93 + reset_wd33c93(sgiwd93_host); +#endif ARC_CALL0(restart); never: goto never; } @@ -52,6 +65,9 @@ ArcReboot(VOID) { bc_disable(); local_irq_disable(); +#ifdef CONFIG_SCSI_SGIWD93 + reset_wd33c93(sgiwd93_host); +#endif ARC_CALL0(reboot); never: goto never; } @@ -61,6 +77,9 @@ ArcEnterInteractiveMode(VOID) { bc_disable(); local_irq_disable(); +#ifdef CONFIG_SCSI_SGIWD93 + reset_wd33c93(sgiwd93_host); +#endif ARC_CALL0(imode); never: goto never; } diff --git a/trunk/arch/mips/au1000/common/reset.c b/trunk/arch/mips/au1000/common/reset.c index c93af224c1b3..4ffccedf5967 100644 --- a/trunk/arch/mips/au1000/common/reset.c +++ b/trunk/arch/mips/au1000/common/reset.c @@ -164,20 +164,17 @@ void au1000_restart(char *command) void au1000_halt(void) { -#if defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) +#if defined(CONFIG_MIPS_PB1550) /* power off system */ - printk("\n** Powering off...\n"); + printk("\n** Powering off Pb1550\n"); au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); au_sync(); while(1); /* should not get here */ -#else +#endif printk(KERN_NOTICE "\n** You can safely turn off the power\n"); #ifdef CONFIG_MIPS_MIRAGE au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT); #endif -#ifdef CONFIG_MIPS_DB1200 - au_writew(au_readw(0xB980001C) | (1<<14), 0xB980001C); -#endif #ifdef CONFIG_PM au_sleep(); @@ -190,7 +187,6 @@ void au1000_halt(void) "wait\n\t" ".set\tmips0"); #endif -#endif /* defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550) */ } void au1000_power_off(void) diff --git a/trunk/arch/mips/kernel/time.c b/trunk/arch/mips/kernel/time.c index 51273b7297a7..42c94c771afb 100644 --- a/trunk/arch/mips/kernel/time.c +++ b/trunk/arch/mips/kernel/time.c @@ -424,8 +424,6 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) unsigned long j; unsigned int count; - write_seqlock(&xtime_lock); - count = mips_hpt_read(); mips_timer_ack(); @@ -443,6 +441,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) * CMOS clock accordingly every ~11 minutes. rtc_set_time() has to be * called as close as possible to 500 ms before the new second starts. */ + write_seqlock(&xtime_lock); if (ntp_synced() && xtime.tv_sec > last_rtc_update + 660 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && @@ -454,6 +453,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) last_rtc_update = xtime.tv_sec - 600; } } + write_sequnlock(&xtime_lock); /* * If jiffies has overflown in this timer_interrupt, we must @@ -496,8 +496,6 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) } } - write_sequnlock(&xtime_lock); - /* * In UP mode, we call local_timer_interrupt() to do profiling * and process accouting. diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c index 9572ed44f0d5..0668e9bfce41 100644 --- a/trunk/arch/mips/mm/c-r4k.c +++ b/trunk/arch/mips/mm/c-r4k.c @@ -375,7 +375,6 @@ static void r4k_flush_cache_mm(struct mm_struct *mm) struct flush_cache_page_args { struct vm_area_struct *vma; unsigned long addr; - unsigned long pfn; }; static inline void local_r4k_flush_cache_page(void *args) @@ -383,7 +382,6 @@ static inline void local_r4k_flush_cache_page(void *args) struct flush_cache_page_args *fcp_args = args; struct vm_area_struct *vma = fcp_args->vma; unsigned long addr = fcp_args->addr; - unsigned long paddr = fcp_args->pfn << PAGE_SHIFT; int exec = vma->vm_flags & VM_EXEC; struct mm_struct *mm = vma->vm_mm; pgd_t *pgdp; @@ -433,12 +431,11 @@ static inline void local_r4k_flush_cache_page(void *args) * Do indexed flush, too much work to get the (possible) TLB refills * to work correctly. */ + addr = INDEX_BASE + (addr & (dcache_size - 1)); if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) { - r4k_blast_dcache_page_indexed(cpu_has_pindexed_dcache ? - paddr : addr); - if (exec && !cpu_icache_snoops_remote_store) { - r4k_blast_scache_page_indexed(paddr); - } + r4k_blast_dcache_page_indexed(addr); + if (exec && !cpu_icache_snoops_remote_store) + r4k_blast_scache_page_indexed(addr); } if (exec) { if (cpu_has_vtag_icache) { @@ -458,7 +455,6 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma, args.vma = vma; args.addr = addr; - args.pfn = pfn; on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); } @@ -960,7 +956,6 @@ static void __init probe_pcache(void) switch (c->cputype) { case CPU_20KC: case CPU_25KF: - c->dcache.flags |= MIPS_CACHE_PINDEX; case CPU_R10000: case CPU_R12000: case CPU_SB1: diff --git a/trunk/arch/mips/mm/c-tx39.c b/trunk/arch/mips/mm/c-tx39.c index fe232e3988e3..7c572bea4a98 100644 --- a/trunk/arch/mips/mm/c-tx39.c +++ b/trunk/arch/mips/mm/c-tx39.c @@ -210,6 +210,7 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page * Do indexed flush, too much work to get the (possible) TLB refills * to work correctly. */ + page = (KSEG0 + (page & (dcache_size - 1))); if (cpu_has_dc_aliases || exec) tx39_blast_dcache_page_indexed(page); if (exec) diff --git a/trunk/arch/mips/sibyte/sb1250/time.c b/trunk/arch/mips/sibyte/sb1250/time.c index 1588f6debd90..511c89d65f38 100644 --- a/trunk/arch/mips/sibyte/sb1250/time.c +++ b/trunk/arch/mips/sibyte/sb1250/time.c @@ -47,51 +47,23 @@ #define IMR_IP3_VAL K_INT_MAP_I1 #define IMR_IP4_VAL K_INT_MAP_I2 -#define SB1250_HPT_NUM 3 -#define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */ -#define SB1250_HPT_SHIFT ((sizeof(unsigned int)*8)-V_SCD_TIMER_WIDTH) - - extern int sb1250_steal_irq(int irq); -static unsigned int sb1250_hpt_read(void); -static void sb1250_hpt_init(unsigned int); - -static unsigned int hpt_offset; - -void __init sb1250_hpt_setup(void) -{ - int cpu = smp_processor_id(); - - if (!cpu) { - /* Setup hpt using timer #3 but do not enable irq for it */ - __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); - __raw_writeq(SB1250_HPT_VALUE, - IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_INIT))); - __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, - IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CFG))); - - /* - * we need to fill 32 bits, so just use the upper 23 bits and pretend - * the timer is going 512Mhz instead of 1Mhz - */ - mips_hpt_frequency = V_SCD_TIMER_FREQ << SB1250_HPT_SHIFT; - mips_hpt_init = sb1250_hpt_init; - mips_hpt_read = sb1250_hpt_read; - } -} - - void sb1250_time_init(void) { int cpu = smp_processor_id(); int irq = K_INT_TIMER_0+cpu; - /* Only have 4 general purpose timers, and we use last one as hpt */ - if (cpu > 2) { + /* Only have 4 general purpose timers */ + if (cpu > 3) { BUG(); } + if (!cpu) { + /* Use our own gettimeoffset() routine */ + do_gettimeoffset = sb1250_gettimeoffset; + } + sb1250_mask_irq(cpu, irq); /* Map the timer interrupt to ip[4] of this cpu */ @@ -103,10 +75,10 @@ void sb1250_time_init(void) /* Disable the timer and set up the count */ __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); #ifdef CONFIG_SIMULATION - __raw_writeq((50000 / HZ) - 1, + __raw_writeq(50000 / HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); #else - __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, + __raw_writeq(1000000 / HZ, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT))); #endif @@ -131,7 +103,7 @@ void sb1250_timer_interrupt(struct pt_regs *regs) int cpu = smp_processor_id(); int irq = K_INT_TIMER_0 + cpu; - /* ACK interrupt */ + /* Reset the timer */ ____raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG))); @@ -150,26 +122,15 @@ void sb1250_timer_interrupt(struct pt_regs *regs) } /* - * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over - * again. There's no easy way to set to a specific value so store init value - * in hpt_offset and subtract each time. - * - * Note: Timer isn't full 32bits so shift it into the upper part making - * it appear to run at a higher frequency. + * We use our own do_gettimeoffset() instead of the generic one, + * because the generic one does not work for SMP case. + * In addition, since we use general timer 0 for system time, + * we can get accurate intra-jiffy offset without calibration. */ -static unsigned int sb1250_hpt_read(void) +unsigned long sb1250_gettimeoffset(void) { - unsigned int count; + unsigned long count = + __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT))); - count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); - - count = (SB1250_HPT_VALUE - count) << SB1250_HPT_SHIFT; - - return count - hpt_offset; -} - -static void sb1250_hpt_init(unsigned int count) -{ - hpt_offset = count; - return; -} + return 1000000/HZ - count; + } diff --git a/trunk/arch/mips/sibyte/swarm/setup.c b/trunk/arch/mips/sibyte/swarm/setup.c index b661d2425a36..b614ca0ddb69 100644 --- a/trunk/arch/mips/sibyte/swarm/setup.c +++ b/trunk/arch/mips/sibyte/swarm/setup.c @@ -70,12 +70,6 @@ const char *get_system_type(void) return "SiByte " SIBYTE_BOARD_NAME; } -void __init swarm_time_init(void) -{ - /* Setup HPT */ - sb1250_hpt_setup(); -} - void __init swarm_timer_setup(struct irqaction *irq) { /* @@ -115,7 +109,6 @@ void __init plat_setup(void) panic_timeout = 5; /* For debug. */ - board_time_init = swarm_time_init; board_timer_setup = swarm_timer_setup; board_be_handler = swarm_be_handler; diff --git a/trunk/drivers/net/tg3.c b/trunk/drivers/net/tg3.c index caf4102b54ce..b8f1524da557 100644 --- a/trunk/drivers/net/tg3.c +++ b/trunk/drivers/net/tg3.c @@ -9552,36 +9552,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) } } - /* The EPB bridge inside 5714, 5715, and 5780 cannot support - * DMA addresses > 40-bit. This bridge may have other additional - * 57xx devices behind it in some 4-port NIC designs for example. - * Any tg3 device found behind the bridge will also need the 40-bit - * DMA workaround. - */ + /* Find msi capability. */ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) { tp->tg3_flags2 |= TG3_FLG2_5780_CLASS; - tp->tg3_flags |= TG3_FLAG_40BIT_DMA_BUG; tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); } - else { - struct pci_dev *bridge = NULL; - - do { - bridge = pci_get_device(PCI_VENDOR_ID_SERVERWORKS, - PCI_DEVICE_ID_SERVERWORKS_EPB, - bridge); - if (bridge && bridge->subordinate && - (bridge->subordinate->number <= - tp->pdev->bus->number) && - (bridge->subordinate->subordinate >= - tp->pdev->bus->number)) { - tp->tg3_flags |= TG3_FLAG_40BIT_DMA_BUG; - pci_dev_put(bridge); - break; - } - } while (bridge); - } /* Initialize misc host control in PCI block. */ tp->misc_host_ctrl |= (misc_ctrl_reg & @@ -10327,14 +10303,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); - /* If the 5704 is behind the EPB bridge, we can - * do the less restrictive ONE_DMA workaround for - * better performance. - */ - if ((tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG) && - GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) - tp->dma_rwctrl |= 0x8000; - else if (ccval == 0x6 || ccval == 0x7) + if (ccval == 0x6 || ccval == 0x7) tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; /* Set bit 23 to enable PCIX hw bug fix */ @@ -10790,20 +10759,19 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, goto err_out_iounmap; } - /* The EPB bridge inside 5714, 5715, and 5780 and any - * device behind the EPB cannot support DMA addresses > 40-bit. + /* 5714, 5715 and 5780 cannot support DMA addresses > 40-bit. * On 64-bit systems with IOMMU, use 40-bit dma_mask. * On 64-bit systems without IOMMU, use 64-bit dma_mask and * do DMA address check in tg3_start_xmit(). */ - if (tp->tg3_flags2 & TG3_FLG2_IS_5788) - persist_dma_mask = dma_mask = DMA_32BIT_MASK; - else if (tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG) { + if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { persist_dma_mask = dma_mask = DMA_40BIT_MASK; #ifdef CONFIG_HIGHMEM dma_mask = DMA_64BIT_MASK; #endif - } else + } else if (tp->tg3_flags2 & TG3_FLG2_IS_5788) + persist_dma_mask = dma_mask = DMA_32BIT_MASK; + else persist_dma_mask = dma_mask = DMA_64BIT_MASK; /* Configure DMA attributes. */ @@ -10940,10 +10908,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) != 0, (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0, (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0); - printk(KERN_INFO "%s: dma_rwctrl[%08x] dma_mask[%d-bit]\n", - dev->name, tp->dma_rwctrl, - (pdev->dma_mask == DMA_32BIT_MASK) ? 32 : - (((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64)); + printk(KERN_INFO "%s: dma_rwctrl[%08x]\n", + dev->name, tp->dma_rwctrl); return 0; diff --git a/trunk/drivers/net/tg3.h b/trunk/drivers/net/tg3.h index 7e3b613afb29..7f4b7f6ac40d 100644 --- a/trunk/drivers/net/tg3.h +++ b/trunk/drivers/net/tg3.h @@ -2163,7 +2163,6 @@ struct tg3 { #define TG3_FLAG_10_100_ONLY 0x01000000 #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 #define TG3_FLAG_IN_RESET_TASK 0x04000000 -#define TG3_FLAG_40BIT_DMA_BUG 0x08000000 #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 #define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 #define TG3_FLAG_SPLIT_MODE 0x40000000 diff --git a/trunk/include/asm-mips/cpu-features.h b/trunk/include/asm-mips/cpu-features.h index 3f2b6d9ac45e..78c9cc2735d5 100644 --- a/trunk/include/asm-mips/cpu-features.h +++ b/trunk/include/asm-mips/cpu-features.h @@ -96,9 +96,6 @@ #ifndef cpu_has_ic_fills_f_dc #define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC) #endif -#ifndef cpu_has_pindexed_dcache -#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) -#endif /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors diff --git a/trunk/include/asm-mips/cpu-info.h b/trunk/include/asm-mips/cpu-info.h index 140be1c67da7..d5cf519f8fcc 100644 --- a/trunk/include/asm-mips/cpu-info.h +++ b/trunk/include/asm-mips/cpu-info.h @@ -39,7 +39,6 @@ struct cache_desc { #define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */ #define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */ #define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */ -#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ struct cpuinfo_mips { unsigned long udelay_val; diff --git a/trunk/include/asm-mips/hazards.h b/trunk/include/asm-mips/hazards.h index feb29a793888..6111a0ce58c4 100644 --- a/trunk/include/asm-mips/hazards.h +++ b/trunk/include/asm-mips/hazards.h @@ -3,9 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 2003, 2004 Ralf Baechle - * Copyright (C) MIPS Technologies, Inc. - * written by Ralf Baechle + * Copyright (C) 2003, 2004 Ralf Baechle */ #ifndef _ASM_HAZARDS_H #define _ASM_HAZARDS_H @@ -76,7 +74,8 @@ #define irq_disable_hazard _ehb -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ + defined(CONFIG_CPU_SB1) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. @@ -100,13 +99,13 @@ #else /* __ASSEMBLY__ */ __asm__( - " .macro _ssnop \n" - " sll $0, $0, 1 \n" - " .endm \n" - " \n" - " .macro _ehb \n" - " sll $0, $0, 3 \n" - " .endm \n"); + " .macro _ssnop \n\t" + " sll $0, $0, 1 \n\t" + " .endm \n\t" + " \n\t" + " .macro _ehb \n\t" + " sll $0, $0, 3 \n\t" + " .endm \n\t"); #ifdef CONFIG_CPU_RM9000 @@ -118,21 +117,17 @@ __asm__( #define mtc0_tlbw_hazard() \ __asm__ __volatile__( \ - " .set mips32 \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " .set mips0 \n") + ".set\tmips32\n\t" \ + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ + ".set\tmips0") #define tlbw_use_hazard() \ __asm__ __volatile__( \ - " .set mips32 \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " _ssnop \n" \ - " .set mips0 \n") + ".set\tmips32\n\t" \ + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ + ".set\tmips0") + +#define back_to_back_c0_hazard() do { } while (0) #else @@ -141,25 +136,15 @@ __asm__( */ #define mtc0_tlbw_hazard() \ __asm__ __volatile__( \ - " .set noreorder \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " .set reorder \n") + ".set noreorder\n\t" \ + "nop; nop; nop; nop; nop; nop;\n\t" \ + ".set reorder\n\t") #define tlbw_use_hazard() \ __asm__ __volatile__( \ - " .set noreorder \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " nop \n" \ - " .set reorder \n") + ".set noreorder\n\t" \ + "nop; nop; nop; nop; nop; nop;\n\t" \ + ".set reorder\n\t") #endif @@ -171,26 +156,49 @@ __asm__( #ifdef CONFIG_CPU_MIPSR2 -__asm__(" .macro irq_enable_hazard \n" - " _ehb \n" - " .endm \n" - " \n" - " .macro irq_disable_hazard \n" - " _ehb \n" - " .endm \n"); +__asm__( + " .macro\tirq_enable_hazard \n\t" + " _ehb \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " _ehb \n\t" + " .endm \n\t" + " \n\t" + " .macro\tback_to_back_c0_hazard \n\t" + " _ehb \n\t" + " .endm"); + +#define irq_enable_hazard() \ + __asm__ __volatile__( \ + "irq_enable_hazard") -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) +#define irq_disable_hazard() \ + __asm__ __volatile__( \ + "irq_disable_hazard") + +#define back_to_back_c0_hazard() \ + __asm__ __volatile__( \ + "back_to_back_c0_hazard") + +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ + defined(CONFIG_CPU_SB1) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. */ __asm__( - " .macro irq_enable_hazard \n" - " .endm \n" - " \n" - " .macro irq_disable_hazard \n" - " .endm \n"); + " .macro\tirq_enable_hazard \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " .endm"); + +#define irq_enable_hazard() do { } while (0) +#define irq_disable_hazard() do { } while (0) + +#define back_to_back_c0_hazard() do { } while (0) #else @@ -201,63 +209,29 @@ __asm__( */ __asm__( - " # \n" - " # There is a hazard but we do not care \n" - " # \n" - " .macro\tirq_enable_hazard \n" - " .endm \n" - " \n" - " .macro\tirq_disable_hazard \n" - " _ssnop \n" - " _ssnop \n" - " _ssnop \n" - " .endm \n"); - -#endif - -#define irq_enable_hazard() \ - __asm__ __volatile__("irq_enable_hazard") -#define irq_disable_hazard() \ - __asm__ __volatile__("irq_disable_hazard") - - -/* - * Back-to-back hazards - - * - * What is needed to separate a move to cp0 from a subsequent read from the - * same cp0 register? - */ -#ifdef CONFIG_CPU_MIPSR2 - -__asm__(" .macro back_to_back_c0_hazard \n" - " _ehb \n" - " .endm \n"); - -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ - defined(CONFIG_CPU_SB1) - -__asm__(" .macro back_to_back_c0_hazard \n" - " .endm \n"); - -#else - -__asm__(" .macro back_to_back_c0_hazard \n" - " .set noreorder \n" - " _ssnop \n" - " _ssnop \n" - " _ssnop \n" - " .set reorder \n" + " # \n\t" + " # There is a hazard but we do not care \n\t" + " # \n\t" + " .macro\tirq_enable_hazard \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " _ssnop; _ssnop; _ssnop \n\t" " .endm"); -#endif +#define irq_enable_hazard() do { } while (0) +#define irq_disable_hazard() \ + __asm__ __volatile__( \ + "irq_disable_hazard") #define back_to_back_c0_hazard() \ - __asm__ __volatile__("back_to_back_c0_hazard") + __asm__ __volatile__( \ + " .set noreorder \n" \ + " nop; nop; nop \n" \ + " .set reorder \n") +#endif -/* - * Instruction execution hazard - */ #ifdef CONFIG_CPU_MIPSR2 /* * gcc has a tradition of misscompiling the previous construct using the diff --git a/trunk/include/asm-mips/io.h b/trunk/include/asm-mips/io.h index ba1d7bbc15d2..8c011aa61afa 100644 --- a/trunk/include/asm-mips/io.h +++ b/trunk/include/asm-mips/io.h @@ -4,7 +4,7 @@ * for more details. * * Copyright (C) 1994, 1995 Waldorf GmbH - * Copyright (C) 1994 - 2000, 06 Ralf Baechle + * Copyright (C) 1994 - 2000 Ralf Baechle * Copyright (C) 1999, 2000 Silicon Graphics, Inc. * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved. * Author: Maciej W. Rozycki @@ -103,20 +103,8 @@ */ extern const unsigned long mips_io_port_base; -/* - * Gcc will generate code to load the value of mips_io_port_base after each - * function call which may be fairly wasteful in some cases. So we don't - * play quite by the book. We tell gcc mips_io_port_base is a long variable - * which solves the code generation issue. Now we need to violate the - * aliasing rules a little to make initialization possible and finally we - * will need the barrier() to fight side effects of the aliasing chat. - * This trickery will eventually collapse under gcc's optimizer. Oh well. - */ -static inline void set_io_port_base(unsigned long base) -{ - * (unsigned long *) &mips_io_port_base = base; - barrier(); -} +#define set_io_port_base(base) \ + do { * (unsigned long *) &mips_io_port_base = (base); } while (0) /* * Thanks to James van Artsdalen for a better timing-fix than diff --git a/trunk/include/asm-mips/r4kcache.h b/trunk/include/asm-mips/r4kcache.h index 0bcb79a58ee9..9632c27dad15 100644 --- a/trunk/include/asm-mips/r4kcache.h +++ b/trunk/include/asm-mips/r4kcache.h @@ -257,8 +257,7 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ \ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ { \ - unsigned long indexmask = current_cpu_data.desc.waysize - 1; \ - unsigned long start = INDEX_BASE + (page & indexmask); \ + unsigned long start = page; \ unsigned long end = start + PAGE_SIZE; \ unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ unsigned long ws_end = current_cpu_data.desc.ways << \ diff --git a/trunk/include/asm-mips/sibyte/sb1250.h b/trunk/include/asm-mips/sibyte/sb1250.h index b09e16c93ca0..a474c29cd701 100644 --- a/trunk/include/asm-mips/sibyte/sb1250.h +++ b/trunk/include/asm-mips/sibyte/sb1250.h @@ -45,8 +45,8 @@ extern unsigned int soc_type; extern unsigned int periph_rev; extern unsigned int zbbus_mhz; -extern void sb1250_hpt_setup(void); extern void sb1250_time_init(void); +extern unsigned long sb1250_gettimeoffset(void); extern void sb1250_mask_irq(int cpu, int irq); extern void sb1250_unmask_irq(int cpu, int irq); extern void sb1250_smp_finish(void); diff --git a/trunk/include/asm-mips/sibyte/sb1250_scd.h b/trunk/include/asm-mips/sibyte/sb1250_scd.h index f4178bdcfcb0..a667bc14a7cd 100644 --- a/trunk/include/asm-mips/sibyte/sb1250_scd.h +++ b/trunk/include/asm-mips/sibyte/sb1250_scd.h @@ -359,15 +359,14 @@ */ #define V_SCD_TIMER_FREQ 1000000 -#define V_SCD_TIMER_WIDTH 23 #define S_SCD_TIMER_INIT 0 -#define M_SCD_TIMER_INIT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_INIT) +#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT) #define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT) #define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT) #define S_SCD_TIMER_CNT 0 -#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT) +#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT) #define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT) #define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT) diff --git a/trunk/include/linux/pci_ids.h b/trunk/include/linux/pci_ids.h index 751eea58bde8..1709b5009d2e 100644 --- a/trunk/include/linux/pci_ids.h +++ b/trunk/include/linux/pci_ids.h @@ -1365,7 +1365,6 @@ #define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 -#define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 diff --git a/trunk/include/net/ax25.h b/trunk/include/net/ax25.h index d052b221dbcd..2250a18b0cbb 100644 --- a/trunk/include/net/ax25.h +++ b/trunk/include/net/ax25.h @@ -110,15 +110,8 @@ enum { enum { AX25_PROTO_STD_SIMPLEX, AX25_PROTO_STD_DUPLEX, -#ifdef CONFIG_AX25_DAMA_SLAVE AX25_PROTO_DAMA_SLAVE, -#ifdef CONFIG_AX25_DAMA_MASTER - AX25_PROTO_DAMA_MASTER, -#define AX25_PROTO_MAX AX25_PROTO_DAMA_MASTER -#endif -#endif - __AX25_PROTO_MAX, - AX25_PROTO_MAX = __AX25_PROTO_MAX -1 + AX25_PROTO_DAMA_MASTER }; enum { diff --git a/trunk/kernel/exit.c b/trunk/kernel/exit.c index 531aadca5530..d1e8d500a7e1 100644 --- a/trunk/kernel/exit.c +++ b/trunk/kernel/exit.c @@ -807,8 +807,6 @@ fastcall NORET_TYPE void do_exit(long code) panic("Attempted to kill the idle task!"); if (unlikely(tsk->pid == 1)) panic("Attempted to kill init!"); - if (tsk->io_context) - exit_io_context(); if (unlikely(current->ptrace & PT_TRACE_EXIT)) { current->ptrace_message = code; @@ -822,6 +820,8 @@ fastcall NORET_TYPE void do_exit(long code) if (unlikely(tsk->flags & PF_EXITING)) { printk(KERN_ALERT "Fixing recursive fault but reboot is needed!\n"); + if (tsk->io_context) + exit_io_context(); set_current_state(TASK_UNINTERRUPTIBLE); schedule(); } @@ -881,6 +881,9 @@ fastcall NORET_TYPE void do_exit(long code) */ mutex_debug_check_no_locks_held(tsk); + if (tsk->io_context) + exit_io_context(); + /* PF_DEAD causes final put_task_struct after we schedule. */ preempt_disable(); BUG_ON(tsk->flags & PF_DEAD); diff --git a/trunk/net/ax25/sysctl_net_ax25.c b/trunk/net/ax25/sysctl_net_ax25.c index 894a22558d9d..f67711f2ee96 100644 --- a/trunk/net/ax25/sysctl_net_ax25.c +++ b/trunk/net/ax25/sysctl_net_ax25.c @@ -24,7 +24,7 @@ static int min_t3[1], max_t3[] = {3600 * HZ}; static int min_idle[1], max_idle[] = {65535 * HZ}; static int min_n2[] = {1}, max_n2[] = {31}; static int min_paclen[] = {1}, max_paclen[] = {512}; -static int min_proto[1], max_proto[] = { AX25_PROTO_MAX }; +static int min_proto[1], max_proto[] = {3}; static int min_ds_timeout[1], max_ds_timeout[] = {65535 * HZ}; static struct ctl_table_header *ax25_table_header;