From 51cd86bad185c1d891003960a2929cfd5095e88f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 17 Dec 2010 10:54:26 +0000 Subject: [PATCH] --- yaml --- r: 228816 b: refs/heads/master c: 9c3d2f7ffac34c62fea0b73e607707168a6f09b1 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index fc5e13ef701e..bb62c7b75d41 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6714afb108b4973a07413ec58cb300b6d90b8df4 +refs/heads/master: 9c3d2f7ffac34c62fea0b73e607707168a6f09b1 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index fe6538297872..c79bee4b4d56 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -6141,6 +6141,7 @@ static void gen6_enable_rc6(struct drm_i915_private *dev_priv) I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_RC6p_ENABLE | GEN6_RC_CTL_RC6_ENABLE | + GEN6_RC_CTL_EI_MODE(1) | GEN6_RC_CTL_HW_ENABLE); I915_WRITE(GEN6_RC_NORMAL_FREQ,