From 533b8b118372620f71a5d0e0e3a950f3f4e231bd Mon Sep 17 00:00:00 2001 From: Rajkumar Manoharan Date: Mon, 4 Jun 2012 16:28:20 +0530 Subject: [PATCH] --- yaml --- r: 314030 b: refs/heads/master c: 9dc08eceb7491331e81acde625e0d9c82aa86a16 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index f400ed4ea2ec..2ad6f54ceb71 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4fb7175bbd6a32899617b96b0b73c2ad651dfd03 +refs/heads/master: 9dc08eceb7491331e81acde625e0d9c82aa86a16 diff --git a/trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index f794828c08e2..2cdf82bdb11d 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/trunk/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -3613,6 +3613,7 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz) value = ar9003_switch_com_spdt_get(ah, is2ghz); REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL, AR_SWITCH_TABLE_COM_SPDT_ALL, value); + REG_SET_BIT(ah, AR_PHY_GLB_CONTROL, AR_BTCOEX_CTRL_SPDT_ENABLE); } value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz);