From 534d41d113e83955aeaf543e270a703bde18f1df Mon Sep 17 00:00:00 2001 From: Thomas Schwinge Date: Fri, 9 Mar 2012 17:38:52 +0100 Subject: [PATCH] --- yaml --- r: 297815 b: refs/heads/master c: bfc906d885762cd5e9381c1815b18bd7753cedf5 h: refs/heads/master i: 297813: 70d7f1585dc1e642e3dfccba14bda64f5b817f0f 297811: 7ac31f872d4064ae0812787635280353deaa0720 297807: 9d28db21e6da2d4d956cc6cd9560f2ee98356cf6 v: v3 --- [refs] | 2 +- trunk/arch/sh/drivers/pci/pci-sh7780.c | 15 ++++++++++++--- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index ad9553041504..b001cff75a5c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 49d4bcaddca977fffdea8b0b71f6e5da96dac78e +refs/heads/master: bfc906d885762cd5e9381c1815b18bd7753cedf5 diff --git a/trunk/arch/sh/drivers/pci/pci-sh7780.c b/trunk/arch/sh/drivers/pci/pci-sh7780.c index fb8f14990743..5a6dab6e27d9 100644 --- a/trunk/arch/sh/drivers/pci/pci-sh7780.c +++ b/trunk/arch/sh/drivers/pci/pci-sh7780.c @@ -21,6 +21,13 @@ #include #include +#if defined(CONFIG_CPU_BIG_ENDIAN) +# define PCICR_ENDIANNESS SH4_PCICR_BSWP +#else +# define PCICR_ENDIANNESS 0 +#endif + + static struct resource sh7785_pci_resources[] = { { .name = "PCI IO", @@ -254,7 +261,7 @@ static int __init sh7780_pci_init(void) __raw_writel(PCIECR_ENBL, PCIECR); /* Reset */ - __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST, + __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS, chan->reg_base + SH4_PCICR); /* @@ -290,7 +297,8 @@ static int __init sh7780_pci_init(void) * Now throw it in to register initialization mode and * start the real work. */ - __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR); + __raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS, + chan->reg_base + SH4_PCICR); memphys = __pa(memory_start); memsize = roundup_pow_of_two(memory_end - memory_start); @@ -380,7 +388,8 @@ static int __init sh7780_pci_init(void) * Initialization mode complete, release the control register and * enable round robin mode to stop device overruns/starvation. */ - __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO, + __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO | + PCICR_ENDIANNESS, chan->reg_base + SH4_PCICR); ret = register_pci_controller(chan);