From 54741ddb3435d21128c64b83b32ea63ac040bbf8 Mon Sep 17 00:00:00 2001 From: Jeff Kirsher Date: Thu, 12 Jan 2006 16:50:46 -0800 Subject: [PATCH] --- yaml --- r: 18801 b: refs/heads/master c: 526f99572e9f18f42c8da2c9adafbe64482c0737 h: refs/heads/master i: 18799: 16f2d24e9b87f5af2f71c9c98135c8cab6027c8c v: v3 --- [refs] | 2 +- trunk/drivers/net/e1000/e1000_hw.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e659b61184be..bba5fc19e4d4 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 492731632cce0a7c8817376e1316f0af093830c4 +refs/heads/master: 526f99572e9f18f42c8da2c9adafbe64482c0737 diff --git a/trunk/drivers/net/e1000/e1000_hw.c b/trunk/drivers/net/e1000/e1000_hw.c index 45fa386d212e..bb9d00e0dc14 100644 --- a/trunk/drivers/net/e1000/e1000_hw.c +++ b/trunk/drivers/net/e1000/e1000_hw.c @@ -838,6 +838,11 @@ e1000_setup_link(struct e1000_hw *hw) DEBUGFUNC("e1000_setup_link"); + /* In the case of the phy reset being blocked, we already have a link. + * We do not have to set it up again. */ + if (e1000_check_phy_reset_block(hw)) + return E1000_SUCCESS; + /* Read and store word 0x0F of the EEPROM. This word contains bits * that determine the hardware's default PAUSE (flow control) mode, * a bit that determines whether the HW defaults to enabling or