From 569eb1c6be8aa8229c357aae18e8e74034aae03a Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 3 Dec 2010 20:28:21 +0900 Subject: [PATCH] --- yaml --- r: 231414 b: refs/heads/master c: df3d02962bc39155c8b4214ce6f0e84750c7921f h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-samsung/irq-vic-timer.c | 22 ++++++++++++--------- 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/[refs] b/[refs] index d1b9f275bf51..f46578634a6e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 27b31e56239b44608cad176c36c384c0265f8da5 +refs/heads/master: df3d02962bc39155c8b4214ce6f0e84750c7921f diff --git a/trunk/arch/arm/plat-samsung/irq-vic-timer.c b/trunk/arch/arm/plat-samsung/irq-vic-timer.c index 0270519fcabc..7ce77ddb729d 100644 --- a/trunk/arch/arm/plat-samsung/irq-vic-timer.c +++ b/trunk/arch/arm/plat-samsung/irq-vic-timer.c @@ -29,38 +29,41 @@ static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */ -static void s3c_irq_timer_mask(unsigned int irq) +static void s3c_irq_timer_mask(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; /* mask out pending interrupts */ - reg &= ~(1 << (irq - IRQ_TIMER0)); + reg &= ~mask; __raw_writel(reg, S3C64XX_TINT_CSTAT); } -static void s3c_irq_timer_unmask(unsigned int irq) +static void s3c_irq_timer_unmask(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; /* mask out pending interrupts */ - reg |= 1 << (irq - IRQ_TIMER0); + reg |= mask; __raw_writel(reg, S3C64XX_TINT_CSTAT); } -static void s3c_irq_timer_ack(unsigned int irq) +static void s3c_irq_timer_ack(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; - reg |= (1 << 5) << (irq - IRQ_TIMER0); + reg |= mask << 5; __raw_writel(reg, S3C64XX_TINT_CSTAT); } static struct irq_chip s3c_irq_timer = { .name = "s3c-timer", - .mask = s3c_irq_timer_mask, - .unmask = s3c_irq_timer_unmask, - .ack = s3c_irq_timer_ack, + .irq_mask = s3c_irq_timer_mask, + .irq_unmask = s3c_irq_timer_unmask, + .irq_ack = s3c_irq_timer_ack, }; /** @@ -79,6 +82,7 @@ void __init s3c_init_vic_timer_irq(unsigned int parent_irq, set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer); set_irq_chip(timer_irq, &s3c_irq_timer); + set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0))); set_irq_handler(timer_irq, handle_level_irq); set_irq_flags(timer_irq, IRQF_VALID);