From 56ca48fb7b496a8a57ef3da2df5e0ce007200e1c Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Tue, 19 Jan 2010 01:47:29 -0800 Subject: [PATCH] --- yaml --- r: 185801 b: refs/heads/master c: 8e714a074bc4da070807d019d4287dcd32af55f5 h: refs/heads/master i: 185799: 5648ed5fe874dfb285ca7da78ed091e5433d761f v: v3 --- [refs] | 2 +- trunk/drivers/ide/ide-timings.c | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 95ee17602006..2d0d3bb61cc4 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8776168ca2151850164af1de5565d01f7b8b2c53 +refs/heads/master: 8e714a074bc4da070807d019d4287dcd32af55f5 diff --git a/trunk/drivers/ide/ide-timings.c b/trunk/drivers/ide/ide-timings.c index c6053ab2b6c6..c7a65ee72310 100644 --- a/trunk/drivers/ide/ide-timings.c +++ b/trunk/drivers/ide/ide-timings.c @@ -186,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed, /* * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, * S.M.A.R.T and some other commands. We have to ensure that the - * DMA cycle timing is slower/equal than the fastest PIO timing. + * DMA cycle timing is slower/equal than the current PIO timing. */ if (speed >= XFER_SW_DMA_0) { - u8 pio = ide_get_best_pio_mode(drive, 255, 5); - ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); + ide_timing_compute(drive, drive->pio_mode, &p, T, UT); ide_timing_merge(&p, t, t, IDE_TIMING_ALL); }