diff --git a/[refs] b/[refs] index 0e91715eeab1..778519c9cdd3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 98cca250aecaf3f1b2fec003e1c0ce0bfaa4be36 +refs/heads/master: 9ca163c8602681ad098910f48f89b97f0cb87c4f diff --git a/trunk/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt b/trunk/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt index ebafba29fc5f..b393ccf1e9f3 100644 --- a/trunk/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt +++ b/trunk/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt @@ -64,6 +64,12 @@ PROPERTIES device-trees omit this property on MPIC nodes even when the MPIC is in fact big-endian, so certain boards override this property. + - single-cpu-affinity + Usage: optional + Value type: + If present the MPIC will be assumed to only be able to route + non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC). + INTERRUPT SPECIFIER DEFINITION Interrupt specifiers consists of 4 cells encoded as diff --git a/trunk/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/trunk/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi index 47f2b676bc7d..658bd81982cb 100644 --- a/trunk/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi +++ b/trunk/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi @@ -40,6 +40,7 @@ mpic: pic@40000 { compatible = "fsl,mpic"; device_type = "open-pic"; big-endian; + single-cpu-affinity; }; timer@41100 { diff --git a/trunk/arch/powerpc/sysdev/mpic.c b/trunk/arch/powerpc/sysdev/mpic.c index 9deec44ede83..c297a524f761 100644 --- a/trunk/arch/powerpc/sysdev/mpic.c +++ b/trunk/arch/powerpc/sysdev/mpic.c @@ -1187,6 +1187,8 @@ struct mpic * __init mpic_alloc(struct device_node *node, flags |= MPIC_BIG_ENDIAN; if (of_get_property(node, "pic-no-reset", NULL)) flags |= MPIC_NO_RESET; + if (of_get_property(node, "single-cpu-affinity", NULL)) + flags |= MPIC_SINGLE_DEST_CPU; if (of_device_is_compatible(node, "fsl,mpic")) flags |= MPIC_FSL;